Da Vinci Firmware 1
Firmware for the DaVinci-M rocket avionics board.
Loading...
Searching...
No Matches
lsm6dso32_reg.h
Go to the documentation of this file.
1
22/* Define to prevent recursive inclusion -------------------------------------*/
23#ifndef LSM6DSO32_REGS_H
24#define LSM6DSO32_REGS_H
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
30/* Includes ------------------------------------------------------------------*/
31#include <stdint.h>
32#include <stddef.h>
33#include <math.h>
34
50#ifndef DRV_BYTE_ORDER
51#ifndef __BYTE_ORDER__
52
53#define DRV_LITTLE_ENDIAN 1234
54#define DRV_BIG_ENDIAN 4321
55
59//#define DRV_BYTE_ORDER DRV_BIG_ENDIAN
60#define DRV_BYTE_ORDER DRV_LITTLE_ENDIAN
61
62#else /* defined __BYTE_ORDER__ */
63
64#define DRV_LITTLE_ENDIAN __ORDER_LITTLE_ENDIAN__
65#define DRV_BIG_ENDIAN __ORDER_BIG_ENDIAN__
66#define DRV_BYTE_ORDER __BYTE_ORDER__
67
68#endif /* __BYTE_ORDER__*/
69#endif /* DRV_BYTE_ORDER */
70
82#ifndef MEMS_SHARED_TYPES
83#define MEMS_SHARED_TYPES
84
85typedef struct
86{
87#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
88 uint8_t bit0 : 1;
89 uint8_t bit1 : 1;
90 uint8_t bit2 : 1;
91 uint8_t bit3 : 1;
92 uint8_t bit4 : 1;
93 uint8_t bit5 : 1;
94 uint8_t bit6 : 1;
95 uint8_t bit7 : 1;
96#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
97 uint8_t bit7 : 1;
98 uint8_t bit6 : 1;
99 uint8_t bit5 : 1;
100 uint8_t bit4 : 1;
101 uint8_t bit3 : 1;
102 uint8_t bit2 : 1;
103 uint8_t bit1 : 1;
104 uint8_t bit0 : 1;
105#endif /* DRV_BYTE_ORDER */
106} bitwise_t;
107
108#define PROPERTY_DISABLE (0U)
109#define PROPERTY_ENABLE (1U)
110
120typedef int32_t (*stmdev_write_ptr)(void *, uint8_t, const uint8_t *, uint16_t);
121typedef int32_t (*stmdev_read_ptr)(void *, uint8_t, uint8_t *, uint16_t);
122typedef void (*stmdev_mdelay_ptr)(uint32_t millisec);
123
124typedef struct
125{
127 stmdev_write_ptr write_reg;
128 stmdev_read_ptr read_reg;
130 stmdev_mdelay_ptr mdelay;
132 void *handle;
133} stmdev_ctx_t;
134
140#endif /* MEMS_SHARED_TYPES */
141
142#ifndef MEMS_UCF_SHARED_TYPES
143#define MEMS_UCF_SHARED_TYPES
144
157typedef struct
158{
159 uint8_t address;
160 uint8_t data;
161} ucf_line_t;
162
168#endif /* MEMS_UCF_SHARED_TYPES */
169
182#define LSM6DSO32_I2C_ADD_L 0xD5
183#define LSM6DSO32_I2C_ADD_H 0xD7
184
186#define LSM6DSO32_ID 0x6C
187
193#define LSM6DSO32_FUNC_CFG_ACCESS 0x01U
194typedef struct
195{
196#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
197 uint8_t not_used_00 : 6;
198uint8_t reg_access :
199 2; /* shub_reg_access + func_cfg_access */
200#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
201uint8_t reg_access :
202 2; /* shub_reg_access + func_cfg_access */
203 uint8_t not_used_00 : 6;
204#endif /* DRV_BYTE_ORDER */
205} lsm6dso32_func_cfg_access_t;
206
207#define LSM6DSO32_PIN_CTRL 0x02U
208typedef struct
209{
210#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
211 uint8_t not_used_01 : 6;
212 uint8_t sdo_pu_en : 1;
213 uint8_t not_used_02 : 1;
214#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
215 uint8_t not_used_02 : 1;
216 uint8_t sdo_pu_en : 1;
217 uint8_t not_used_01 : 6;
218#endif /* DRV_BYTE_ORDER */
219} lsm6dso32_pin_ctrl_t;
220
221#define LSM6DSO32_FIFO_CTRL1 0x07U
222typedef struct
223{
224 uint8_t wtm : 8;
225} lsm6dso32_fifo_ctrl1_t;
226
227#define LSM6DSO32_FIFO_CTRL2 0x08U
228typedef struct
229{
230#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
231 uint8_t wtm : 1;
232 uint8_t uncoptr_rate : 2;
233 uint8_t not_used_01 : 1;
234 uint8_t odrchg_en : 1;
235 uint8_t not_used_02 : 1;
236 uint8_t fifo_compr_rt_en : 1;
237 uint8_t stop_on_wtm : 1;
238#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
239 uint8_t stop_on_wtm : 1;
240 uint8_t fifo_compr_rt_en : 1;
241 uint8_t not_used_02 : 1;
242 uint8_t odrchg_en : 1;
243 uint8_t not_used_01 : 1;
244 uint8_t uncoptr_rate : 2;
245 uint8_t wtm : 1;
246#endif /* DRV_BYTE_ORDER */
247} lsm6dso32_fifo_ctrl2_t;
248
249#define LSM6DSO32_FIFO_CTRL3 0x09U
250typedef struct
251{
252#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
253 uint8_t bdr_xl : 4;
254 uint8_t bdr_gy : 4;
255#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
256 uint8_t bdr_gy : 4;
257 uint8_t bdr_xl : 4;
258#endif /* DRV_BYTE_ORDER */
259} lsm6dso32_fifo_ctrl3_t;
260
261#define LSM6DSO32_FIFO_CTRL4 0x0AU
262typedef struct
263{
264#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
265 uint8_t fifo_mode : 3;
266 uint8_t not_used_01 : 1;
267 uint8_t odr_t_batch : 2;
268 uint8_t odr_ts_batch : 2;
269#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
270 uint8_t odr_ts_batch : 2;
271 uint8_t odr_t_batch : 2;
272 uint8_t not_used_01 : 1;
273 uint8_t fifo_mode : 3;
274#endif /* DRV_BYTE_ORDER */
275} lsm6dso32_fifo_ctrl4_t;
276
277#define LSM6DSO32_COUNTER_BDR_REG1 0x0BU
278typedef struct
279{
280#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
281 uint8_t cnt_bdr_th : 3;
282 uint8_t not_used_01 : 2;
283 uint8_t trig_counter_bdr : 1;
284 uint8_t rst_counter_bdr : 1;
285 uint8_t dataready_pulsed : 1;
286#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
287 uint8_t dataready_pulsed : 1;
288 uint8_t rst_counter_bdr : 1;
289 uint8_t trig_counter_bdr : 1;
290 uint8_t not_used_01 : 2;
291 uint8_t cnt_bdr_th : 3;
292#endif /* DRV_BYTE_ORDER */
293} lsm6dso32_counter_bdr_reg1_t;
294
295#define LSM6DSO32_COUNTER_BDR_REG2 0x0CU
296typedef struct
297{
298 uint8_t cnt_bdr_th : 8;
299} lsm6dso32_counter_bdr_reg2_t;
300
301#define LSM6DSO32_INT1_CTRL 0x0DU
302typedef struct
303{
304#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
305 uint8_t int1_drdy_xl : 1;
306 uint8_t int1_drdy_g : 1;
307 uint8_t int1_boot : 1;
308 uint8_t int1_fifo_th : 1;
309 uint8_t int1_fifo_ovr : 1;
310 uint8_t int1_fifo_full : 1;
311 uint8_t int1_cnt_bdr : 1;
312 uint8_t den_drdy_flag : 1;
313#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
314 uint8_t den_drdy_flag : 1;
315 uint8_t int1_cnt_bdr : 1;
316 uint8_t int1_fifo_full : 1;
317 uint8_t int1_fifo_ovr : 1;
318 uint8_t int1_fifo_th : 1;
319 uint8_t int1_boot : 1;
320 uint8_t int1_drdy_g : 1;
321 uint8_t int1_drdy_xl : 1;
322#endif /* DRV_BYTE_ORDER */
323} lsm6dso32_int1_ctrl_t;
324
325#define LSM6DSO32_INT2_CTRL 0x0EU
326typedef struct
327{
328#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
329 uint8_t int2_drdy_xl : 1;
330 uint8_t int2_drdy_g : 1;
331 uint8_t int2_drdy_temp : 1;
332 uint8_t int2_fifo_th : 1;
333 uint8_t int2_fifo_ovr : 1;
334 uint8_t int2_fifo_full : 1;
335 uint8_t int2_cnt_bdr : 1;
336 uint8_t not_used_01 : 1;
337#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
338 uint8_t not_used_01 : 1;
339 uint8_t int2_cnt_bdr : 1;
340 uint8_t int2_fifo_full : 1;
341 uint8_t int2_fifo_ovr : 1;
342 uint8_t int2_fifo_th : 1;
343 uint8_t int2_drdy_temp : 1;
344 uint8_t int2_drdy_g : 1;
345 uint8_t int2_drdy_xl : 1;
346#endif /* DRV_BYTE_ORDER */
347} lsm6dso32_int2_ctrl_t;
348
349#define LSM6DSO32_WHO_AM_I 0x0FU
350#define LSM6DSO32_CTRL1_XL 0x10U
351typedef struct
352{
353#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
354 uint8_t not_used_01 : 1;
355 uint8_t lpf2_xl_en : 1;
356 uint8_t fs_xl : 2;
357 uint8_t odr_xl : 4;
358#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
359 uint8_t odr_xl : 4;
360 uint8_t fs_xl : 2;
361 uint8_t lpf2_xl_en : 1;
362 uint8_t not_used_01 : 1;
363#endif /* DRV_BYTE_ORDER */
364} lsm6dso32_ctrl1_xl_t;
365
366#define LSM6DSO32_CTRL2_G 0x11U
367typedef struct
368{
369#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
370 uint8_t not_used_01 : 1;
371 uint8_t fs_g : 3; /* fs_125 + fs_g */
372 uint8_t odr_g : 4;
373#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
374 uint8_t odr_g : 4;
375 uint8_t fs_g : 3; /* fs_125 + fs_g */
376 uint8_t not_used_01 : 1;
377#endif /* DRV_BYTE_ORDER */
378} lsm6dso32_ctrl2_g_t;
379
380#define LSM6DSO32_CTRL3_C 0x12U
381typedef struct
382{
383#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
384 uint8_t sw_reset : 1;
385 uint8_t not_used_01 : 1;
386 uint8_t if_inc : 1;
387 uint8_t sim : 1;
388 uint8_t pp_od : 1;
389 uint8_t h_lactive : 1;
390 uint8_t bdu : 1;
391 uint8_t boot : 1;
392#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
393 uint8_t boot : 1;
394 uint8_t bdu : 1;
395 uint8_t h_lactive : 1;
396 uint8_t pp_od : 1;
397 uint8_t sim : 1;
398 uint8_t if_inc : 1;
399 uint8_t not_used_01 : 1;
400 uint8_t sw_reset : 1;
401#endif /* DRV_BYTE_ORDER */
402} lsm6dso32_ctrl3_c_t;
403
404#define LSM6DSO32_CTRL4_C 0x13U
405typedef struct
406{
407#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
408 uint8_t not_used_01 : 1;
409 uint8_t lpf1_sel_g : 1;
410 uint8_t i2c_disable : 1;
411 uint8_t drdy_mask : 1;
412 uint8_t not_used_02 : 1;
413 uint8_t int2_on_int1 : 1;
414 uint8_t sleep_g : 1;
415 uint8_t not_used_03 : 1;
416#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
417 uint8_t not_used_03 : 1;
418 uint8_t sleep_g : 1;
419 uint8_t int2_on_int1 : 1;
420 uint8_t not_used_02 : 1;
421 uint8_t drdy_mask : 1;
422 uint8_t i2c_disable : 1;
423 uint8_t lpf1_sel_g : 1;
424 uint8_t not_used_01 : 1;
425#endif /* DRV_BYTE_ORDER */
426} lsm6dso32_ctrl4_c_t;
427
428#define LSM6DSO32_CTRL5_C 0x14U
429typedef struct
430{
431#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
432 uint8_t st_xl : 2;
433 uint8_t st_g : 2;
434 uint8_t not_used_01 : 1;
435 uint8_t rounding : 2;
436 uint8_t xl_ulp_en : 1;
437#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
438 uint8_t xl_ulp_en : 1;
439 uint8_t rounding : 2;
440 uint8_t not_used_01 : 1;
441 uint8_t st_g : 2;
442 uint8_t st_xl : 2;
443#endif /* DRV_BYTE_ORDER */
444} lsm6dso32_ctrl5_c_t;
445
446#define LSM6DSO32_CTRL6_C 0x15U
447typedef struct
448{
449#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
450 uint8_t ftype : 3;
451 uint8_t usr_off_w : 1;
452 uint8_t xl_hm_mode : 1;
453uint8_t den_mode :
454 3; /* trig_en + lvl1_en + lvl2_en */
455#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
456uint8_t den_mode :
457 3; /* trig_en + lvl1_en + lvl2_en */
458 uint8_t xl_hm_mode : 1;
459 uint8_t usr_off_w : 1;
460 uint8_t ftype : 3;
461#endif /* DRV_BYTE_ORDER */
462} lsm6dso32_ctrl6_c_t;
463
464#define LSM6DSO32_CTRL7_G 0x16U
465typedef struct
466{
467#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
468 uint8_t not_used_01 : 1;
469 uint8_t usr_off_on_out : 1;
470 uint8_t not_used_02 : 2;
471 uint8_t hpm_g : 2;
472 uint8_t hp_en_g : 1;
473 uint8_t g_hm_mode : 1;
474#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
475 uint8_t g_hm_mode : 1;
476 uint8_t hp_en_g : 1;
477 uint8_t hpm_g : 2;
478 uint8_t not_used_02 : 2;
479 uint8_t usr_off_on_out : 1;
480 uint8_t not_used_01 : 1;
481#endif /* DRV_BYTE_ORDER */
482} lsm6dso32_ctrl7_g_t;
483
484#define LSM6DSO32_CTRL8_XL 0x17U
485typedef struct
486{
487#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
488 uint8_t low_pass_on_6d : 1;
489 uint8_t not_used_01 : 1;
490 uint8_t hp_slope_xl_en : 1;
491 uint8_t fastsettl_mode_xl : 1;
492 uint8_t hp_ref_mode_xl : 1;
493 uint8_t hpcf_xl : 3;
494#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
495 uint8_t hpcf_xl : 3;
496 uint8_t hp_ref_mode_xl : 1;
497 uint8_t fastsettl_mode_xl : 1;
498 uint8_t hp_slope_xl_en : 1;
499 uint8_t not_used_01 : 1;
500 uint8_t low_pass_on_6d : 1;
501#endif /* DRV_BYTE_ORDER */
502} lsm6dso32_ctrl8_xl_t;
503
504#define LSM6DSO32_CTRL9_XL 0x18U
505typedef struct
506{
507#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
508 uint8_t not_used_01 : 1;
509 uint8_t i3c_disable : 1;
510 uint8_t den_lh : 1;
511 uint8_t den_xl_g : 2; /* den_xl_en + den_xl_g */
512 uint8_t den_z : 1;
513 uint8_t den_y : 1;
514 uint8_t den_x : 1;
515#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
516 uint8_t den_x : 1;
517 uint8_t den_y : 1;
518 uint8_t den_z : 1;
519 uint8_t den_xl_g : 2; /* den_xl_en + den_xl_g */
520 uint8_t den_lh : 1;
521 uint8_t i3c_disable : 1;
522 uint8_t not_used_01 : 1;
523#endif /* DRV_BYTE_ORDER */
524} lsm6dso32_ctrl9_xl_t;
525
526#define LSM6DSO32_CTRL10_C 0x19U
527typedef struct
528{
529#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
530 uint8_t not_used_01 : 5;
531 uint8_t timestamp_en : 1;
532 uint8_t not_used_02 : 2;
533#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
534 uint8_t not_used_02 : 2;
535 uint8_t timestamp_en : 1;
536 uint8_t not_used_01 : 5;
537#endif /* DRV_BYTE_ORDER */
538} lsm6dso32_ctrl10_c_t;
539
540#define LSM6DSO32_ALL_INT_SRC 0x1AU
541typedef struct
542{
543#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
544 uint8_t ff_ia : 1;
545 uint8_t wu_ia : 1;
546 uint8_t single_tap : 1;
547 uint8_t double_tap : 1;
548 uint8_t d6d_ia : 1;
549 uint8_t sleep_change_ia : 1;
550 uint8_t not_used_01 : 1;
551 uint8_t timestamp_endcount : 1;
552#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
553 uint8_t timestamp_endcount : 1;
554 uint8_t not_used_01 : 1;
555 uint8_t sleep_change_ia : 1;
556 uint8_t d6d_ia : 1;
557 uint8_t double_tap : 1;
558 uint8_t single_tap : 1;
559 uint8_t wu_ia : 1;
560 uint8_t ff_ia : 1;
561#endif /* DRV_BYTE_ORDER */
562} lsm6dso32_all_int_src_t;
563
564#define LSM6DSO32_WAKE_UP_SRC 0x1BU
565typedef struct
566{
567#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
568 uint8_t z_wu : 1;
569 uint8_t y_wu : 1;
570 uint8_t x_wu : 1;
571 uint8_t wu_ia : 1;
572 uint8_t sleep_state : 1;
573 uint8_t ff_ia : 1;
574 uint8_t sleep_change_ia : 1;
575 uint8_t not_used_01 : 1;
576#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
577 uint8_t not_used_01 : 1;
578 uint8_t sleep_change_ia : 1;
579 uint8_t ff_ia : 1;
580 uint8_t sleep_state : 1;
581 uint8_t wu_ia : 1;
582 uint8_t x_wu : 1;
583 uint8_t y_wu : 1;
584 uint8_t z_wu : 1;
585#endif /* DRV_BYTE_ORDER */
586} lsm6dso32_wake_up_src_t;
587
588#define LSM6DSO32_TAP_SRC 0x1CU
589typedef struct
590{
591#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
592 uint8_t z_tap : 1;
593 uint8_t y_tap : 1;
594 uint8_t x_tap : 1;
595 uint8_t tap_sign : 1;
596 uint8_t double_tap : 1;
597 uint8_t single_tap : 1;
598 uint8_t tap_ia : 1;
599 uint8_t not_used_02 : 1;
600#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
601 uint8_t not_used_02 : 1;
602 uint8_t tap_ia : 1;
603 uint8_t single_tap : 1;
604 uint8_t double_tap : 1;
605 uint8_t tap_sign : 1;
606 uint8_t x_tap : 1;
607 uint8_t y_tap : 1;
608 uint8_t z_tap : 1;
609#endif /* DRV_BYTE_ORDER */
610} lsm6dso32_tap_src_t;
611
612#define LSM6DSO32_D6D_SRC 0x1DU
613typedef struct
614{
615#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
616 uint8_t xl : 1;
617 uint8_t xh : 1;
618 uint8_t yl : 1;
619 uint8_t yh : 1;
620 uint8_t zl : 1;
621 uint8_t zh : 1;
622 uint8_t d6d_ia : 1;
623 uint8_t den_drdy : 1;
624#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
625 uint8_t den_drdy : 1;
626 uint8_t d6d_ia : 1;
627 uint8_t zh : 1;
628 uint8_t zl : 1;
629 uint8_t yh : 1;
630 uint8_t yl : 1;
631 uint8_t xh : 1;
632 uint8_t xl : 1;
633#endif /* DRV_BYTE_ORDER */
634} lsm6dso32_d6d_src_t;
635
636#define LSM6DSO32_STATUS_REG 0x1EU
637typedef struct
638{
639#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
640 uint8_t xlda : 1;
641 uint8_t gda : 1;
642 uint8_t tda : 1;
643 uint8_t not_used_01 : 5;
644#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
645 uint8_t not_used_01 : 5;
646 uint8_t tda : 1;
647 uint8_t gda : 1;
648 uint8_t xlda : 1;
649#endif /* DRV_BYTE_ORDER */
650} lsm6dso32_status_reg_t;
651
652#define LSM6DSO32_OUT_TEMP_L 0x20U
653#define LSM6DSO32_OUT_TEMP_H 0x21U
654#define LSM6DSO32_OUTX_L_G 0x22U
655#define LSM6DSO32_OUTX_H_G 0x23U
656#define LSM6DSO32_OUTY_L_G 0x24U
657#define LSM6DSO32_OUTY_H_G 0x25U
658#define LSM6DSO32_OUTZ_L_G 0x26U
659#define LSM6DSO32_OUTZ_H_G 0x27U
660#define LSM6DSO32_OUTX_L_A 0x28U
661#define LSM6DSO32_OUTX_H_A 0x29U
662#define LSM6DSO32_OUTY_L_A 0x2AU
663#define LSM6DSO32_OUTY_H_A 0x2BU
664#define LSM6DSO32_OUTZ_L_A 0x2CU
665#define LSM6DSO32_OUTZ_H_A 0x2DU
666#define LSM6DSO32_EMB_FUNC_STATUS_MAINPAGE 0x35U
667typedef struct
668{
669#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
670 uint8_t not_used_01 : 3;
671 uint8_t is_step_det : 1;
672 uint8_t is_tilt : 1;
673 uint8_t is_sigmot : 1;
674 uint8_t not_used_02 : 1;
675 uint8_t is_fsm_lc : 1;
676#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
677 uint8_t is_fsm_lc : 1;
678 uint8_t not_used_02 : 1;
679 uint8_t is_sigmot : 1;
680 uint8_t is_tilt : 1;
681 uint8_t is_step_det : 1;
682 uint8_t not_used_01 : 3;
683#endif /* DRV_BYTE_ORDER */
684} lsm6dso32_emb_func_status_mainpage_t;
685
686#define LSM6DSO32_FSM_STATUS_A_MAINPAGE 0x36U
687typedef struct
688{
689#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
690 uint8_t is_fsm1 : 1;
691 uint8_t is_fsm2 : 1;
692 uint8_t is_fsm3 : 1;
693 uint8_t is_fsm4 : 1;
694 uint8_t is_fsm5 : 1;
695 uint8_t is_fsm6 : 1;
696 uint8_t is_fsm7 : 1;
697 uint8_t is_fsm8 : 1;
698#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
699 uint8_t is_fsm8 : 1;
700 uint8_t is_fsm7 : 1;
701 uint8_t is_fsm6 : 1;
702 uint8_t is_fsm5 : 1;
703 uint8_t is_fsm4 : 1;
704 uint8_t is_fsm3 : 1;
705 uint8_t is_fsm2 : 1;
706 uint8_t is_fsm1 : 1;
707#endif /* DRV_BYTE_ORDER */
708} lsm6dso32_fsm_status_a_mainpage_t;
709
710#define LSM6DSO32_FSM_STATUS_B_MAINPAGE 0x37U
711typedef struct
712{
713#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
714 uint8_t is_fsm9 : 1;
715 uint8_t is_fsm10 : 1;
716 uint8_t is_fsm11 : 1;
717 uint8_t is_fsm12 : 1;
718 uint8_t is_fsm13 : 1;
719 uint8_t is_fsm14 : 1;
720 uint8_t is_fsm15 : 1;
721 uint8_t is_fsm16 : 1;
722#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
723 uint8_t is_fsm16 : 1;
724 uint8_t is_fsm15 : 1;
725 uint8_t is_fsm14 : 1;
726 uint8_t is_fsm13 : 1;
727 uint8_t is_fsm12 : 1;
728 uint8_t is_fsm11 : 1;
729 uint8_t is_fsm10 : 1;
730 uint8_t is_fsm9 : 1;
731#endif /* DRV_BYTE_ORDER */
732} lsm6dso32_fsm_status_b_mainpage_t;
733
734#define LSM6DSO32_STATUS_MASTER_MAINPAGE 0x39U
735typedef struct
736{
737#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
738 uint8_t sens_hub_endop : 1;
739 uint8_t not_used_01 : 2;
740 uint8_t slave0_nack : 1;
741 uint8_t slave1_nack : 1;
742 uint8_t slave2_nack : 1;
743 uint8_t slave3_nack : 1;
744 uint8_t wr_once_done : 1;
745#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
746 uint8_t wr_once_done : 1;
747 uint8_t slave3_nack : 1;
748 uint8_t slave2_nack : 1;
749 uint8_t slave1_nack : 1;
750 uint8_t slave0_nack : 1;
751 uint8_t not_used_01 : 2;
752 uint8_t sens_hub_endop : 1;
753#endif /* DRV_BYTE_ORDER */
754} lsm6dso32_status_master_mainpage_t;
755
756#define LSM6DSO32_FIFO_STATUS1 0x3AU
757typedef struct
758{
759 uint8_t diff_fifo : 8;
760} lsm6dso32_fifo_status1_t;
761
762#define LSM6DSO32_FIFO_STATUS2 0x3B
763typedef struct
764{
765#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
766 uint8_t diff_fifo : 2;
767 uint8_t not_used_01 : 1;
768 uint8_t over_run_latched : 1;
769 uint8_t counter_bdr_ia : 1;
770 uint8_t fifo_full_ia : 1;
771 uint8_t fifo_ovr_ia : 1;
772 uint8_t fifo_wtm_ia : 1;
773#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
774 uint8_t fifo_wtm_ia : 1;
775 uint8_t fifo_ovr_ia : 1;
776 uint8_t fifo_full_ia : 1;
777 uint8_t counter_bdr_ia : 1;
778 uint8_t over_run_latched : 1;
779 uint8_t not_used_01 : 1;
780 uint8_t diff_fifo : 2;
781#endif /* DRV_BYTE_ORDER */
782} lsm6dso32_fifo_status2_t;
783
784#define LSM6DSO32_TIMESTAMP0 0x40U
785#define LSM6DSO32_TIMESTAMP1 0x41U
786#define LSM6DSO32_TIMESTAMP2 0x42U
787#define LSM6DSO32_TIMESTAMP3 0x43U
788
789#define LSM6DSO32_TAP_CFG0 0x56U
790typedef struct
791{
792#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
793 uint8_t lir : 1;
794 uint8_t tap_z_en : 1;
795 uint8_t tap_y_en : 1;
796 uint8_t tap_x_en : 1;
797 uint8_t slope_fds : 1;
798 uint8_t sleep_status_on_int : 1;
799 uint8_t int_clr_on_read : 1;
800 uint8_t not_used_01 : 1;
801#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
802 uint8_t not_used_01 : 1;
803 uint8_t int_clr_on_read : 1;
804 uint8_t sleep_status_on_int : 1;
805 uint8_t slope_fds : 1;
806 uint8_t tap_x_en : 1;
807 uint8_t tap_y_en : 1;
808 uint8_t tap_z_en : 1;
809 uint8_t lir : 1;
810#endif /* DRV_BYTE_ORDER */
811} lsm6dso32_tap_cfg0_t;
812
813#define LSM6DSO32_TAP_CFG1 0x57U
814typedef struct
815{
816#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
817 uint8_t tap_ths_x : 5;
818 uint8_t tap_priority : 3;
819#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
820 uint8_t tap_priority : 3;
821 uint8_t tap_ths_x : 5;
822#endif /* DRV_BYTE_ORDER */
823} lsm6dso32_tap_cfg1_t;
824
825#define LSM6DSO32_TAP_CFG2 0x58U
826typedef struct
827{
828#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
829 uint8_t tap_ths_y : 5;
830 uint8_t inact_en : 2;
831 uint8_t interrupts_enable : 1;
832#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
833 uint8_t interrupts_enable : 1;
834 uint8_t inact_en : 2;
835 uint8_t tap_ths_y : 5;
836#endif /* DRV_BYTE_ORDER */
837} lsm6dso32_tap_cfg2_t;
838
839#define LSM6DSO32_TAP_THS_6D 0x59U
840typedef struct
841{
842#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
843 uint8_t tap_ths_z : 5;
844 uint8_t sixd_ths : 2;
845 uint8_t d4d_en : 1;
846#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
847 uint8_t d4d_en : 1;
848 uint8_t sixd_ths : 2;
849 uint8_t tap_ths_z : 5;
850#endif /* DRV_BYTE_ORDER */
851} lsm6dso32_tap_ths_6d_t;
852
853#define LSM6DSO32_INT_DUR2 0x5AU
854typedef struct
855{
856#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
857 uint8_t shock : 2;
858 uint8_t quiet : 2;
859 uint8_t dur : 4;
860#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
861 uint8_t dur : 4;
862 uint8_t quiet : 2;
863 uint8_t shock : 2;
864#endif /* DRV_BYTE_ORDER */
865} lsm6dso32_int_dur2_t;
866
867#define LSM6DSO32_WAKE_UP_THS 0x5BU
868typedef struct
869{
870#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
871 uint8_t wk_ths : 6;
872 uint8_t usr_off_on_wu : 1;
873 uint8_t single_double_tap : 1;
874#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
875 uint8_t single_double_tap : 1;
876 uint8_t usr_off_on_wu : 1;
877 uint8_t wk_ths : 6;
878#endif /* DRV_BYTE_ORDER */
879} lsm6dso32_wake_up_ths_t;
880
881#define LSM6DSO32_WAKE_UP_DUR 0x5CU
882typedef struct
883{
884#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
885 uint8_t sleep_dur : 4;
886 uint8_t wake_ths_w : 1;
887 uint8_t wake_dur : 2;
888 uint8_t ff_dur : 1;
889#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
890 uint8_t ff_dur : 1;
891 uint8_t wake_dur : 2;
892 uint8_t wake_ths_w : 1;
893 uint8_t sleep_dur : 4;
894#endif /* DRV_BYTE_ORDER */
895} lsm6dso32_wake_up_dur_t;
896
897#define LSM6DSO32_FREE_FALL 0x5DU
898typedef struct
899{
900#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
901 uint8_t ff_ths : 3;
902 uint8_t ff_dur : 5;
903#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
904 uint8_t ff_dur : 5;
905 uint8_t ff_ths : 3;
906#endif /* DRV_BYTE_ORDER */
907} lsm6dso32_free_fall_t;
908
909#define LSM6DSO32_MD1_CFG 0x5EU
910typedef struct
911{
912#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
913 uint8_t int1_shub : 1;
914 uint8_t int1_emb_func : 1;
915 uint8_t int1_6d : 1;
916 uint8_t int1_double_tap : 1;
917 uint8_t int1_ff : 1;
918 uint8_t int1_wu : 1;
919 uint8_t int1_single_tap : 1;
920 uint8_t int1_sleep_change : 1;
921#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
922 uint8_t int1_sleep_change : 1;
923 uint8_t int1_single_tap : 1;
924 uint8_t int1_wu : 1;
925 uint8_t int1_ff : 1;
926 uint8_t int1_double_tap : 1;
927 uint8_t int1_6d : 1;
928 uint8_t int1_emb_func : 1;
929 uint8_t int1_shub : 1;
930#endif /* DRV_BYTE_ORDER */
931} lsm6dso32_md1_cfg_t;
932
933#define LSM6DSO32_MD2_CFG 0x5FU
934typedef struct
935{
936#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
937 uint8_t int2_timestamp : 1;
938 uint8_t int2_emb_func : 1;
939 uint8_t int2_6d : 1;
940 uint8_t int2_double_tap : 1;
941 uint8_t int2_ff : 1;
942 uint8_t int2_wu : 1;
943 uint8_t int2_single_tap : 1;
944 uint8_t int2_sleep_change : 1;
945#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
946 uint8_t int2_sleep_change : 1;
947 uint8_t int2_single_tap : 1;
948 uint8_t int2_wu : 1;
949 uint8_t int2_ff : 1;
950 uint8_t int2_double_tap : 1;
951 uint8_t int2_6d : 1;
952 uint8_t int2_emb_func : 1;
953 uint8_t int2_timestamp : 1;
954#endif /* DRV_BYTE_ORDER */
955} lsm6dso32_md2_cfg_t;
956
957#define LSM6DSO32_I3C_BUS_AVB 0x62U
958typedef struct
959{
960#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
961 uint8_t pd_dis_int1 : 1;
962 uint8_t not_used_01 : 2;
963 uint8_t i3c_bus_avb_sel : 2;
964 uint8_t not_used_02 : 3;
965#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
966 uint8_t not_used_02 : 3;
967 uint8_t i3c_bus_avb_sel : 2;
968 uint8_t not_used_01 : 2;
969 uint8_t pd_dis_int1 : 1;
970#endif /* DRV_BYTE_ORDER */
971} lsm6dso32_i3c_bus_avb_t;
972
973#define LSM6DSO32_INTERNAL_FREQ_FINE 0x63U
974typedef struct
975{
976 uint8_t freq_fine : 8;
977} lsm6dso32_internal_freq_fine_t;
978
979#define LSM6DSO32_X_OFS_USR 0x73U
980#define LSM6DSO32_Y_OFS_USR 0x74U
981#define LSM6DSO32_Z_OFS_USR 0x75U
982#define LSM6DSO32_FIFO_DATA_OUT_TAG 0x78U
983typedef struct
984{
985#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
986 uint8_t tag_parity : 1;
987 uint8_t tag_cnt : 2;
988 uint8_t tag_sensor : 5;
989#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
990 uint8_t tag_sensor : 5;
991 uint8_t tag_cnt : 2;
992 uint8_t tag_parity : 1;
993#endif /* DRV_BYTE_ORDER */
994} lsm6dso32_fifo_data_out_tag_t;
995
996#define LSM6DSO32_FIFO_DATA_OUT_X_L 0x79U
997#define LSM6DSO32_FIFO_DATA_OUT_X_H 0x7AU
998#define LSM6DSO32_FIFO_DATA_OUT_Y_L 0x7BU
999#define LSM6DSO32_FIFO_DATA_OUT_Y_H 0x7CU
1000#define LSM6DSO32_FIFO_DATA_OUT_Z_L 0x7DU
1001#define LSM6DSO32_FIFO_DATA_OUT_Z_H 0x7EU
1002#define LSM6DSO32_PAGE_SEL 0x02U
1003typedef struct
1004{
1005#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1006 uint8_t not_used_01 : 4;
1007 uint8_t page_sel : 4;
1008#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1009 uint8_t page_sel : 4;
1010 uint8_t not_used_01 : 4;
1011#endif /* DRV_BYTE_ORDER */
1012} lsm6dso32_page_sel_t;
1013
1014#define LSM6DSO32_EMB_FUNC_EN_A 0x04U
1015typedef struct
1016{
1017#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1018 uint8_t not_used_01 : 3;
1019 uint8_t pedo_en : 1;
1020 uint8_t tilt_en : 1;
1021 uint8_t sign_motion_en : 1;
1022 uint8_t not_used_02 : 2;
1023#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1024 uint8_t not_used_02 : 2;
1025 uint8_t sign_motion_en : 1;
1026 uint8_t tilt_en : 1;
1027 uint8_t pedo_en : 1;
1028 uint8_t not_used_01 : 3;
1029#endif /* DRV_BYTE_ORDER */
1030} lsm6dso32_emb_func_en_a_t;
1031
1032#define LSM6DSO32_EMB_FUNC_EN_B 0x05U
1033typedef struct
1034{
1035#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1036 uint8_t fsm_en : 1;
1037 uint8_t not_used_01 : 2;
1038 uint8_t fifo_compr_en : 1;
1039 uint8_t pedo_adv_en : 1;
1040 uint8_t not_used_02 : 3;
1041#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1042 uint8_t not_used_02 : 3;
1043 uint8_t pedo_adv_en : 1;
1044 uint8_t fifo_compr_en : 1;
1045 uint8_t not_used_01 : 2;
1046 uint8_t fsm_en : 1;
1047#endif /* DRV_BYTE_ORDER */
1048} lsm6dso32_emb_func_en_b_t;
1049
1050#define LSM6DSO32_PAGE_ADDRESS 0x08U
1051typedef struct
1052{
1053 uint8_t page_addr : 8;
1054} lsm6dso32_page_address_t;
1055
1056#define LSM6DSO32_PAGE_VALUE 0x09U
1057typedef struct
1058{
1059 uint8_t page_value : 8;
1060} lsm6dso32_page_value_t;
1061
1062#define LSM6DSO32_EMB_FUNC_INT1 0x0AU
1063typedef struct
1064{
1065#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1066 uint8_t not_used_01 : 3;
1067 uint8_t int1_step_detector : 1;
1068 uint8_t int1_tilt : 1;
1069 uint8_t int1_sig_mot : 1;
1070 uint8_t not_used_02 : 1;
1071 uint8_t int1_fsm_lc : 1;
1072#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1073 uint8_t int1_fsm_lc : 1;
1074 uint8_t not_used_02 : 1;
1075 uint8_t int1_sig_mot : 1;
1076 uint8_t int1_tilt : 1;
1077 uint8_t int1_step_detector : 1;
1078 uint8_t not_used_01 : 3;
1079#endif /* DRV_BYTE_ORDER */
1080} lsm6dso32_emb_func_int1_t;
1081
1082#define LSM6DSO32_FSM_INT1_A 0x0BU
1083typedef struct
1084{
1085#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1086 uint8_t int1_fsm1 : 1;
1087 uint8_t int1_fsm2 : 1;
1088 uint8_t int1_fsm3 : 1;
1089 uint8_t int1_fsm4 : 1;
1090 uint8_t int1_fsm5 : 1;
1091 uint8_t int1_fsm6 : 1;
1092 uint8_t int1_fsm7 : 1;
1093 uint8_t int1_fsm8 : 1;
1094#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1095 uint8_t int1_fsm8 : 1;
1096 uint8_t int1_fsm7 : 1;
1097 uint8_t int1_fsm6 : 1;
1098 uint8_t int1_fsm5 : 1;
1099 uint8_t int1_fsm4 : 1;
1100 uint8_t int1_fsm3 : 1;
1101 uint8_t int1_fsm2 : 1;
1102 uint8_t int1_fsm1 : 1;
1103#endif /* DRV_BYTE_ORDER */
1104} lsm6dso32_fsm_int1_a_t;
1105
1106#define LSM6DSO32_FSM_INT1_B 0x0CU
1107typedef struct
1108{
1109#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1110 uint8_t int1_fsm9 : 1;
1111 uint8_t int1_fsm10 : 1;
1112 uint8_t int1_fsm11 : 1;
1113 uint8_t int1_fsm12 : 1;
1114 uint8_t int1_fsm13 : 1;
1115 uint8_t int1_fsm14 : 1;
1116 uint8_t int1_fsm15 : 1;
1117 uint8_t int1_fsm16 : 1;
1118#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1119 uint8_t int1_fsm16 : 1;
1120 uint8_t int1_fsm15 : 1;
1121 uint8_t int1_fsm14 : 1;
1122 uint8_t int1_fsm13 : 1;
1123 uint8_t int1_fsm12 : 1;
1124 uint8_t int1_fsm11 : 1;
1125 uint8_t int1_fsm10 : 1;
1126 uint8_t int1_fsm9 : 1;
1127#endif /* DRV_BYTE_ORDER */
1128} lsm6dso32_fsm_int1_b_t;
1129
1130#define LSM6DSO32_EMB_FUNC_INT2 0x0EU
1131typedef struct
1132{
1133#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1134 uint8_t not_used_01 : 3;
1135 uint8_t int2_step_detector : 1;
1136 uint8_t int2_tilt : 1;
1137 uint8_t int2_sig_mot : 1;
1138 uint8_t not_used_02 : 1;
1139 uint8_t int2_fsm_lc : 1;
1140#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1141 uint8_t int2_fsm_lc : 1;
1142 uint8_t not_used_02 : 1;
1143 uint8_t int2_sig_mot : 1;
1144 uint8_t int2_tilt : 1;
1145 uint8_t int2_step_detector : 1;
1146 uint8_t not_used_01 : 3;
1147#endif /* DRV_BYTE_ORDER */
1148} lsm6dso32_emb_func_int2_t;
1149
1150#define LSM6DSO32_FSM_INT2_A 0x0FU
1151typedef struct
1152{
1153#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1154 uint8_t int2_fsm1 : 1;
1155 uint8_t int2_fsm2 : 1;
1156 uint8_t int2_fsm3 : 1;
1157 uint8_t int2_fsm4 : 1;
1158 uint8_t int2_fsm5 : 1;
1159 uint8_t int2_fsm6 : 1;
1160 uint8_t int2_fsm7 : 1;
1161 uint8_t int2_fsm8 : 1;
1162#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1163 uint8_t int2_fsm8 : 1;
1164 uint8_t int2_fsm7 : 1;
1165 uint8_t int2_fsm6 : 1;
1166 uint8_t int2_fsm5 : 1;
1167 uint8_t int2_fsm4 : 1;
1168 uint8_t int2_fsm3 : 1;
1169 uint8_t int2_fsm2 : 1;
1170 uint8_t int2_fsm1 : 1;
1171#endif /* DRV_BYTE_ORDER */
1172} lsm6dso32_fsm_int2_a_t;
1173
1174#define LSM6DSO32_FSM_INT2_B 0x10U
1175typedef struct
1176{
1177#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1178 uint8_t int2_fsm9 : 1;
1179 uint8_t int2_fsm10 : 1;
1180 uint8_t int2_fsm11 : 1;
1181 uint8_t int2_fsm12 : 1;
1182 uint8_t int2_fsm13 : 1;
1183 uint8_t int2_fsm14 : 1;
1184 uint8_t int2_fsm15 : 1;
1185 uint8_t int2_fsm16 : 1;
1186#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1187 uint8_t int2_fsm16 : 1;
1188 uint8_t int2_fsm15 : 1;
1189 uint8_t int2_fsm14 : 1;
1190 uint8_t int2_fsm13 : 1;
1191 uint8_t int2_fsm12 : 1;
1192 uint8_t int2_fsm11 : 1;
1193 uint8_t int2_fsm10 : 1;
1194 uint8_t int2_fsm9 : 1;
1195#endif /* DRV_BYTE_ORDER */
1196} lsm6dso32_fsm_int2_b_t;
1197
1198#define LSM6DSO32_EMB_FUNC_STATUS 0x12U
1199typedef struct
1200{
1201#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1202 uint8_t not_used_01 : 3;
1203 uint8_t is_step_det : 1;
1204 uint8_t is_tilt : 1;
1205 uint8_t is_sigmot : 1;
1206 uint8_t not_used_02 : 1;
1207 uint8_t is_fsm_lc : 1;
1208#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1209 uint8_t is_fsm_lc : 1;
1210 uint8_t not_used_02 : 1;
1211 uint8_t is_sigmot : 1;
1212 uint8_t is_tilt : 1;
1213 uint8_t is_step_det : 1;
1214 uint8_t not_used_01 : 3;
1215#endif /* DRV_BYTE_ORDER */
1216} lsm6dso32_emb_func_status_t;
1217
1218#define LSM6DSO32_FSM_STATUS_A 0x13U
1219typedef struct
1220{
1221#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1222 uint8_t is_fsm1 : 1;
1223 uint8_t is_fsm2 : 1;
1224 uint8_t is_fsm3 : 1;
1225 uint8_t is_fsm4 : 1;
1226 uint8_t is_fsm5 : 1;
1227 uint8_t is_fsm6 : 1;
1228 uint8_t is_fsm7 : 1;
1229 uint8_t is_fsm8 : 1;
1230#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1231 uint8_t is_fsm8 : 1;
1232 uint8_t is_fsm7 : 1;
1233 uint8_t is_fsm6 : 1;
1234 uint8_t is_fsm5 : 1;
1235 uint8_t is_fsm4 : 1;
1236 uint8_t is_fsm3 : 1;
1237 uint8_t is_fsm2 : 1;
1238 uint8_t is_fsm1 : 1;
1239#endif /* DRV_BYTE_ORDER */
1240} lsm6dso32_fsm_status_a_t;
1241
1242#define LSM6DSO32_FSM_STATUS_B 0x14U
1243typedef struct
1244{
1245#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1246 uint8_t is_fsm9 : 1;
1247 uint8_t is_fsm10 : 1;
1248 uint8_t is_fsm11 : 1;
1249 uint8_t is_fsm12 : 1;
1250 uint8_t is_fsm13 : 1;
1251 uint8_t is_fsm14 : 1;
1252 uint8_t is_fsm15 : 1;
1253 uint8_t is_fsm16 : 1;
1254#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1255 uint8_t is_fsm16 : 1;
1256 uint8_t is_fsm15 : 1;
1257 uint8_t is_fsm14 : 1;
1258 uint8_t is_fsm13 : 1;
1259 uint8_t is_fsm12 : 1;
1260 uint8_t is_fsm11 : 1;
1261 uint8_t is_fsm10 : 1;
1262 uint8_t is_fsm9 : 1;
1263#endif /* DRV_BYTE_ORDER */
1264} lsm6dso32_fsm_status_b_t;
1265
1266#define LSM6DSO32_PAGE_RW 0x17U
1267typedef struct
1268{
1269#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1270 uint8_t not_used_01 : 5;
1271 uint8_t page_rw : 2; /* page_write + page_read */
1272 uint8_t emb_func_lir : 1;
1273#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1274 uint8_t emb_func_lir : 1;
1275 uint8_t page_rw : 2; /* page_write + page_read */
1276 uint8_t not_used_01 : 5;
1277#endif /* DRV_BYTE_ORDER */
1278} lsm6dso32_page_rw_t;
1279
1280#define LSM6DSO32_EMB_FUNC_FIFO_CFG 0x44U
1281typedef struct
1282{
1283#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1284 uint8_t not_used_00 : 6;
1285 uint8_t pedo_fifo_en : 1;
1286 uint8_t not_used_01 : 1;
1287#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1288 uint8_t not_used_01 : 1;
1289 uint8_t pedo_fifo_en : 1;
1290 uint8_t not_used_00 : 6;
1291#endif /* DRV_BYTE_ORDER */
1292} lsm6dso32_emb_func_fifo_cfg_t;
1293
1294#define LSM6DSO32_FSM_ENABLE_A 0x46U
1295typedef struct
1296{
1297#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1298 uint8_t fsm1_en : 1;
1299 uint8_t fsm2_en : 1;
1300 uint8_t fsm3_en : 1;
1301 uint8_t fsm4_en : 1;
1302 uint8_t fsm5_en : 1;
1303 uint8_t fsm6_en : 1;
1304 uint8_t fsm7_en : 1;
1305 uint8_t fsm8_en : 1;
1306#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1307 uint8_t fsm8_en : 1;
1308 uint8_t fsm7_en : 1;
1309 uint8_t fsm6_en : 1;
1310 uint8_t fsm5_en : 1;
1311 uint8_t fsm4_en : 1;
1312 uint8_t fsm3_en : 1;
1313 uint8_t fsm2_en : 1;
1314 uint8_t fsm1_en : 1;
1315#endif /* DRV_BYTE_ORDER */
1316} lsm6dso32_fsm_enable_a_t;
1317
1318#define LSM6DSO32_FSM_ENABLE_B 0x47U
1319typedef struct
1320{
1321#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1322 uint8_t fsm9_en : 1;
1323 uint8_t fsm10_en : 1;
1324 uint8_t fsm11_en : 1;
1325 uint8_t fsm12_en : 1;
1326 uint8_t fsm13_en : 1;
1327 uint8_t fsm14_en : 1;
1328 uint8_t fsm15_en : 1;
1329 uint8_t fsm16_en : 1;
1330#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1331 uint8_t fsm16_en : 1;
1332 uint8_t fsm15_en : 1;
1333 uint8_t fsm14_en : 1;
1334 uint8_t fsm13_en : 1;
1335 uint8_t fsm12_en : 1;
1336 uint8_t fsm11_en : 1;
1337 uint8_t fsm10_en : 1;
1338 uint8_t fsm9_en : 1;
1339#endif /* DRV_BYTE_ORDER */
1340} lsm6dso32_fsm_enable_b_t;
1341
1342#define LSM6DSO32_FSM_LONG_COUNTER_L 0x48U
1343#define LSM6DSO32_FSM_LONG_COUNTER_H 0x49U
1344#define LSM6DSO32_FSM_LONG_COUNTER_CLEAR 0x4AU
1345typedef struct
1346{
1347#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1348uint8_t fsm_lc_clr :
1349 2; /* fsm_lc_cleared + fsm_lc_clear */
1350 uint8_t not_used_01 : 6;
1351#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1352 uint8_t not_used_01 : 6;
1353uint8_t fsm_lc_clr :
1354 2; /* fsm_lc_cleared + fsm_lc_clear */
1355#endif /* DRV_BYTE_ORDER */
1356} lsm6dso32_fsm_long_counter_clear_t;
1357
1358#define LSM6DSO32_FSM_OUTS1 0x4CU
1359typedef struct
1360{
1361#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1362 uint8_t n_v : 1;
1363 uint8_t p_v : 1;
1364 uint8_t n_z : 1;
1365 uint8_t p_z : 1;
1366 uint8_t n_y : 1;
1367 uint8_t p_y : 1;
1368 uint8_t n_x : 1;
1369 uint8_t p_x : 1;
1370#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1371 uint8_t p_x : 1;
1372 uint8_t n_x : 1;
1373 uint8_t p_y : 1;
1374 uint8_t n_y : 1;
1375 uint8_t p_z : 1;
1376 uint8_t n_z : 1;
1377 uint8_t p_v : 1;
1378 uint8_t n_v : 1;
1379#endif /* DRV_BYTE_ORDER */
1380} lsm6dso32_fsm_outs1_t;
1381
1382#define LSM6DSO32_FSM_OUTS2 0x4DU
1383typedef struct
1384{
1385#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1386 uint8_t n_v : 1;
1387 uint8_t p_v : 1;
1388 uint8_t n_z : 1;
1389 uint8_t p_z : 1;
1390 uint8_t n_y : 1;
1391 uint8_t p_y : 1;
1392 uint8_t n_x : 1;
1393 uint8_t p_x : 1;
1394#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1395 uint8_t p_x : 1;
1396 uint8_t n_x : 1;
1397 uint8_t p_y : 1;
1398 uint8_t n_y : 1;
1399 uint8_t p_z : 1;
1400 uint8_t n_z : 1;
1401 uint8_t p_v : 1;
1402 uint8_t n_v : 1;
1403#endif /* DRV_BYTE_ORDER */
1404} lsm6dso32_fsm_outs2_t;
1405
1406#define LSM6DSO32_FSM_OUTS3 0x4EU
1407typedef struct
1408{
1409#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1410 uint8_t n_v : 1;
1411 uint8_t p_v : 1;
1412 uint8_t n_z : 1;
1413 uint8_t p_z : 1;
1414 uint8_t n_y : 1;
1415 uint8_t p_y : 1;
1416 uint8_t n_x : 1;
1417 uint8_t p_x : 1;
1418#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1419 uint8_t p_x : 1;
1420 uint8_t n_x : 1;
1421 uint8_t p_y : 1;
1422 uint8_t n_y : 1;
1423 uint8_t p_z : 1;
1424 uint8_t n_z : 1;
1425 uint8_t p_v : 1;
1426 uint8_t n_v : 1;
1427#endif /* DRV_BYTE_ORDER */
1428} lsm6dso32_fsm_outs3_t;
1429
1430#define LSM6DSO32_FSM_OUTS4 0x4FU
1431typedef struct
1432{
1433#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1434 uint8_t n_v : 1;
1435 uint8_t p_v : 1;
1436 uint8_t n_z : 1;
1437 uint8_t p_z : 1;
1438 uint8_t n_y : 1;
1439 uint8_t p_y : 1;
1440 uint8_t n_x : 1;
1441 uint8_t p_x : 1;
1442#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1443 uint8_t p_x : 1;
1444 uint8_t n_x : 1;
1445 uint8_t p_y : 1;
1446 uint8_t n_y : 1;
1447 uint8_t p_z : 1;
1448 uint8_t n_z : 1;
1449 uint8_t p_v : 1;
1450 uint8_t n_v : 1;
1451#endif /* DRV_BYTE_ORDER */
1452} lsm6dso32_fsm_outs4_t;
1453
1454#define LSM6DSO32_FSM_OUTS5 0x50U
1455typedef struct
1456{
1457#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1458 uint8_t n_v : 1;
1459 uint8_t p_v : 1;
1460 uint8_t n_z : 1;
1461 uint8_t p_z : 1;
1462 uint8_t n_y : 1;
1463 uint8_t p_y : 1;
1464 uint8_t n_x : 1;
1465 uint8_t p_x : 1;
1466#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1467 uint8_t p_x : 1;
1468 uint8_t n_x : 1;
1469 uint8_t p_y : 1;
1470 uint8_t n_y : 1;
1471 uint8_t p_z : 1;
1472 uint8_t n_z : 1;
1473 uint8_t p_v : 1;
1474 uint8_t n_v : 1;
1475#endif /* DRV_BYTE_ORDER */
1476} lsm6dso32_fsm_outs5_t;
1477
1478#define LSM6DSO32_FSM_OUTS6 0x51U
1479typedef struct
1480{
1481#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1482 uint8_t n_v : 1;
1483 uint8_t p_v : 1;
1484 uint8_t n_z : 1;
1485 uint8_t p_z : 1;
1486 uint8_t n_y : 1;
1487 uint8_t p_y : 1;
1488 uint8_t n_x : 1;
1489 uint8_t p_x : 1;
1490#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1491 uint8_t p_x : 1;
1492 uint8_t n_x : 1;
1493 uint8_t p_y : 1;
1494 uint8_t n_y : 1;
1495 uint8_t p_z : 1;
1496 uint8_t n_z : 1;
1497 uint8_t p_v : 1;
1498 uint8_t n_v : 1;
1499#endif /* DRV_BYTE_ORDER */
1500} lsm6dso32_fsm_outs6_t;
1501
1502#define LSM6DSO32_FSM_OUTS7 0x52U
1503typedef struct
1504{
1505#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1506 uint8_t n_v : 1;
1507 uint8_t p_v : 1;
1508 uint8_t n_z : 1;
1509 uint8_t p_z : 1;
1510 uint8_t n_y : 1;
1511 uint8_t p_y : 1;
1512 uint8_t n_x : 1;
1513 uint8_t p_x : 1;
1514#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1515 uint8_t p_x : 1;
1516 uint8_t n_x : 1;
1517 uint8_t p_y : 1;
1518 uint8_t n_y : 1;
1519 uint8_t p_z : 1;
1520 uint8_t n_z : 1;
1521 uint8_t p_v : 1;
1522 uint8_t n_v : 1;
1523#endif /* DRV_BYTE_ORDER */
1524} lsm6dso32_fsm_outs7_t;
1525
1526#define LSM6DSO32_FSM_OUTS8 0x53U
1527typedef struct
1528{
1529#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1530 uint8_t n_v : 1;
1531 uint8_t p_v : 1;
1532 uint8_t n_z : 1;
1533 uint8_t p_z : 1;
1534 uint8_t n_y : 1;
1535 uint8_t p_y : 1;
1536 uint8_t n_x : 1;
1537 uint8_t p_x : 1;
1538#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1539 uint8_t p_x : 1;
1540 uint8_t n_x : 1;
1541 uint8_t p_y : 1;
1542 uint8_t n_y : 1;
1543 uint8_t p_z : 1;
1544 uint8_t n_z : 1;
1545 uint8_t p_v : 1;
1546 uint8_t n_v : 1;
1547#endif /* DRV_BYTE_ORDER */
1548} lsm6dso32_fsm_outs8_t;
1549
1550#define LSM6DSO32_FSM_OUTS9 0x54U
1551typedef struct
1552{
1553#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1554 uint8_t n_v : 1;
1555 uint8_t p_v : 1;
1556 uint8_t n_z : 1;
1557 uint8_t p_z : 1;
1558 uint8_t n_y : 1;
1559 uint8_t p_y : 1;
1560 uint8_t n_x : 1;
1561 uint8_t p_x : 1;
1562#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1563 uint8_t p_x : 1;
1564 uint8_t n_x : 1;
1565 uint8_t p_y : 1;
1566 uint8_t n_y : 1;
1567 uint8_t p_z : 1;
1568 uint8_t n_z : 1;
1569 uint8_t p_v : 1;
1570 uint8_t n_v : 1;
1571#endif /* DRV_BYTE_ORDER */
1572} lsm6dso32_fsm_outs9_t;
1573
1574#define LSM6DSO32_FSM_OUTS10 0x55U
1575typedef struct
1576{
1577#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1578 uint8_t n_v : 1;
1579 uint8_t p_v : 1;
1580 uint8_t n_z : 1;
1581 uint8_t p_z : 1;
1582 uint8_t n_y : 1;
1583 uint8_t p_y : 1;
1584 uint8_t n_x : 1;
1585 uint8_t p_x : 1;
1586#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1587 uint8_t p_x : 1;
1588 uint8_t n_x : 1;
1589 uint8_t p_y : 1;
1590 uint8_t n_y : 1;
1591 uint8_t p_z : 1;
1592 uint8_t n_z : 1;
1593 uint8_t p_v : 1;
1594 uint8_t n_v : 1;
1595#endif /* DRV_BYTE_ORDER */
1596} lsm6dso32_fsm_outs10_t;
1597
1598#define LSM6DSO32_FSM_OUTS11 0x56U
1599typedef struct
1600{
1601#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1602 uint8_t n_v : 1;
1603 uint8_t p_v : 1;
1604 uint8_t n_z : 1;
1605 uint8_t p_z : 1;
1606 uint8_t n_y : 1;
1607 uint8_t p_y : 1;
1608 uint8_t n_x : 1;
1609 uint8_t p_x : 1;
1610#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1611 uint8_t p_x : 1;
1612 uint8_t n_x : 1;
1613 uint8_t p_y : 1;
1614 uint8_t n_y : 1;
1615 uint8_t p_z : 1;
1616 uint8_t n_z : 1;
1617 uint8_t p_v : 1;
1618 uint8_t n_v : 1;
1619#endif /* DRV_BYTE_ORDER */
1620} lsm6dso32_fsm_outs11_t;
1621
1622#define LSM6DSO32_FSM_OUTS12 0x57U
1623typedef struct
1624{
1625#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1626 uint8_t n_v : 1;
1627 uint8_t p_v : 1;
1628 uint8_t n_z : 1;
1629 uint8_t p_z : 1;
1630 uint8_t n_y : 1;
1631 uint8_t p_y : 1;
1632 uint8_t n_x : 1;
1633 uint8_t p_x : 1;
1634#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1635 uint8_t p_x : 1;
1636 uint8_t n_x : 1;
1637 uint8_t p_y : 1;
1638 uint8_t n_y : 1;
1639 uint8_t p_z : 1;
1640 uint8_t n_z : 1;
1641 uint8_t p_v : 1;
1642 uint8_t n_v : 1;
1643#endif /* DRV_BYTE_ORDER */
1644} lsm6dso32_fsm_outs12_t;
1645
1646#define LSM6DSO32_FSM_OUTS13 0x58U
1647typedef struct
1648{
1649#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1650 uint8_t n_v : 1;
1651 uint8_t p_v : 1;
1652 uint8_t n_z : 1;
1653 uint8_t p_z : 1;
1654 uint8_t n_y : 1;
1655 uint8_t p_y : 1;
1656 uint8_t n_x : 1;
1657 uint8_t p_x : 1;
1658#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1659 uint8_t p_x : 1;
1660 uint8_t n_x : 1;
1661 uint8_t p_y : 1;
1662 uint8_t n_y : 1;
1663 uint8_t p_z : 1;
1664 uint8_t n_z : 1;
1665 uint8_t p_v : 1;
1666 uint8_t n_v : 1;
1667#endif /* DRV_BYTE_ORDER */
1668} lsm6dso32_fsm_outs13_t;
1669
1670#define LSM6DSO32_FSM_OUTS14 0x59U
1671typedef struct
1672{
1673#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1674 uint8_t n_v : 1;
1675 uint8_t p_v : 1;
1676 uint8_t n_z : 1;
1677 uint8_t p_z : 1;
1678 uint8_t n_y : 1;
1679 uint8_t p_y : 1;
1680 uint8_t n_x : 1;
1681 uint8_t p_x : 1;
1682#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1683 uint8_t p_x : 1;
1684 uint8_t n_x : 1;
1685 uint8_t p_y : 1;
1686 uint8_t n_y : 1;
1687 uint8_t p_z : 1;
1688 uint8_t n_z : 1;
1689 uint8_t p_v : 1;
1690 uint8_t n_v : 1;
1691#endif /* DRV_BYTE_ORDER */
1692} lsm6dso32_fsm_outs14_t;
1693
1694#define LSM6DSO32_FSM_OUTS15 0x5AU
1695typedef struct
1696{
1697#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1698 uint8_t n_v : 1;
1699 uint8_t p_v : 1;
1700 uint8_t n_z : 1;
1701 uint8_t p_z : 1;
1702 uint8_t n_y : 1;
1703 uint8_t p_y : 1;
1704 uint8_t n_x : 1;
1705 uint8_t p_x : 1;
1706#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1707 uint8_t p_x : 1;
1708 uint8_t n_x : 1;
1709 uint8_t p_y : 1;
1710 uint8_t n_y : 1;
1711 uint8_t p_z : 1;
1712 uint8_t n_z : 1;
1713 uint8_t p_v : 1;
1714 uint8_t n_v : 1;
1715#endif /* DRV_BYTE_ORDER */
1716} lsm6dso32_fsm_outs15_t;
1717
1718#define LSM6DSO32_FSM_OUTS16 0x5BU
1719typedef struct
1720{
1721#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1722 uint8_t n_v : 1;
1723 uint8_t p_v : 1;
1724 uint8_t n_z : 1;
1725 uint8_t p_z : 1;
1726 uint8_t n_y : 1;
1727 uint8_t p_y : 1;
1728 uint8_t n_x : 1;
1729 uint8_t p_x : 1;
1730#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1731 uint8_t p_x : 1;
1732 uint8_t n_x : 1;
1733 uint8_t p_y : 1;
1734 uint8_t n_y : 1;
1735 uint8_t p_z : 1;
1736 uint8_t n_z : 1;
1737 uint8_t p_v : 1;
1738 uint8_t n_v : 1;
1739#endif /* DRV_BYTE_ORDER */
1740} lsm6dso32_fsm_outs16_t;
1741
1742#define LSM6DSO32_EMB_FUNC_ODR_CFG_B 0x5FU
1743typedef struct
1744{
1745#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1746 uint8_t not_used_01 : 3;
1747 uint8_t fsm_odr : 2;
1748 uint8_t not_used_02 : 3;
1749#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1750 uint8_t not_used_02 : 3;
1751 uint8_t fsm_odr : 2;
1752 uint8_t not_used_01 : 3;
1753#endif /* DRV_BYTE_ORDER */
1754} lsm6dso32_emb_func_odr_cfg_b_t;
1755
1756#define LSM6DSO32_STEP_COUNTER_L 0x62U
1757#define LSM6DSO32_STEP_COUNTER_H 0x63U
1758#define LSM6DSO32_EMB_FUNC_SRC 0x64U
1759typedef struct
1760{
1761#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1762 uint8_t not_used_01 : 2;
1763 uint8_t stepcounter_bit_set : 1;
1764 uint8_t step_overflow : 1;
1765 uint8_t step_count_delta_ia : 1;
1766 uint8_t step_detected : 1;
1767 uint8_t not_used_02 : 1;
1768 uint8_t pedo_rst_step : 1;
1769#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1770 uint8_t pedo_rst_step : 1;
1771 uint8_t not_used_02 : 1;
1772 uint8_t step_detected : 1;
1773 uint8_t step_count_delta_ia : 1;
1774 uint8_t step_overflow : 1;
1775 uint8_t stepcounter_bit_set : 1;
1776 uint8_t not_used_01 : 2;
1777#endif /* DRV_BYTE_ORDER */
1778} lsm6dso32_emb_func_src_t;
1779
1780#define LSM6DSO32_EMB_FUNC_INIT_A 0x66U
1781typedef struct
1782{
1783#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1784 uint8_t not_used_01 : 3;
1785 uint8_t step_det_init : 1;
1786 uint8_t tilt_init : 1;
1787 uint8_t sig_mot_init : 1;
1788 uint8_t not_used_02 : 2;
1789#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1790 uint8_t not_used_02 : 2;
1791 uint8_t sig_mot_init : 1;
1792 uint8_t tilt_init : 1;
1793 uint8_t step_det_init : 1;
1794 uint8_t not_used_01 : 3;
1795#endif /* DRV_BYTE_ORDER */
1796} lsm6dso32_emb_func_init_a_t;
1797
1798#define LSM6DSO32_EMB_FUNC_INIT_B 0x67U
1799typedef struct
1800{
1801#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1802 uint8_t fsm_init : 1;
1803 uint8_t not_used_01 : 2;
1804 uint8_t fifo_compr_init : 1;
1805 uint8_t not_used_02 : 4;
1806#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1807 uint8_t not_used_02 : 4;
1808 uint8_t fifo_compr_init : 1;
1809 uint8_t not_used_01 : 2;
1810 uint8_t fsm_init : 1;
1811#endif /* DRV_BYTE_ORDER */
1812} lsm6dso32_emb_func_init_b_t;
1813
1814#define LSM6DSO32_MAG_SENSITIVITY_L 0xBAU
1815#define LSM6DSO32_MAG_SENSITIVITY_H 0xBBU
1816#define LSM6DSO32_MAG_OFFX_L 0xC0U
1817#define LSM6DSO32_MAG_OFFX_H 0xC1U
1818#define LSM6DSO32_MAG_OFFY_L 0xC2U
1819#define LSM6DSO32_MAG_OFFY_H 0xC3U
1820#define LSM6DSO32_MAG_OFFZ_L 0xC4U
1821#define LSM6DSO32_MAG_OFFZ_H 0xC5U
1822#define LSM6DSO32_MAG_SI_XX_L 0xC6U
1823#define LSM6DSO32_MAG_SI_XX_H 0xC7U
1824#define LSM6DSO32_MAG_SI_XY_L 0xC8U
1825#define LSM6DSO32_MAG_SI_XY_H 0xC9U
1826#define LSM6DSO32_MAG_SI_XZ_L 0xCAU
1827#define LSM6DSO32_MAG_SI_XZ_H 0xCBU
1828#define LSM6DSO32_MAG_SI_YY_L 0xCCU
1829#define LSM6DSO32_MAG_SI_YY_H 0xCDU
1830#define LSM6DSO32_MAG_SI_YZ_L 0xCEU
1831#define LSM6DSO32_MAG_SI_YZ_H 0xCFU
1832#define LSM6DSO32_MAG_SI_ZZ_L 0xD0U
1833#define LSM6DSO32_MAG_SI_ZZ_H 0xD1U
1834#define LSM6DSO32_MAG_CFG_A 0xD4U
1835typedef struct
1836{
1837#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1838 uint8_t mag_z_axis : 3;
1839 uint8_t not_used_01 : 1;
1840 uint8_t mag_y_axis : 3;
1841 uint8_t not_used_02 : 1;
1842#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1843 uint8_t not_used_02 : 1;
1844 uint8_t mag_y_axis : 3;
1845 uint8_t not_used_01 : 1;
1846 uint8_t mag_z_axis : 3;
1847#endif /* DRV_BYTE_ORDER */
1848} lsm6dso32_mag_cfg_a_t;
1849
1850#define LSM6DSO32_MAG_CFG_B 0xD5U
1851typedef struct
1852{
1853#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1854 uint8_t mag_x_axis : 3;
1855 uint8_t not_used_01 : 5;
1856#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1857 uint8_t not_used_01 : 5;
1858 uint8_t mag_x_axis : 3;
1859#endif /* DRV_BYTE_ORDER */
1860} lsm6dso32_mag_cfg_b_t;
1861
1862#define LSM6DSO32_FSM_LC_TIMEOUT_L 0x17AU
1863#define LSM6DSO32_FSM_LC_TIMEOUT_H 0x17BU
1864#define LSM6DSO32_FSM_PROGRAMS 0x17CU
1865#define LSM6DSO32_FSM_START_ADD_L 0x17EU
1866#define LSM6DSO32_FSM_START_ADD_H 0x17FU
1867#define LSM6DSO32_PEDO_CMD_REG 0x183U
1868typedef struct
1869{
1870#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1871 uint8_t ad_det_en : 1;
1872 uint8_t not_used_01 : 1;
1873 uint8_t fp_rejection_en : 1;
1874 uint8_t carry_count_en : 1;
1875 uint8_t not_used_02 : 4;
1876#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1877 uint8_t not_used_02 : 4;
1878 uint8_t carry_count_en : 1;
1879 uint8_t fp_rejection_en : 1;
1880 uint8_t not_used_01 : 1;
1881 uint8_t ad_det_en : 1;
1882#endif /* DRV_BYTE_ORDER */
1883} lsm6dso32_pedo_cmd_reg_t;
1884
1885#define LSM6DSO32_PEDO_DEB_STEPS_CONF 0x184U
1886#define LSM6DSO32_PEDO_SC_DELTAT_L 0x1D0U
1887#define LSM6DSO32_PEDO_SC_DELTAT_H 0x1D1U
1888#define LSM6DSO32_SENSOR_HUB_1 0x02U
1889typedef struct
1890{
1891#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1892 uint8_t bit0 : 1;
1893 uint8_t bit1 : 1;
1894 uint8_t bit2 : 1;
1895 uint8_t bit3 : 1;
1896 uint8_t bit4 : 1;
1897 uint8_t bit5 : 1;
1898 uint8_t bit6 : 1;
1899 uint8_t bit7 : 1;
1900#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1901 uint8_t bit7 : 1;
1902 uint8_t bit6 : 1;
1903 uint8_t bit5 : 1;
1904 uint8_t bit4 : 1;
1905 uint8_t bit3 : 1;
1906 uint8_t bit2 : 1;
1907 uint8_t bit1 : 1;
1908 uint8_t bit0 : 1;
1909#endif /* DRV_BYTE_ORDER */
1910} lsm6dso32_sensor_hub_1_t;
1911
1912#define LSM6DSO32_SENSOR_HUB_2 0x03U
1913typedef struct
1914{
1915#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1916 uint8_t bit0 : 1;
1917 uint8_t bit1 : 1;
1918 uint8_t bit2 : 1;
1919 uint8_t bit3 : 1;
1920 uint8_t bit4 : 1;
1921 uint8_t bit5 : 1;
1922 uint8_t bit6 : 1;
1923 uint8_t bit7 : 1;
1924#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1925 uint8_t bit7 : 1;
1926 uint8_t bit6 : 1;
1927 uint8_t bit5 : 1;
1928 uint8_t bit4 : 1;
1929 uint8_t bit3 : 1;
1930 uint8_t bit2 : 1;
1931 uint8_t bit1 : 1;
1932 uint8_t bit0 : 1;
1933#endif /* DRV_BYTE_ORDER */
1934} lsm6dso32_sensor_hub_2_t;
1935
1936#define LSM6DSO32_SENSOR_HUB_3 0x04U
1937typedef struct
1938{
1939#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1940 uint8_t bit0 : 1;
1941 uint8_t bit1 : 1;
1942 uint8_t bit2 : 1;
1943 uint8_t bit3 : 1;
1944 uint8_t bit4 : 1;
1945 uint8_t bit5 : 1;
1946 uint8_t bit6 : 1;
1947 uint8_t bit7 : 1;
1948#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1949 uint8_t bit7 : 1;
1950 uint8_t bit6 : 1;
1951 uint8_t bit5 : 1;
1952 uint8_t bit4 : 1;
1953 uint8_t bit3 : 1;
1954 uint8_t bit2 : 1;
1955 uint8_t bit1 : 1;
1956 uint8_t bit0 : 1;
1957#endif /* DRV_BYTE_ORDER */
1958} lsm6dso32_sensor_hub_3_t;
1959
1960#define LSM6DSO32_SENSOR_HUB_4 0x05U
1961typedef struct
1962{
1963#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1964 uint8_t bit0 : 1;
1965 uint8_t bit1 : 1;
1966 uint8_t bit2 : 1;
1967 uint8_t bit3 : 1;
1968 uint8_t bit4 : 1;
1969 uint8_t bit5 : 1;
1970 uint8_t bit6 : 1;
1971 uint8_t bit7 : 1;
1972#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1973 uint8_t bit7 : 1;
1974 uint8_t bit6 : 1;
1975 uint8_t bit5 : 1;
1976 uint8_t bit4 : 1;
1977 uint8_t bit3 : 1;
1978 uint8_t bit2 : 1;
1979 uint8_t bit1 : 1;
1980 uint8_t bit0 : 1;
1981#endif /* DRV_BYTE_ORDER */
1982} lsm6dso32_sensor_hub_4_t;
1983
1984#define LSM6DSO32_SENSOR_HUB_5 0x06U
1985typedef struct
1986{
1987#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
1988 uint8_t bit0 : 1;
1989 uint8_t bit1 : 1;
1990 uint8_t bit2 : 1;
1991 uint8_t bit3 : 1;
1992 uint8_t bit4 : 1;
1993 uint8_t bit5 : 1;
1994 uint8_t bit6 : 1;
1995 uint8_t bit7 : 1;
1996#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
1997 uint8_t bit7 : 1;
1998 uint8_t bit6 : 1;
1999 uint8_t bit5 : 1;
2000 uint8_t bit4 : 1;
2001 uint8_t bit3 : 1;
2002 uint8_t bit2 : 1;
2003 uint8_t bit1 : 1;
2004 uint8_t bit0 : 1;
2005#endif /* DRV_BYTE_ORDER */
2006} lsm6dso32_sensor_hub_5_t;
2007
2008#define LSM6DSO32_SENSOR_HUB_6 0x07U
2009typedef struct
2010{
2011#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
2012 uint8_t bit0 : 1;
2013 uint8_t bit1 : 1;
2014 uint8_t bit2 : 1;
2015 uint8_t bit3 : 1;
2016 uint8_t bit4 : 1;
2017 uint8_t bit5 : 1;
2018 uint8_t bit6 : 1;
2019 uint8_t bit7 : 1;
2020#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
2021 uint8_t bit7 : 1;
2022 uint8_t bit6 : 1;
2023 uint8_t bit5 : 1;
2024 uint8_t bit4 : 1;
2025 uint8_t bit3 : 1;
2026 uint8_t bit2 : 1;
2027 uint8_t bit1 : 1;
2028 uint8_t bit0 : 1;
2029#endif /* DRV_BYTE_ORDER */
2030} lsm6dso32_sensor_hub_6_t;
2031
2032#define LSM6DSO32_SENSOR_HUB_7 0x08U
2033typedef struct
2034{
2035#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
2036 uint8_t bit0 : 1;
2037 uint8_t bit1 : 1;
2038 uint8_t bit2 : 1;
2039 uint8_t bit3 : 1;
2040 uint8_t bit4 : 1;
2041 uint8_t bit5 : 1;
2042 uint8_t bit6 : 1;
2043 uint8_t bit7 : 1;
2044#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
2045 uint8_t bit7 : 1;
2046 uint8_t bit6 : 1;
2047 uint8_t bit5 : 1;
2048 uint8_t bit4 : 1;
2049 uint8_t bit3 : 1;
2050 uint8_t bit2 : 1;
2051 uint8_t bit1 : 1;
2052 uint8_t bit0 : 1;
2053#endif /* DRV_BYTE_ORDER */
2054} lsm6dso32_sensor_hub_7_t;
2055
2056#define LSM6DSO32_SENSOR_HUB_8 0x09U
2057typedef struct
2058{
2059#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
2060 uint8_t bit0 : 1;
2061 uint8_t bit1 : 1;
2062 uint8_t bit2 : 1;
2063 uint8_t bit3 : 1;
2064 uint8_t bit4 : 1;
2065 uint8_t bit5 : 1;
2066 uint8_t bit6 : 1;
2067 uint8_t bit7 : 1;
2068#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
2069 uint8_t bit7 : 1;
2070 uint8_t bit6 : 1;
2071 uint8_t bit5 : 1;
2072 uint8_t bit4 : 1;
2073 uint8_t bit3 : 1;
2074 uint8_t bit2 : 1;
2075 uint8_t bit1 : 1;
2076 uint8_t bit0 : 1;
2077#endif /* DRV_BYTE_ORDER */
2078} lsm6dso32_sensor_hub_8_t;
2079
2080#define LSM6DSO32_SENSOR_HUB_9 0x0AU
2081typedef struct
2082{
2083#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
2084 uint8_t bit0 : 1;
2085 uint8_t bit1 : 1;
2086 uint8_t bit2 : 1;
2087 uint8_t bit3 : 1;
2088 uint8_t bit4 : 1;
2089 uint8_t bit5 : 1;
2090 uint8_t bit6 : 1;
2091 uint8_t bit7 : 1;
2092#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
2093 uint8_t bit7 : 1;
2094 uint8_t bit6 : 1;
2095 uint8_t bit5 : 1;
2096 uint8_t bit4 : 1;
2097 uint8_t bit3 : 1;
2098 uint8_t bit2 : 1;
2099 uint8_t bit1 : 1;
2100 uint8_t bit0 : 1;
2101#endif /* DRV_BYTE_ORDER */
2102} lsm6dso32_sensor_hub_9_t;
2103
2104#define LSM6DSO32_SENSOR_HUB_10 0x0BU
2105typedef struct
2106{
2107#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
2108 uint8_t bit0 : 1;
2109 uint8_t bit1 : 1;
2110 uint8_t bit2 : 1;
2111 uint8_t bit3 : 1;
2112 uint8_t bit4 : 1;
2113 uint8_t bit5 : 1;
2114 uint8_t bit6 : 1;
2115 uint8_t bit7 : 1;
2116#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
2117 uint8_t bit7 : 1;
2118 uint8_t bit6 : 1;
2119 uint8_t bit5 : 1;
2120 uint8_t bit4 : 1;
2121 uint8_t bit3 : 1;
2122 uint8_t bit2 : 1;
2123 uint8_t bit1 : 1;
2124 uint8_t bit0 : 1;
2125#endif /* DRV_BYTE_ORDER */
2126} lsm6dso32_sensor_hub_10_t;
2127
2128#define LSM6DSO32_SENSOR_HUB_11 0x0CU
2129typedef struct
2130{
2131#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
2132 uint8_t bit0 : 1;
2133 uint8_t bit1 : 1;
2134 uint8_t bit2 : 1;
2135 uint8_t bit3 : 1;
2136 uint8_t bit4 : 1;
2137 uint8_t bit5 : 1;
2138 uint8_t bit6 : 1;
2139 uint8_t bit7 : 1;
2140#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
2141 uint8_t bit7 : 1;
2142 uint8_t bit6 : 1;
2143 uint8_t bit5 : 1;
2144 uint8_t bit4 : 1;
2145 uint8_t bit3 : 1;
2146 uint8_t bit2 : 1;
2147 uint8_t bit1 : 1;
2148 uint8_t bit0 : 1;
2149#endif /* DRV_BYTE_ORDER */
2150} lsm6dso32_sensor_hub_11_t;
2151
2152#define LSM6DSO32_SENSOR_HUB_12 0x0DU
2153typedef struct
2154{
2155#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
2156 uint8_t bit0 : 1;
2157 uint8_t bit1 : 1;
2158 uint8_t bit2 : 1;
2159 uint8_t bit3 : 1;
2160 uint8_t bit4 : 1;
2161 uint8_t bit5 : 1;
2162 uint8_t bit6 : 1;
2163 uint8_t bit7 : 1;
2164#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
2165 uint8_t bit7 : 1;
2166 uint8_t bit6 : 1;
2167 uint8_t bit5 : 1;
2168 uint8_t bit4 : 1;
2169 uint8_t bit3 : 1;
2170 uint8_t bit2 : 1;
2171 uint8_t bit1 : 1;
2172 uint8_t bit0 : 1;
2173#endif /* DRV_BYTE_ORDER */
2174} lsm6dso32_sensor_hub_12_t;
2175
2176#define LSM6DSO32_SENSOR_HUB_13 0x0EU
2177typedef struct
2178{
2179#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
2180 uint8_t bit0 : 1;
2181 uint8_t bit1 : 1;
2182 uint8_t bit2 : 1;
2183 uint8_t bit3 : 1;
2184 uint8_t bit4 : 1;
2185 uint8_t bit5 : 1;
2186 uint8_t bit6 : 1;
2187 uint8_t bit7 : 1;
2188#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
2189 uint8_t bit7 : 1;
2190 uint8_t bit6 : 1;
2191 uint8_t bit5 : 1;
2192 uint8_t bit4 : 1;
2193 uint8_t bit3 : 1;
2194 uint8_t bit2 : 1;
2195 uint8_t bit1 : 1;
2196 uint8_t bit0 : 1;
2197#endif /* DRV_BYTE_ORDER */
2198} lsm6dso32_sensor_hub_13_t;
2199
2200#define LSM6DSO32_SENSOR_HUB_14 0x0FU
2201typedef struct
2202{
2203#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
2204 uint8_t bit0 : 1;
2205 uint8_t bit1 : 1;
2206 uint8_t bit2 : 1;
2207 uint8_t bit3 : 1;
2208 uint8_t bit4 : 1;
2209 uint8_t bit5 : 1;
2210 uint8_t bit6 : 1;
2211 uint8_t bit7 : 1;
2212#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
2213 uint8_t bit7 : 1;
2214 uint8_t bit6 : 1;
2215 uint8_t bit5 : 1;
2216 uint8_t bit4 : 1;
2217 uint8_t bit3 : 1;
2218 uint8_t bit2 : 1;
2219 uint8_t bit1 : 1;
2220 uint8_t bit0 : 1;
2221#endif /* DRV_BYTE_ORDER */
2222} lsm6dso32_sensor_hub_14_t;
2223
2224#define LSM6DSO32_SENSOR_HUB_15 0x10U
2225typedef struct
2226{
2227#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
2228 uint8_t bit0 : 1;
2229 uint8_t bit1 : 1;
2230 uint8_t bit2 : 1;
2231 uint8_t bit3 : 1;
2232 uint8_t bit4 : 1;
2233 uint8_t bit5 : 1;
2234 uint8_t bit6 : 1;
2235 uint8_t bit7 : 1;
2236#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
2237 uint8_t bit7 : 1;
2238 uint8_t bit6 : 1;
2239 uint8_t bit5 : 1;
2240 uint8_t bit4 : 1;
2241 uint8_t bit3 : 1;
2242 uint8_t bit2 : 1;
2243 uint8_t bit1 : 1;
2244 uint8_t bit0 : 1;
2245#endif /* DRV_BYTE_ORDER */
2246} lsm6dso32_sensor_hub_15_t;
2247
2248#define LSM6DSO32_SENSOR_HUB_16 0x11U
2249typedef struct
2250{
2251#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
2252 uint8_t bit0 : 1;
2253 uint8_t bit1 : 1;
2254 uint8_t bit2 : 1;
2255 uint8_t bit3 : 1;
2256 uint8_t bit4 : 1;
2257 uint8_t bit5 : 1;
2258 uint8_t bit6 : 1;
2259 uint8_t bit7 : 1;
2260#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
2261 uint8_t bit7 : 1;
2262 uint8_t bit6 : 1;
2263 uint8_t bit5 : 1;
2264 uint8_t bit4 : 1;
2265 uint8_t bit3 : 1;
2266 uint8_t bit2 : 1;
2267 uint8_t bit1 : 1;
2268 uint8_t bit0 : 1;
2269#endif /* DRV_BYTE_ORDER */
2270} lsm6dso32_sensor_hub_16_t;
2271
2272#define LSM6DSO32_SENSOR_HUB_17 0x12U
2273typedef struct
2274{
2275#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
2276 uint8_t bit0 : 1;
2277 uint8_t bit1 : 1;
2278 uint8_t bit2 : 1;
2279 uint8_t bit3 : 1;
2280 uint8_t bit4 : 1;
2281 uint8_t bit5 : 1;
2282 uint8_t bit6 : 1;
2283 uint8_t bit7 : 1;
2284#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
2285 uint8_t bit7 : 1;
2286 uint8_t bit6 : 1;
2287 uint8_t bit5 : 1;
2288 uint8_t bit4 : 1;
2289 uint8_t bit3 : 1;
2290 uint8_t bit2 : 1;
2291 uint8_t bit1 : 1;
2292 uint8_t bit0 : 1;
2293#endif /* DRV_BYTE_ORDER */
2294} lsm6dso32_sensor_hub_17_t;
2295
2296#define LSM6DSO32_SENSOR_HUB_18 0x13U
2297typedef struct
2298{
2299#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
2300 uint8_t bit0 : 1;
2301 uint8_t bit1 : 1;
2302 uint8_t bit2 : 1;
2303 uint8_t bit3 : 1;
2304 uint8_t bit4 : 1;
2305 uint8_t bit5 : 1;
2306 uint8_t bit6 : 1;
2307 uint8_t bit7 : 1;
2308#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
2309 uint8_t bit7 : 1;
2310 uint8_t bit6 : 1;
2311 uint8_t bit5 : 1;
2312 uint8_t bit4 : 1;
2313 uint8_t bit3 : 1;
2314 uint8_t bit2 : 1;
2315 uint8_t bit1 : 1;
2316 uint8_t bit0 : 1;
2317#endif /* DRV_BYTE_ORDER */
2318} lsm6dso32_sensor_hub_18_t;
2319
2320#define LSM6DSO32_MASTER_CONFIG 0x14U
2321typedef struct
2322{
2323#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
2324 uint8_t aux_sens_on : 2;
2325 uint8_t master_on : 1;
2326 uint8_t shub_pu_en : 1;
2327 uint8_t pass_through_mode : 1;
2328 uint8_t start_config : 1;
2329 uint8_t write_once : 1;
2330 uint8_t rst_master_regs : 1;
2331#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
2332 uint8_t rst_master_regs : 1;
2333 uint8_t write_once : 1;
2334 uint8_t start_config : 1;
2335 uint8_t pass_through_mode : 1;
2336 uint8_t shub_pu_en : 1;
2337 uint8_t master_on : 1;
2338 uint8_t aux_sens_on : 2;
2339#endif /* DRV_BYTE_ORDER */
2340} lsm6dso32_master_config_t;
2341
2342#define LSM6DSO32_SLV0_ADD 0x15U
2343typedef struct
2344{
2345#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
2346 uint8_t rw_0 : 1;
2347 uint8_t slave0 : 7;
2348#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
2349 uint8_t slave0 : 7;
2350 uint8_t rw_0 : 1;
2351#endif /* DRV_BYTE_ORDER */
2352} lsm6dso32_slv0_add_t;
2353
2354#define LSM6DSO32_SLV0_SUBADD 0x16U
2355typedef struct
2356{
2357 uint8_t slave0_reg : 8;
2358} lsm6dso32_slv0_subadd_t;
2359
2360#define LSM6DSO32_SLV0_CONFIG 0x17U
2361typedef struct
2362{
2363#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
2364 uint8_t slave0_numop : 3;
2365 uint8_t batch_ext_sens_0_en : 1;
2366 uint8_t not_used_01 : 2;
2367 uint8_t shub_odr : 2;
2368#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
2369 uint8_t shub_odr : 2;
2370 uint8_t not_used_01 : 2;
2371 uint8_t batch_ext_sens_0_en : 1;
2372 uint8_t slave0_numop : 3;
2373#endif /* DRV_BYTE_ORDER */
2374} lsm6dso32_slv0_config_t;
2375
2376#define LSM6DSO32_SLV1_ADD 0x18U
2377typedef struct
2378{
2379#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
2380 uint8_t r_1 : 1;
2381 uint8_t slave1_add : 7;
2382#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
2383 uint8_t slave1_add : 7;
2384 uint8_t r_1 : 1;
2385#endif /* DRV_BYTE_ORDER */
2386} lsm6dso32_slv1_add_t;
2387
2388#define LSM6DSO32_SLV1_SUBADD 0x19U
2389typedef struct
2390{
2391 uint8_t slave1_reg : 8;
2392} lsm6dso32_slv1_subadd_t;
2393
2394#define LSM6DSO32_SLV1_CONFIG 0x1AU
2395typedef struct
2396{
2397#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
2398 uint8_t slave1_numop : 3;
2399 uint8_t batch_ext_sens_1_en : 1;
2400 uint8_t not_used_01 : 4;
2401#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
2402 uint8_t not_used_01 : 4;
2403 uint8_t batch_ext_sens_1_en : 1;
2404 uint8_t slave1_numop : 3;
2405#endif /* DRV_BYTE_ORDER */
2406} lsm6dso32_slv1_config_t;
2407
2408#define LSM6DSO32_SLV2_ADD 0x1BU
2409typedef struct
2410{
2411#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
2412 uint8_t r_2 : 1;
2413 uint8_t slave2_add : 7;
2414#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
2415 uint8_t slave2_add : 7;
2416 uint8_t r_2 : 1;
2417#endif /* DRV_BYTE_ORDER */
2418} lsm6dso32_slv2_add_t;
2419
2420#define LSM6DSO32_SLV2_SUBADD 0x1CU
2421typedef struct
2422{
2423 uint8_t slave2_reg : 8;
2424} lsm6dso32_slv2_subadd_t;
2425
2426#define LSM6DSO32_SLV2_CONFIG 0x1DU
2427typedef struct
2428{
2429#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
2430 uint8_t slave2_numop : 3;
2431 uint8_t batch_ext_sens_2_en : 1;
2432 uint8_t not_used_01 : 4;
2433#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
2434 uint8_t not_used_01 : 4;
2435 uint8_t batch_ext_sens_2_en : 1;
2436 uint8_t slave2_numop : 3;
2437#endif /* DRV_BYTE_ORDER */
2438} lsm6dso32_slv2_config_t;
2439
2440#define LSM6DSO32_SLV3_ADD 0x1EU
2441typedef struct
2442{
2443#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
2444 uint8_t r_3 : 1;
2445 uint8_t slave3_add : 7;
2446#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
2447 uint8_t slave3_add : 7;
2448 uint8_t r_3 : 1;
2449#endif /* DRV_BYTE_ORDER */
2450} lsm6dso32_slv3_add_t;
2451
2452#define LSM6DSO32_SLV3_SUBADD 0x1FU
2453typedef struct
2454{
2455 uint8_t slave3_reg : 8;
2456} lsm6dso32_slv3_subadd_t;
2457
2458#define LSM6DSO32_SLV3_CONFIG 0x20U
2459typedef struct
2460{
2461#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
2462 uint8_t slave3_numop : 3;
2463 uint8_t batch_ext_sens_3_en : 1;
2464 uint8_t not_used_01 : 4;
2465#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
2466 uint8_t not_used_01 : 4;
2467 uint8_t batch_ext_sens_3_en : 1;
2468 uint8_t slave3_numop : 3;
2469#endif /* DRV_BYTE_ORDER */
2470} lsm6dso32_slv3_config_t;
2471
2472#define LSM6DSO32_DATAWRITE_SLV0 0x21U
2473typedef struct
2474{
2475 uint8_t slave0_dataw : 8;
2476} lsm6dso32_datawrite_src_mode_sub_slv0_t;
2477
2478#define LSM6DSO32_STATUS_MASTER 0x22U
2479typedef struct
2480{
2481#if DRV_BYTE_ORDER == DRV_LITTLE_ENDIAN
2482 uint8_t sens_hub_endop : 1;
2483 uint8_t not_used_01 : 2;
2484 uint8_t slave0_nack : 1;
2485 uint8_t slave1_nack : 1;
2486 uint8_t slave2_nack : 1;
2487 uint8_t slave3_nack : 1;
2488 uint8_t wr_once_done : 1;
2489#elif DRV_BYTE_ORDER == DRV_BIG_ENDIAN
2490 uint8_t wr_once_done : 1;
2491 uint8_t slave3_nack : 1;
2492 uint8_t slave2_nack : 1;
2493 uint8_t slave1_nack : 1;
2494 uint8_t slave0_nack : 1;
2495 uint8_t not_used_01 : 2;
2496 uint8_t sens_hub_endop : 1;
2497#endif /* DRV_BYTE_ORDER */
2498} lsm6dso32_status_master_t;
2499
2513typedef union
2514{
2515 lsm6dso32_func_cfg_access_t func_cfg_access;
2516 lsm6dso32_pin_ctrl_t pin_ctrl;
2517 lsm6dso32_fifo_ctrl1_t fifo_ctrl1;
2518 lsm6dso32_fifo_ctrl2_t fifo_ctrl2;
2519 lsm6dso32_fifo_ctrl3_t fifo_ctrl3;
2520 lsm6dso32_fifo_ctrl4_t fifo_ctrl4;
2521 lsm6dso32_counter_bdr_reg1_t counter_bdr_reg1;
2522 lsm6dso32_counter_bdr_reg2_t counter_bdr_reg2;
2523 lsm6dso32_int1_ctrl_t int1_ctrl;
2524 lsm6dso32_int2_ctrl_t int2_ctrl;
2525 lsm6dso32_ctrl1_xl_t ctrl1_xl;
2526 lsm6dso32_ctrl2_g_t ctrl2_g;
2527 lsm6dso32_ctrl3_c_t ctrl3_c;
2528 lsm6dso32_ctrl4_c_t ctrl4_c;
2529 lsm6dso32_ctrl5_c_t ctrl5_c;
2530 lsm6dso32_ctrl6_c_t ctrl6_c;
2531 lsm6dso32_ctrl7_g_t ctrl7_g;
2532 lsm6dso32_ctrl8_xl_t ctrl8_xl;
2533 lsm6dso32_ctrl9_xl_t ctrl9_xl;
2534 lsm6dso32_ctrl10_c_t ctrl10_c;
2535 lsm6dso32_all_int_src_t all_int_src;
2536 lsm6dso32_wake_up_src_t wake_up_src;
2537 lsm6dso32_tap_src_t tap_src;
2538 lsm6dso32_d6d_src_t d6d_src;
2539 lsm6dso32_status_reg_t status_reg;
2540 lsm6dso32_fifo_status1_t fifo_status1;
2541 lsm6dso32_fifo_status2_t fifo_status2;
2542 lsm6dso32_tap_cfg0_t tap_cfg0;
2543 lsm6dso32_tap_cfg1_t tap_cfg1;
2544 lsm6dso32_tap_cfg2_t tap_cfg2;
2545 lsm6dso32_tap_ths_6d_t tap_ths_6d;
2546 lsm6dso32_int_dur2_t int_dur2;
2547 lsm6dso32_wake_up_ths_t wake_up_ths;
2548 lsm6dso32_wake_up_dur_t wake_up_dur;
2549 lsm6dso32_free_fall_t free_fall;
2550 lsm6dso32_md1_cfg_t md1_cfg;
2551 lsm6dso32_md2_cfg_t md2_cfg;
2552 lsm6dso32_i3c_bus_avb_t i3c_bus_avb;
2553 lsm6dso32_internal_freq_fine_t internal_freq_fine;
2554 lsm6dso32_fifo_data_out_tag_t fifo_data_out_tag;
2555 lsm6dso32_page_sel_t page_sel;
2556 lsm6dso32_emb_func_en_a_t emb_func_en_a;
2557 lsm6dso32_emb_func_en_b_t emb_func_en_b;
2558 lsm6dso32_page_address_t page_address;
2559 lsm6dso32_page_value_t page_value;
2560 lsm6dso32_emb_func_int1_t emb_func_int1;
2561 lsm6dso32_fsm_int1_a_t fsm_int1_a;
2562 lsm6dso32_fsm_int1_b_t fsm_int1_b;
2563 lsm6dso32_emb_func_int2_t emb_func_int2;
2564 lsm6dso32_fsm_int2_a_t fsm_int2_a;
2565 lsm6dso32_fsm_int2_b_t fsm_int2_b;
2566 lsm6dso32_emb_func_status_t emb_func_status;
2567 lsm6dso32_fsm_status_a_t fsm_status_a;
2568 lsm6dso32_fsm_status_b_t fsm_status_b;
2569 lsm6dso32_page_rw_t page_rw;
2570 lsm6dso32_emb_func_fifo_cfg_t emb_func_fifo_cfg;
2571 lsm6dso32_fsm_enable_a_t fsm_enable_a;
2572 lsm6dso32_fsm_enable_b_t fsm_enable_b;
2573 lsm6dso32_fsm_long_counter_clear_t fsm_long_counter_clear;
2574 lsm6dso32_fsm_outs1_t fsm_outs1;
2575 lsm6dso32_fsm_outs2_t fsm_outs2;
2576 lsm6dso32_fsm_outs3_t fsm_outs3;
2577 lsm6dso32_fsm_outs4_t fsm_outs4;
2578 lsm6dso32_fsm_outs5_t fsm_outs5;
2579 lsm6dso32_fsm_outs6_t fsm_outs6;
2580 lsm6dso32_fsm_outs7_t fsm_outs7;
2581 lsm6dso32_fsm_outs8_t fsm_outs8;
2582 lsm6dso32_fsm_outs9_t fsm_outs9;
2583 lsm6dso32_fsm_outs10_t fsm_outs10;
2584 lsm6dso32_fsm_outs11_t fsm_outs11;
2585 lsm6dso32_fsm_outs12_t fsm_outs12;
2586 lsm6dso32_fsm_outs13_t fsm_outs13;
2587 lsm6dso32_fsm_outs14_t fsm_outs14;
2588 lsm6dso32_fsm_outs15_t fsm_outs15;
2589 lsm6dso32_fsm_outs16_t fsm_outs16;
2590 lsm6dso32_emb_func_odr_cfg_b_t emb_func_odr_cfg_b;
2591 lsm6dso32_emb_func_src_t emb_func_src;
2592 lsm6dso32_emb_func_init_a_t emb_func_init_a;
2593 lsm6dso32_emb_func_init_b_t emb_func_init_b;
2594 lsm6dso32_mag_cfg_a_t mag_cfg_a;
2595 lsm6dso32_mag_cfg_b_t mag_cfg_b;
2596 lsm6dso32_pedo_cmd_reg_t pedo_cmd_reg;
2597 lsm6dso32_sensor_hub_1_t sensor_hub_1;
2598 lsm6dso32_sensor_hub_2_t sensor_hub_2;
2599 lsm6dso32_sensor_hub_3_t sensor_hub_3;
2600 lsm6dso32_sensor_hub_4_t sensor_hub_4;
2601 lsm6dso32_sensor_hub_5_t sensor_hub_5;
2602 lsm6dso32_sensor_hub_6_t sensor_hub_6;
2603 lsm6dso32_sensor_hub_7_t sensor_hub_7;
2604 lsm6dso32_sensor_hub_8_t sensor_hub_8;
2605 lsm6dso32_sensor_hub_9_t sensor_hub_9;
2606 lsm6dso32_sensor_hub_10_t sensor_hub_10;
2607 lsm6dso32_sensor_hub_11_t sensor_hub_11;
2608 lsm6dso32_sensor_hub_12_t sensor_hub_12;
2609 lsm6dso32_sensor_hub_13_t sensor_hub_13;
2610 lsm6dso32_sensor_hub_14_t sensor_hub_14;
2611 lsm6dso32_sensor_hub_15_t sensor_hub_15;
2612 lsm6dso32_sensor_hub_16_t sensor_hub_16;
2613 lsm6dso32_sensor_hub_17_t sensor_hub_17;
2614 lsm6dso32_sensor_hub_18_t sensor_hub_18;
2615 lsm6dso32_master_config_t master_config;
2616 lsm6dso32_slv0_add_t slv0_add;
2617 lsm6dso32_slv0_subadd_t slv0_subadd;
2618 lsm6dso32_slv0_config_t slv0_config;
2619 lsm6dso32_slv1_add_t slv1_add;
2620 lsm6dso32_slv1_subadd_t slv1_subadd;
2621 lsm6dso32_slv1_config_t slv1_config;
2622 lsm6dso32_slv2_add_t slv2_add;
2623 lsm6dso32_slv2_subadd_t slv2_subadd;
2624 lsm6dso32_slv2_config_t slv2_config;
2625 lsm6dso32_slv3_add_t slv3_add;
2626 lsm6dso32_slv3_subadd_t slv3_subadd;
2627 lsm6dso32_slv3_config_t slv3_config;
2628 lsm6dso32_datawrite_src_mode_sub_slv0_t datawrite_src_mode_sub_slv0;
2629 lsm6dso32_status_master_t status_master;
2630 bitwise_t bitwise;
2631 uint8_t byte;
2632} lsm6dso32_reg_t;
2633
2639#ifndef __weak
2640#define __weak __attribute__((weak))
2641#endif /* __weak */
2642
2643/*
2644 * These are the basic platform dependent I/O routines to read
2645 * and write device registers connected on a standard bus.
2646 * The driver keeps offering a default implementation based on function
2647 * pointers to read/write routines for backward compatibility.
2648 * The __weak directive allows the final application to overwrite
2649 * them with a custom implementation.
2650 */
2651
2652int32_t lsm6dso32_read_reg(stmdev_ctx_t *ctx, uint8_t reg,
2653 uint8_t *data,
2654 uint16_t len);
2655int32_t lsm6dso32_write_reg(stmdev_ctx_t *ctx, uint8_t reg,
2656 uint8_t *data,
2657 uint16_t len);
2658
2659float_t lsm6dso32_from_fs4_to_mg(int16_t lsb);
2660float_t lsm6dso32_from_fs8_to_mg(int16_t lsb);
2661float_t lsm6dso32_from_fs16_to_mg(int16_t lsb);
2662float_t lsm6dso32_from_fs32_to_mg(int16_t lsb);
2663
2664float_t lsm6dso32_from_fs125_to_mdps(int16_t lsb);
2665float_t lsm6dso32_from_fs250_to_mdps(int16_t lsb);
2666float_t lsm6dso32_from_fs500_to_mdps(int16_t lsb);
2667float_t lsm6dso32_from_fs1000_to_mdps(int16_t lsb);
2668float_t lsm6dso32_from_fs2000_to_mdps(int16_t lsb);
2669
2670float_t lsm6dso32_from_lsb_to_celsius(int16_t lsb);
2671
2672float_t lsm6dso32_from_lsb_to_nsec(int16_t lsb);
2673
2674typedef enum
2675{
2676 LSM6DSO32_4g = 0x00,
2677 LSM6DSO32_8g = 0x02,
2678 LSM6DSO32_16g = 0x03,
2679 LSM6DSO32_32g = 0x01,
2680} lsm6dso32_fs_xl_t;
2681int32_t lsm6dso32_xl_full_scale_set(stmdev_ctx_t *ctx,
2682 lsm6dso32_fs_xl_t val);
2683int32_t lsm6dso32_xl_full_scale_get(stmdev_ctx_t *ctx,
2684 lsm6dso32_fs_xl_t *val);
2685
2686typedef enum
2687{
2688 /* Accelerometer power off */
2689 LSM6DSO32_XL_ODR_OFF = 0x00,
2690 /* Accelerometer low power mode */
2691 LSM6DSO32_XL_ODR_6Hz5_LOW_PW = 0x1B,
2692 LSM6DSO32_XL_ODR_12Hz5_LOW_PW = 0x11,
2693 LSM6DSO32_XL_ODR_26Hz_LOW_PW = 0x12,
2694 LSM6DSO32_XL_ODR_52Hz_LOW_PW = 0x13,
2695 /* Accelerometer normal mode */
2696 LSM6DSO32_XL_ODR_104Hz_NORMAL_MD = 0x14,
2697 LSM6DSO32_XL_ODR_208Hz_NORMAL_MD = 0x15,
2698 /* Accelerometer high performance */
2699 LSM6DSO32_XL_ODR_12Hz5_HIGH_PERF = 0x01,
2700 LSM6DSO32_XL_ODR_26Hz_HIGH_PERF = 0x02,
2701 LSM6DSO32_XL_ODR_52Hz_HIGH_PERF = 0x03,
2702 LSM6DSO32_XL_ODR_104Hz_HIGH_PERF = 0x04,
2703 LSM6DSO32_XL_ODR_208Hz_HIGH_PERF = 0x05,
2704 LSM6DSO32_XL_ODR_417Hz_HIGH_PERF = 0x06,
2705 LSM6DSO32_XL_ODR_833Hz_HIGH_PERF = 0x07,
2706 LSM6DSO32_XL_ODR_1667Hz_HIGH_PERF = 0x08,
2707 LSM6DSO32_XL_ODR_3333Hz_HIGH_PERF = 0x09,
2708 LSM6DSO32_XL_ODR_6667Hz_HIGH_PERF = 0x0A,
2709 /* Accelerometer ultra low power.
2710 * WARNING: Gyroscope must be in Power-Down mode when
2711 * accelerometer is in ultra low power mode.
2712 */
2713 LSM6DSO32_XL_ODR_6Hz5_ULTRA_LOW_PW = 0x2B,
2714 LSM6DSO32_XL_ODR_12Hz5_ULTRA_LOW_PW = 0x21,
2715 LSM6DSO32_XL_ODR_26Hz_ULTRA_LOW_PW = 0x22,
2716 LSM6DSO32_XL_ODR_52Hz_ULTRA_LOW_PW = 0x23,
2717 LSM6DSO32_XL_ODR_104Hz_ULTRA_LOW_PW = 0x24,
2718 LSM6DSO32_XL_ODR_208Hz_ULTRA_LOW_PW = 0x25,
2719} lsm6dso32_odr_xl_t;
2720int32_t lsm6dso32_xl_data_rate_set(stmdev_ctx_t *ctx,
2721 lsm6dso32_odr_xl_t val);
2722int32_t lsm6dso32_xl_data_rate_get(stmdev_ctx_t *ctx,
2723 lsm6dso32_odr_xl_t *val);
2724
2725typedef enum
2726{
2727 LSM6DSO32_250dps = 0,
2728 LSM6DSO32_125dps = 1,
2729 LSM6DSO32_500dps = 2,
2730 LSM6DSO32_1000dps = 4,
2731 LSM6DSO32_2000dps = 6,
2732} lsm6dso32_fs_g_t;
2733int32_t lsm6dso32_gy_full_scale_set(stmdev_ctx_t *ctx,
2734 lsm6dso32_fs_g_t val);
2735int32_t lsm6dso32_gy_full_scale_get(stmdev_ctx_t *ctx,
2736 lsm6dso32_fs_g_t *val);
2737
2738typedef enum
2739{
2740 /* Gyroscope power off */
2741 LSM6DSO32_GY_ODR_OFF = 0x00,
2742 /* Gyroscope high performance mode */
2743 LSM6DSO32_GY_ODR_12Hz5_HIGH_PERF = 0x01,
2744 LSM6DSO32_GY_ODR_26Hz_HIGH_PERF = 0x02,
2745 LSM6DSO32_GY_ODR_52Hz_HIGH_PERF = 0x03,
2746 LSM6DSO32_GY_ODR_104Hz_HIGH_PERF = 0x04,
2747 LSM6DSO32_GY_ODR_208Hz_HIGH_PERF = 0x05,
2748 LSM6DSO32_GY_ODR_417Hz_HIGH_PERF = 0x06,
2749 LSM6DSO32_GY_ODR_833Hz_HIGH_PERF = 0x07,
2750 LSM6DSO32_GY_ODR_1667Hz_HIGH_PERF = 0x08,
2751 LSM6DSO32_GY_ODR_3333Hz_HIGH_PERF = 0x09,
2752 LSM6DSO32_GY_ODR_6667Hz_HIGH_PERF = 0x0A,
2753 /* Gyroscope normal mode */
2754 LSM6DSO32_GY_ODR_104Hz_NORMAL_MD = 0x14,
2755 LSM6DSO32_GY_ODR_208Hz_NORMAL_MD = 0x15,
2756 /* Gyroscope low power mode */
2757 LSM6DSO32_GY_ODR_12Hz5_LOW_PW = 0x11,
2758 LSM6DSO32_GY_ODR_26Hz_LOW_PW = 0x12,
2759 LSM6DSO32_GY_ODR_52Hz_LOW_PW = 0x13,
2760} lsm6dso32_odr_g_t;
2761int32_t lsm6dso32_gy_data_rate_set(stmdev_ctx_t *ctx,
2762 lsm6dso32_odr_g_t val);
2763int32_t lsm6dso32_gy_data_rate_get(stmdev_ctx_t *ctx,
2764 lsm6dso32_odr_g_t *val);
2765
2766int32_t lsm6dso32_block_data_update_set(stmdev_ctx_t *ctx,
2767 uint8_t val);
2768int32_t lsm6dso32_block_data_update_get(stmdev_ctx_t *ctx,
2769 uint8_t *val);
2770
2771typedef enum
2772{
2773 LSM6DSO32_LSb_1mg = 0,
2774 LSM6DSO32_LSb_16mg = 1,
2775} lsm6dso32_usr_off_w_t;
2776int32_t lsm6dso32_xl_offset_weight_set(stmdev_ctx_t *ctx,
2777 lsm6dso32_usr_off_w_t val);
2778int32_t lsm6dso32_xl_offset_weight_get(stmdev_ctx_t *ctx,
2779 lsm6dso32_usr_off_w_t *val);
2780
2781typedef struct
2782{
2783 lsm6dso32_all_int_src_t all_int_src;
2784 lsm6dso32_wake_up_src_t wake_up_src;
2785 lsm6dso32_tap_src_t tap_src;
2786 lsm6dso32_d6d_src_t d6d_src;
2787 lsm6dso32_status_reg_t status_reg;
2788 lsm6dso32_emb_func_status_t emb_func_status;
2789 lsm6dso32_fsm_status_a_t fsm_status_a;
2790 lsm6dso32_fsm_status_b_t fsm_status_b;
2791} lsm6dso32_all_sources_t;
2792int32_t lsm6dso32_all_sources_get(stmdev_ctx_t *ctx,
2793 lsm6dso32_all_sources_t *val);
2794
2795int32_t lsm6dso32_status_reg_get(stmdev_ctx_t *ctx,
2796 lsm6dso32_status_reg_t *val);
2797
2798int32_t lsm6dso32_xl_flag_data_ready_get(stmdev_ctx_t *ctx,
2799 uint8_t *val);
2800
2801int32_t lsm6dso32_gy_flag_data_ready_get(stmdev_ctx_t *ctx,
2802 uint8_t *val);
2803
2804int32_t lsm6dso32_temp_flag_data_ready_get(stmdev_ctx_t *ctx,
2805 uint8_t *val);
2806
2807int32_t lsm6dso32_xl_usr_offset_x_set(stmdev_ctx_t *ctx,
2808 uint8_t *buff);
2809int32_t lsm6dso32_xl_usr_offset_x_get(stmdev_ctx_t *ctx,
2810 uint8_t *buff);
2811
2812int32_t lsm6dso32_xl_usr_offset_y_set(stmdev_ctx_t *ctx,
2813 uint8_t *buff);
2814int32_t lsm6dso32_xl_usr_offset_y_get(stmdev_ctx_t *ctx,
2815 uint8_t *buff);
2816
2817int32_t lsm6dso32_xl_usr_offset_z_set(stmdev_ctx_t *ctx,
2818 uint8_t *buff);
2819int32_t lsm6dso32_xl_usr_offset_z_get(stmdev_ctx_t *ctx,
2820 uint8_t *buff);
2821
2822int32_t lsm6dso32_xl_usr_offset_set(stmdev_ctx_t *ctx, uint8_t val);
2823int32_t lsm6dso32_xl_usr_offset_get(stmdev_ctx_t *ctx, uint8_t *val);
2832int32_t lsm6dso32_timestamp_set(stmdev_ctx_t *ctx, uint8_t val);
2833int32_t lsm6dso32_timestamp_get(stmdev_ctx_t *ctx, uint8_t *val);
2834
2835int32_t lsm6dso32_timestamp_raw_get(stmdev_ctx_t *ctx, uint32_t *val);
2836
2842typedef enum
2843{
2844 LSM6DSO32_NO_ROUND = 0,
2845 LSM6DSO32_ROUND_XL = 1,
2846 LSM6DSO32_ROUND_GY = 2,
2847 LSM6DSO32_ROUND_GY_XL = 3,
2848} lsm6dso32_rounding_t;
2849
2857int32_t lsm6dso32_rounding_mode_set(stmdev_ctx_t *ctx,
2858 lsm6dso32_rounding_t val);
2859int32_t lsm6dso32_rounding_mode_get(stmdev_ctx_t *ctx,
2860 lsm6dso32_rounding_t *val);
2861
2862int32_t lsm6dso32_temperature_raw_get(stmdev_ctx_t *ctx,
2863 int16_t *val);
2864
2865int32_t lsm6dso32_angular_rate_raw_get(stmdev_ctx_t *ctx,
2866 int16_t *val);
2867
2868int32_t lsm6dso32_acceleration_raw_get(stmdev_ctx_t *ctx,
2869 int16_t *val);
2870
2871int32_t lsm6dso32_fifo_out_raw_get(stmdev_ctx_t *ctx, uint8_t *buff);
2872
2873int32_t lsm6dso32_number_of_steps_get(stmdev_ctx_t *ctx,
2874 uint16_t *val);
2875
2876int32_t lsm6dso32_steps_reset(stmdev_ctx_t *ctx);
2880int32_t lsm6dso32_odr_cal_reg_set(stmdev_ctx_t *ctx, uint8_t val);
2881int32_t lsm6dso32_odr_cal_reg_get(stmdev_ctx_t *ctx, uint8_t *val);
2882
2883typedef enum
2884{
2885 LSM6DSO32_USER_BANK = 0,
2886 LSM6DSO32_SENSOR_HUB_BANK = 1,
2887 LSM6DSO32_EMBEDDED_FUNC_BANK = 2,
2888} lsm6dso32_reg_access_t;
2889int32_t lsm6dso32_mem_bank_set(stmdev_ctx_t *ctx,
2890 lsm6dso32_reg_access_t val);
2891int32_t lsm6dso32_mem_bank_get(stmdev_ctx_t *ctx,
2892 lsm6dso32_reg_access_t *val);
2893
2894int32_t lsm6dso32_ln_pg_write_byte(stmdev_ctx_t *ctx,
2895 uint16_t address,
2896 uint8_t *val);
2897int32_t lsm6dso32_ln_pg_read_byte(stmdev_ctx_t *ctx, uint16_t address,
2898 uint8_t *val);
2899int32_t lsm6dso32_ln_pg_write(stmdev_ctx_t *ctx, uint16_t address,
2900 uint8_t *buf, uint8_t len);
2901int32_t lsm6dso32_ln_pg_read(stmdev_ctx_t *ctx, uint16_t address,
2902 uint8_t *val);
2903
2904typedef enum
2905{
2906 LSM6DSO32_DRDY_LATCHED = 0,
2907 LSM6DSO32_DRDY_PULSED = 1,
2908} lsm6dso32_dataready_pulsed_t;
2909int32_t lsm6dso32_data_ready_mode_set(stmdev_ctx_t *ctx,
2910 lsm6dso32_dataready_pulsed_t val);
2911int32_t lsm6dso32_data_ready_mode_get(stmdev_ctx_t *ctx,
2912 lsm6dso32_dataready_pulsed_t *val);
2913
2914int32_t lsm6dso32_device_id_get(stmdev_ctx_t *ctx, uint8_t *buff);
2915
2916int32_t lsm6dso32_reset_set(stmdev_ctx_t *ctx, uint8_t val);
2917int32_t lsm6dso32_reset_get(stmdev_ctx_t *ctx, uint8_t *val);
2918
2919int32_t lsm6dso32_auto_increment_set(stmdev_ctx_t *ctx, uint8_t val);
2920int32_t lsm6dso32_auto_increment_get(stmdev_ctx_t *ctx, uint8_t *val);
2921
2922int32_t lsm6dso32_boot_set(stmdev_ctx_t *ctx, uint8_t val);
2923int32_t lsm6dso32_boot_get(stmdev_ctx_t *ctx, uint8_t *val);
2924
2925typedef enum
2926{
2927 LSM6DSO32_XL_ST_DISABLE = 0,
2928 LSM6DSO32_XL_ST_POSITIVE = 1,
2929 LSM6DSO32_XL_ST_NEGATIVE = 2,
2930} lsm6dso32_st_xl_t;
2931int32_t lsm6dso32_xl_self_test_set(stmdev_ctx_t *ctx,
2932 lsm6dso32_st_xl_t val);
2933int32_t lsm6dso32_xl_self_test_get(stmdev_ctx_t *ctx,
2934 lsm6dso32_st_xl_t *val);
2935
2936typedef enum
2937{
2938 LSM6DSO32_GY_ST_DISABLE = 0,
2939 LSM6DSO32_GY_ST_POSITIVE = 1,
2940 LSM6DSO32_GY_ST_NEGATIVE = 3,
2941} lsm6dso32_st_g_t;
2942int32_t lsm6dso32_gy_self_test_set(stmdev_ctx_t *ctx,
2943 lsm6dso32_st_g_t val);
2944int32_t lsm6dso32_gy_self_test_get(stmdev_ctx_t *ctx,
2945 lsm6dso32_st_g_t *val);
2946
2947int32_t lsm6dso32_xl_filter_lp2_set(stmdev_ctx_t *ctx, uint8_t val);
2948int32_t lsm6dso32_xl_filter_lp2_get(stmdev_ctx_t *ctx, uint8_t *val);
2949
2950int32_t lsm6dso32_gy_filter_lp1_set(stmdev_ctx_t *ctx, uint8_t val);
2951int32_t lsm6dso32_gy_filter_lp1_get(stmdev_ctx_t *ctx, uint8_t *val);
2952
2953int32_t lsm6dso32_filter_settling_mask_set(stmdev_ctx_t *ctx,
2954 uint8_t val);
2955int32_t lsm6dso32_filter_settling_mask_get(stmdev_ctx_t *ctx,
2956 uint8_t *val);
2957
2958typedef enum
2959{
2960 LSM6DSO32_ULTRA_LIGHT = 0,
2961 LSM6DSO32_VERY_LIGHT = 1,
2962 LSM6DSO32_LIGHT = 2,
2963 LSM6DSO32_MEDIUM = 3,
2964 LSM6DSO32_STRONG = 4, /* not available for data rate > 1k670Hz */
2965 LSM6DSO32_VERY_STRONG = 5, /* not available for data rate > 1k670Hz */
2966 LSM6DSO32_AGGRESSIVE = 6, /* not available for data rate > 1k670Hz */
2967 LSM6DSO32_XTREME = 7, /* not available for data rate > 1k670Hz */
2968} lsm6dso32_ftype_t;
2969int32_t lsm6dso32_gy_lp1_bandwidth_set(stmdev_ctx_t *ctx,
2970 lsm6dso32_ftype_t val);
2971int32_t lsm6dso32_gy_lp1_bandwidth_get(stmdev_ctx_t *ctx,
2972 lsm6dso32_ftype_t *val);
2973
2974int32_t lsm6dso32_xl_lp2_on_6d_set(stmdev_ctx_t *ctx, uint8_t val);
2975int32_t lsm6dso32_xl_lp2_on_6d_get(stmdev_ctx_t *ctx, uint8_t *val);
2976
2977typedef enum
2978{
2979 LSM6DSO32_HP_PATH_DISABLE_ON_OUT = 0x00,
2980 LSM6DSO32_SLOPE_ODR_DIV_4 = 0x10,
2981 LSM6DSO32_HP_ODR_DIV_10 = 0x11,
2982 LSM6DSO32_HP_ODR_DIV_20 = 0x12,
2983 LSM6DSO32_HP_ODR_DIV_45 = 0x13,
2984 LSM6DSO32_HP_ODR_DIV_100 = 0x14,
2985 LSM6DSO32_HP_ODR_DIV_200 = 0x15,
2986 LSM6DSO32_HP_ODR_DIV_400 = 0x16,
2987 LSM6DSO32_HP_ODR_DIV_800 = 0x17,
2988 LSM6DSO32_HP_REF_MD_ODR_DIV_10 = 0x31,
2989 LSM6DSO32_HP_REF_MD_ODR_DIV_20 = 0x32,
2990 LSM6DSO32_HP_REF_MD_ODR_DIV_45 = 0x33,
2991 LSM6DSO32_HP_REF_MD_ODR_DIV_100 = 0x34,
2992 LSM6DSO32_HP_REF_MD_ODR_DIV_200 = 0x35,
2993 LSM6DSO32_HP_REF_MD_ODR_DIV_400 = 0x36,
2994 LSM6DSO32_HP_REF_MD_ODR_DIV_800 = 0x37,
2995 LSM6DSO32_LP_ODR_DIV_10 = 0x01,
2996 LSM6DSO32_LP_ODR_DIV_20 = 0x02,
2997 LSM6DSO32_LP_ODR_DIV_45 = 0x03,
2998 LSM6DSO32_LP_ODR_DIV_100 = 0x04,
2999 LSM6DSO32_LP_ODR_DIV_200 = 0x05,
3000 LSM6DSO32_LP_ODR_DIV_400 = 0x06,
3001 LSM6DSO32_LP_ODR_DIV_800 = 0x07,
3002} lsm6dso32_hp_slope_xl_en_t;
3003int32_t lsm6dso32_xl_hp_path_on_out_set(stmdev_ctx_t *ctx,
3004 lsm6dso32_hp_slope_xl_en_t val);
3005int32_t lsm6dso32_xl_hp_path_on_out_get(stmdev_ctx_t *ctx,
3006 lsm6dso32_hp_slope_xl_en_t *val);
3007
3008int32_t lsm6dso32_xl_fast_settling_set(stmdev_ctx_t *ctx,
3009 uint8_t val);
3010int32_t lsm6dso32_xl_fast_settling_get(stmdev_ctx_t *ctx,
3011 uint8_t *val);
3012
3013typedef enum
3014{
3015 LSM6DSO32_USE_SLOPE = 0,
3016 LSM6DSO32_USE_HPF = 1,
3017} lsm6dso32_slope_fds_t;
3018int32_t lsm6dso32_xl_hp_path_internal_set(stmdev_ctx_t *ctx,
3019 lsm6dso32_slope_fds_t val);
3020int32_t lsm6dso32_xl_hp_path_internal_get(stmdev_ctx_t *ctx,
3021 lsm6dso32_slope_fds_t *val);
3022
3023typedef enum
3024{
3025 LSM6DSO32_HP_FILTER_NONE = 0x00,
3026 LSM6DSO32_HP_FILTER_16mHz = 0x80,
3027 LSM6DSO32_HP_FILTER_65mHz = 0x81,
3028 LSM6DSO32_HP_FILTER_260mHz = 0x82,
3029 LSM6DSO32_HP_FILTER_1Hz04 = 0x83,
3030} lsm6dso32_hpm_g_t;
3031int32_t lsm6dso32_gy_hp_path_internal_set(stmdev_ctx_t *ctx,
3032 lsm6dso32_hpm_g_t val);
3033int32_t lsm6dso32_gy_hp_path_internal_get(stmdev_ctx_t *ctx,
3034 lsm6dso32_hpm_g_t *val);
3035
3036typedef enum
3037{
3038 LSM6DSO32_PULL_UP_DISC = 0,
3039 LSM6DSO32_PULL_UP_CONNECT = 1,
3040} lsm6dso32_sdo_pu_en_t;
3041int32_t lsm6dso32_sdo_sa0_mode_set(stmdev_ctx_t *ctx,
3042 lsm6dso32_sdo_pu_en_t val);
3043int32_t lsm6dso32_sdo_sa0_mode_get(stmdev_ctx_t *ctx,
3044 lsm6dso32_sdo_pu_en_t *val);
3045
3046typedef enum
3047{
3048 LSM6DSO32_SPI_4_WIRE = 0,
3049 LSM6DSO32_SPI_3_WIRE = 1,
3050} lsm6dso32_sim_t;
3051int32_t lsm6dso32_spi_mode_set(stmdev_ctx_t *ctx,
3052 lsm6dso32_sim_t val);
3053int32_t lsm6dso32_spi_mode_get(stmdev_ctx_t *ctx,
3054 lsm6dso32_sim_t *val);
3055
3056typedef enum
3057{
3058 LSM6DSO32_I2C_ENABLE = 0,
3059 LSM6DSO32_I2C_DISABLE = 1,
3060} lsm6dso32_i2c_disable_t;
3061int32_t lsm6dso32_i2c_interface_set(stmdev_ctx_t *ctx,
3062 lsm6dso32_i2c_disable_t val);
3063int32_t lsm6dso32_i2c_interface_get(stmdev_ctx_t *ctx,
3064 lsm6dso32_i2c_disable_t *val);
3065
3066typedef enum
3067{
3068 LSM6DSO32_I3C_DISABLE = 0x80,
3069 LSM6DSO32_I3C_ENABLE_T_50us = 0x00,
3070 LSM6DSO32_I3C_ENABLE_T_2us = 0x01,
3071 LSM6DSO32_I3C_ENABLE_T_1ms = 0x02,
3072 LSM6DSO32_I3C_ENABLE_T_25ms = 0x03,
3073} lsm6dso32_i3c_disable_t;
3074int32_t lsm6dso32_i3c_disable_set(stmdev_ctx_t *ctx,
3075 lsm6dso32_i3c_disable_t val);
3076int32_t lsm6dso32_i3c_disable_get(stmdev_ctx_t *ctx,
3077 lsm6dso32_i3c_disable_t *val);
3078
3079typedef enum
3080{
3081 LSM6DSO32_PULL_DOWN_DISC = 0,
3082 LSM6DSO32_PULL_DOWN_CONNECT = 1,
3083} lsm6dso32_int1_pd_en_t;
3084int32_t lsm6dso32_int1_mode_set(stmdev_ctx_t *ctx,
3085 lsm6dso32_int1_pd_en_t val);
3086int32_t lsm6dso32_int1_mode_get(stmdev_ctx_t *ctx,
3087 lsm6dso32_int1_pd_en_t *val);
3088
3089typedef struct
3090{
3091 lsm6dso32_int1_ctrl_t int1_ctrl;
3092 lsm6dso32_md1_cfg_t md1_cfg;
3093 lsm6dso32_emb_func_int1_t emb_func_int1;
3094 lsm6dso32_fsm_int1_a_t fsm_int1_a;
3095 lsm6dso32_fsm_int1_b_t fsm_int1_b;
3096} lsm6dso32_pin_int1_route_t;
3097int32_t lsm6dso32_pin_int1_route_set(stmdev_ctx_t *ctx,
3098 lsm6dso32_pin_int1_route_t *val);
3099int32_t lsm6dso32_pin_int1_route_get(stmdev_ctx_t *ctx,
3100 lsm6dso32_pin_int1_route_t *val);
3101
3102typedef struct
3103{
3104 lsm6dso32_int2_ctrl_t int2_ctrl;
3105 lsm6dso32_md2_cfg_t md2_cfg;
3106 lsm6dso32_emb_func_int2_t emb_func_int2;
3107 lsm6dso32_fsm_int2_a_t fsm_int2_a;
3108 lsm6dso32_fsm_int2_b_t fsm_int2_b;
3109} lsm6dso32_pin_int2_route_t;
3110int32_t lsm6dso32_pin_int2_route_set(stmdev_ctx_t *ctx,
3111 lsm6dso32_pin_int2_route_t *val);
3112int32_t lsm6dso32_pin_int2_route_get(stmdev_ctx_t *ctx,
3113 lsm6dso32_pin_int2_route_t *val);
3114
3115typedef enum
3116{
3117 LSM6DSO32_PUSH_PULL = 0,
3118 LSM6DSO32_OPEN_DRAIN = 1,
3119} lsm6dso32_pp_od_t;
3120int32_t lsm6dso32_pin_mode_set(stmdev_ctx_t *ctx,
3121 lsm6dso32_pp_od_t val);
3122int32_t lsm6dso32_pin_mode_get(stmdev_ctx_t *ctx,
3123 lsm6dso32_pp_od_t *val);
3124
3125typedef enum
3126{
3127 LSM6DSO32_ACTIVE_HIGH = 0,
3128 LSM6DSO32_ACTIVE_LOW = 1,
3129} lsm6dso32_h_lactive_t;
3130int32_t lsm6dso32_pin_polarity_set(stmdev_ctx_t *ctx,
3131 lsm6dso32_h_lactive_t val);
3132int32_t lsm6dso32_pin_polarity_get(stmdev_ctx_t *ctx,
3133 lsm6dso32_h_lactive_t *val);
3134
3135int32_t lsm6dso32_all_on_int1_set(stmdev_ctx_t *ctx, uint8_t val);
3136int32_t lsm6dso32_all_on_int1_get(stmdev_ctx_t *ctx, uint8_t *val);
3137
3138typedef enum
3139{
3140 LSM6DSO32_ALL_INT_PULSED = 0,
3141 LSM6DSO32_BASE_LATCHED_EMB_PULSED = 1,
3142 LSM6DSO32_BASE_PULSED_EMB_LATCHED = 2,
3143 LSM6DSO32_ALL_INT_LATCHED = 3,
3144} lsm6dso32_lir_t;
3145int32_t lsm6dso32_int_notification_set(stmdev_ctx_t *ctx,
3146 lsm6dso32_lir_t val);
3147int32_t lsm6dso32_int_notification_get(stmdev_ctx_t *ctx,
3148 lsm6dso32_lir_t *val);
3149
3150typedef enum
3151{
3152 LSM6DSO32_LSb_FS_DIV_64 = 0,
3153 LSM6DSO32_LSb_FS_DIV_256 = 1,
3154} lsm6dso32_wake_ths_w_t;
3155int32_t lsm6dso32_wkup_ths_weight_set(stmdev_ctx_t *ctx,
3156 lsm6dso32_wake_ths_w_t val);
3157int32_t lsm6dso32_wkup_ths_weight_get(stmdev_ctx_t *ctx,
3158 lsm6dso32_wake_ths_w_t *val);
3159
3160int32_t lsm6dso32_wkup_threshold_set(stmdev_ctx_t *ctx, uint8_t val);
3161int32_t lsm6dso32_wkup_threshold_get(stmdev_ctx_t *ctx, uint8_t *val);
3162
3163int32_t lsm6dso32_xl_usr_offset_on_wkup_set(stmdev_ctx_t *ctx,
3164 uint8_t val);
3165int32_t lsm6dso32_xl_usr_offset_on_wkup_get(stmdev_ctx_t *ctx,
3166 uint8_t *val);
3167
3168int32_t lsm6dso32_wkup_dur_set(stmdev_ctx_t *ctx, uint8_t val);
3169int32_t lsm6dso32_wkup_dur_get(stmdev_ctx_t *ctx, uint8_t *val);
3170
3171int32_t lsm6dso32_gy_sleep_mode_set(stmdev_ctx_t *ctx, uint8_t val);
3172int32_t lsm6dso32_gy_sleep_mode_get(stmdev_ctx_t *ctx, uint8_t *val);
3173
3174typedef enum
3175{
3176 LSM6DSO32_DRIVE_SLEEP_CHG_EVENT = 0,
3177 LSM6DSO32_DRIVE_SLEEP_STATUS = 1,
3178} lsm6dso32_sleep_status_on_int_t;
3179int32_t lsm6dso32_act_pin_notification_set(stmdev_ctx_t *ctx,
3180 lsm6dso32_sleep_status_on_int_t val);
3181int32_t lsm6dso32_act_pin_notification_get(stmdev_ctx_t *ctx,
3182 lsm6dso32_sleep_status_on_int_t *val);
3183
3184typedef enum
3185{
3186 LSM6DSO32_XL_AND_GY_NOT_AFFECTED = 0,
3187 LSM6DSO32_XL_12Hz5_GY_NOT_AFFECTED = 1,
3188 LSM6DSO32_XL_12Hz5_GY_SLEEP = 2,
3189 LSM6DSO32_XL_12Hz5_GY_PD = 3,
3190} lsm6dso32_inact_en_t;
3191int32_t lsm6dso32_act_mode_set(stmdev_ctx_t *ctx,
3192 lsm6dso32_inact_en_t val);
3193int32_t lsm6dso32_act_mode_get(stmdev_ctx_t *ctx,
3194 lsm6dso32_inact_en_t *val);
3195
3196int32_t lsm6dso32_act_sleep_dur_set(stmdev_ctx_t *ctx, uint8_t val);
3197int32_t lsm6dso32_act_sleep_dur_get(stmdev_ctx_t *ctx, uint8_t *val);
3198
3199int32_t lsm6dso32_tap_detection_on_z_set(stmdev_ctx_t *ctx,
3200 uint8_t val);
3201int32_t lsm6dso32_tap_detection_on_z_get(stmdev_ctx_t *ctx,
3202 uint8_t *val);
3203
3204int32_t lsm6dso32_tap_detection_on_y_set(stmdev_ctx_t *ctx,
3205 uint8_t val);
3206int32_t lsm6dso32_tap_detection_on_y_get(stmdev_ctx_t *ctx,
3207 uint8_t *val);
3208
3209int32_t lsm6dso32_tap_detection_on_x_set(stmdev_ctx_t *ctx,
3210 uint8_t val);
3211int32_t lsm6dso32_tap_detection_on_x_get(stmdev_ctx_t *ctx,
3212 uint8_t *val);
3213
3214int32_t lsm6dso32_tap_threshold_x_set(stmdev_ctx_t *ctx, uint8_t val);
3215int32_t lsm6dso32_tap_threshold_x_get(stmdev_ctx_t *ctx,
3216 uint8_t *val);
3217
3218typedef enum
3219{
3220 LSM6DSO32_XYZ = 0,
3221 LSM6DSO32_YXZ = 1,
3222 LSM6DSO32_XZY = 2,
3223 LSM6DSO32_ZYX = 3,
3224 LSM6DSO32_YZX = 5,
3225 LSM6DSO32_ZXY = 6,
3226} lsm6dso32_tap_priority_t;
3227int32_t lsm6dso32_tap_axis_priority_set(stmdev_ctx_t *ctx,
3228 lsm6dso32_tap_priority_t val);
3229int32_t lsm6dso32_tap_axis_priority_get(stmdev_ctx_t *ctx,
3230 lsm6dso32_tap_priority_t *val);
3231
3232int32_t lsm6dso32_tap_threshold_y_set(stmdev_ctx_t *ctx, uint8_t val);
3233int32_t lsm6dso32_tap_threshold_y_get(stmdev_ctx_t *ctx,
3234 uint8_t *val);
3235
3236int32_t lsm6dso32_tap_threshold_z_set(stmdev_ctx_t *ctx, uint8_t val);
3237int32_t lsm6dso32_tap_threshold_z_get(stmdev_ctx_t *ctx,
3238 uint8_t *val);
3239
3240int32_t lsm6dso32_tap_shock_set(stmdev_ctx_t *ctx, uint8_t val);
3241int32_t lsm6dso32_tap_shock_get(stmdev_ctx_t *ctx, uint8_t *val);
3242
3243int32_t lsm6dso32_tap_quiet_set(stmdev_ctx_t *ctx, uint8_t val);
3244int32_t lsm6dso32_tap_quiet_get(stmdev_ctx_t *ctx, uint8_t *val);
3245
3246int32_t lsm6dso32_tap_dur_set(stmdev_ctx_t *ctx, uint8_t val);
3247int32_t lsm6dso32_tap_dur_get(stmdev_ctx_t *ctx, uint8_t *val);
3248
3249typedef enum
3250{
3251 LSM6DSO32_ONLY_SINGLE = 0,
3252 LSM6DSO32_BOTH_SINGLE_DOUBLE = 1,
3253} lsm6dso32_single_double_tap_t;
3254int32_t lsm6dso32_tap_mode_set(stmdev_ctx_t *ctx,
3255 lsm6dso32_single_double_tap_t val);
3256int32_t lsm6dso32_tap_mode_get(stmdev_ctx_t *ctx,
3257 lsm6dso32_single_double_tap_t *val);
3258
3259typedef enum
3260{
3261 LSM6DSO32_DEG_68 = 0,
3262 LSM6DSO32_DEG_47 = 1,
3263} lsm6dso32_sixd_ths_t;
3264int32_t lsm6dso32_6d_threshold_set(stmdev_ctx_t *ctx,
3265 lsm6dso32_sixd_ths_t val);
3266int32_t lsm6dso32_6d_threshold_get(stmdev_ctx_t *ctx,
3267 lsm6dso32_sixd_ths_t *val);
3268
3269int32_t lsm6dso32_4d_mode_set(stmdev_ctx_t *ctx, uint8_t val);
3270int32_t lsm6dso32_4d_mode_get(stmdev_ctx_t *ctx, uint8_t *val);
3271
3272typedef enum
3273{
3274 LSM6DSO32_FF_TSH_312mg = 0,
3275 LSM6DSO32_FF_TSH_438mg = 1,
3276 LSM6DSO32_FF_TSH_500mg = 2,
3277} lsm6dso32_ff_ths_t;
3286int32_t lsm6dso32_ff_threshold_set(stmdev_ctx_t *ctx,
3287 lsm6dso32_ff_ths_t val);
3288int32_t lsm6dso32_ff_threshold_get(stmdev_ctx_t *ctx,
3289 lsm6dso32_ff_ths_t *val);
3290
3291int32_t lsm6dso32_ff_dur_set(stmdev_ctx_t *ctx, uint8_t val);
3292int32_t lsm6dso32_ff_dur_get(stmdev_ctx_t *ctx, uint8_t *val);
3304int32_t lsm6dso32_fifo_watermark_set(stmdev_ctx_t *ctx, uint16_t val);
3305int32_t lsm6dso32_fifo_watermark_get(stmdev_ctx_t *ctx,
3306 uint16_t *val);
3307
3308int32_t lsm6dso32_compression_algo_init_set(stmdev_ctx_t *ctx,
3309 uint8_t val);
3310int32_t lsm6dso32_compression_algo_init_get(stmdev_ctx_t *ctx,
3311 uint8_t *val);
3312
3313typedef enum
3314{
3315 LSM6DSO32_CMP_DISABLE = 0x00,
3316 LSM6DSO32_CMP_ALWAYS = 0x04,
3317 LSM6DSO32_CMP_8_TO_1 = 0x05,
3318 LSM6DSO32_CMP_16_TO_1 = 0x06,
3319 LSM6DSO32_CMP_32_TO_1 = 0x07,
3320} lsm6dso32_uncoptr_rate_t;
3321int32_t lsm6dso32_compression_algo_set(stmdev_ctx_t *ctx,
3322 lsm6dso32_uncoptr_rate_t val);
3323int32_t lsm6dso32_compression_algo_get(stmdev_ctx_t *ctx,
3324 lsm6dso32_uncoptr_rate_t *val);
3325
3326int32_t lsm6dso32_fifo_virtual_sens_odr_chg_set(stmdev_ctx_t *ctx,
3327 uint8_t val);
3328int32_t lsm6dso32_fifo_virtual_sens_odr_chg_get(stmdev_ctx_t *ctx,
3329 uint8_t *val);
3330
3331int32_t lsm6dso32_compression_algo_real_time_set(stmdev_ctx_t *ctx,
3332 uint8_t val);
3333int32_t lsm6dso32_compression_algo_real_time_get(stmdev_ctx_t *ctx,
3334 uint8_t *val);
3335
3336int32_t lsm6dso32_fifo_stop_on_wtm_set(stmdev_ctx_t *ctx,
3337 uint8_t val);
3338int32_t lsm6dso32_fifo_stop_on_wtm_get(stmdev_ctx_t *ctx,
3339 uint8_t *val);
3340
3341typedef enum
3342{
3343 LSM6DSO32_XL_NOT_BATCHED = 0,
3344 LSM6DSO32_XL_BATCHED_AT_12Hz5 = 1,
3345 LSM6DSO32_XL_BATCHED_AT_26Hz = 2,
3346 LSM6DSO32_XL_BATCHED_AT_52Hz = 3,
3347 LSM6DSO32_XL_BATCHED_AT_104Hz = 4,
3348 LSM6DSO32_XL_BATCHED_AT_208Hz = 5,
3349 LSM6DSO32_XL_BATCHED_AT_417Hz = 6,
3350 LSM6DSO32_XL_BATCHED_AT_833Hz = 7,
3351 LSM6DSO32_XL_BATCHED_AT_1667Hz = 8,
3352 LSM6DSO32_XL_BATCHED_AT_3333Hz = 9,
3353 LSM6DSO32_XL_BATCHED_AT_6667Hz = 10,
3354 LSM6DSO32_XL_BATCHED_AT_6Hz5 = 11,
3355} lsm6dso32_bdr_xl_t;
3356int32_t lsm6dso32_fifo_xl_batch_set(stmdev_ctx_t *ctx,
3357 lsm6dso32_bdr_xl_t val);
3358int32_t lsm6dso32_fifo_xl_batch_get(stmdev_ctx_t *ctx,
3359 lsm6dso32_bdr_xl_t *val);
3360
3361typedef enum
3362{
3363 LSM6DSO32_GY_NOT_BATCHED = 0,
3364 LSM6DSO32_GY_BATCHED_AT_12Hz5 = 1,
3365 LSM6DSO32_GY_BATCHED_AT_26Hz = 2,
3366 LSM6DSO32_GY_BATCHED_AT_52Hz = 3,
3367 LSM6DSO32_GY_BATCHED_AT_104Hz = 4,
3368 LSM6DSO32_GY_BATCHED_AT_208Hz = 5,
3369 LSM6DSO32_GY_BATCHED_AT_417Hz = 6,
3370 LSM6DSO32_GY_BATCHED_AT_833Hz = 7,
3371 LSM6DSO32_GY_BATCHED_AT_1667Hz = 8,
3372 LSM6DSO32_GY_BATCHED_AT_3333Hz = 9,
3373 LSM6DSO32_GY_BATCHED_AT_6667Hz = 10,
3374 LSM6DSO32_GY_BATCHED_AT_6Hz5 = 11,
3375} lsm6dso32_bdr_gy_t;
3376int32_t lsm6dso32_fifo_gy_batch_set(stmdev_ctx_t *ctx,
3377 lsm6dso32_bdr_gy_t val);
3378int32_t lsm6dso32_fifo_gy_batch_get(stmdev_ctx_t *ctx,
3379 lsm6dso32_bdr_gy_t *val);
3380
3381typedef enum
3382{
3383 LSM6DSO32_BYPASS_MODE = 0,
3384 LSM6DSO32_FIFO_MODE = 1,
3385 LSM6DSO32_STREAM_TO_FIFO_MODE = 3,
3386 LSM6DSO32_BYPASS_TO_STREAM_MODE = 4,
3387 LSM6DSO32_STREAM_MODE = 6,
3388 LSM6DSO32_BYPASS_TO_FIFO_MODE = 7,
3389} lsm6dso32_fifo_mode_t;
3390int32_t lsm6dso32_fifo_mode_set(stmdev_ctx_t *ctx,
3391 lsm6dso32_fifo_mode_t val);
3392int32_t lsm6dso32_fifo_mode_get(stmdev_ctx_t *ctx,
3393 lsm6dso32_fifo_mode_t *val);
3394
3395typedef enum
3396{
3397 LSM6DSO32_TEMP_NOT_BATCHED = 0,
3398 LSM6DSO32_TEMP_BATCHED_AT_1Hz6 = 1,
3399 LSM6DSO32_TEMP_BATCHED_AT_12Hz5 = 2,
3400 LSM6DSO32_TEMP_BATCHED_AT_52Hz = 3,
3401} lsm6dso32_odr_t_batch_t;
3402int32_t lsm6dso32_fifo_temp_batch_set(stmdev_ctx_t *ctx,
3403 lsm6dso32_odr_t_batch_t val);
3404int32_t lsm6dso32_fifo_temp_batch_get(stmdev_ctx_t *ctx,
3405 lsm6dso32_odr_t_batch_t *val);
3406
3407typedef enum
3408{
3409 LSM6DSO32_NO_DECIMATION = 0,
3410 LSM6DSO32_DEC_1 = 1,
3411 LSM6DSO32_DEC_8 = 2,
3412 LSM6DSO32_DEC_32 = 3,
3413} lsm6dso32_odr_ts_batch_t;
3414int32_t lsm6dso32_fifo_timestamp_decimation_set(stmdev_ctx_t *ctx,
3415 lsm6dso32_odr_ts_batch_t val);
3416int32_t lsm6dso32_fifo_timestamp_decimation_get(stmdev_ctx_t *ctx,
3417 lsm6dso32_odr_ts_batch_t *val);
3418
3419typedef enum
3420{
3421 LSM6DSO32_XL_BATCH_EVENT = 0,
3422 LSM6DSO32_GYRO_BATCH_EVENT = 1,
3423} lsm6dso32_trig_counter_bdr_t;
3424
3425typedef enum
3426{
3427 LSM6DSO32_GYRO_NC_TAG = 1,
3428 LSM6DSO32_XL_NC_TAG,
3429 LSM6DSO32_TEMPERATURE_TAG,
3430 LSM6DSO32_TIMESTAMP_TAG,
3431 LSM6DSO32_CFG_CHANGE_TAG,
3432 LSM6DSO32_XL_NC_T_2_TAG,
3433 LSM6DSO32_XL_NC_T_1_TAG,
3434 LSM6DSO32_XL_2XC_TAG,
3435 LSM6DSO32_XL_3XC_TAG,
3436 LSM6DSO32_GYRO_NC_T_2_TAG,
3437 LSM6DSO32_GYRO_NC_T_1_TAG,
3438 LSM6DSO32_GYRO_2XC_TAG,
3439 LSM6DSO32_GYRO_3XC_TAG,
3440 LSM6DSO32_SENSORHUB_SLAVE0_TAG,
3441 LSM6DSO32_SENSORHUB_SLAVE1_TAG,
3442 LSM6DSO32_SENSORHUB_SLAVE2_TAG,
3443 LSM6DSO32_SENSORHUB_SLAVE3_TAG,
3444 LSM6DSO32_STEP_COUNTER_TAG,
3445 LSM6DSO32_SENSORHUB_NACK_TAG = 0x19,
3446} lsm6dso32_fifo_tag_t;
3447int32_t lsm6dso32_fifo_cnt_event_batch_set(stmdev_ctx_t *ctx,
3448 lsm6dso32_trig_counter_bdr_t val);
3449int32_t lsm6dso32_fifo_cnt_event_batch_get(stmdev_ctx_t *ctx,
3450 lsm6dso32_trig_counter_bdr_t *val);
3451
3452int32_t lsm6dso32_rst_batch_counter_set(stmdev_ctx_t *ctx,
3453 uint8_t val);
3454int32_t lsm6dso32_rst_batch_counter_get(stmdev_ctx_t *ctx,
3455 uint8_t *val);
3456
3457int32_t lsm6dso32_batch_counter_threshold_set(stmdev_ctx_t *ctx,
3458 uint16_t val);
3459int32_t lsm6dso32_batch_counter_threshold_get(stmdev_ctx_t *ctx,
3460 uint16_t *val);
3461
3462int32_t lsm6dso32_fifo_data_level_get(stmdev_ctx_t *ctx,
3463 uint16_t *val);
3464
3465int32_t lsm6dso32_fifo_status_get(stmdev_ctx_t *ctx,
3466 lsm6dso32_fifo_status2_t *val);
3467
3468int32_t lsm6dso32_fifo_full_flag_get(stmdev_ctx_t *ctx, uint8_t *val);
3469
3470int32_t lsm6dso32_fifo_ovr_flag_get(stmdev_ctx_t *ctx, uint8_t *val);
3471
3472int32_t lsm6dso32_fifo_wtm_flag_get(stmdev_ctx_t *ctx, uint8_t *val);
3473
3474int32_t lsm6dso32_fifo_sensor_tag_get(stmdev_ctx_t *ctx,
3475 lsm6dso32_fifo_tag_t *val);
3476
3477int32_t lsm6dso32_fifo_pedo_batch_set(stmdev_ctx_t *ctx, uint8_t val);
3478int32_t lsm6dso32_fifo_pedo_batch_get(stmdev_ctx_t *ctx,
3479 uint8_t *val);
3480
3481int32_t lsm6dso32_sh_batch_slave_0_set(stmdev_ctx_t *ctx,
3482 uint8_t val);
3483int32_t lsm6dso32_sh_batch_slave_0_get(stmdev_ctx_t *ctx,
3484 uint8_t *val);
3485
3486int32_t lsm6dso32_sh_batch_slave_1_set(stmdev_ctx_t *ctx,
3487 uint8_t val);
3488int32_t lsm6dso32_sh_batch_slave_1_get(stmdev_ctx_t *ctx,
3489 uint8_t *val);
3490
3491int32_t lsm6dso32_sh_batch_slave_2_set(stmdev_ctx_t *ctx,
3492 uint8_t val);
3493int32_t lsm6dso32_sh_batch_slave_2_get(stmdev_ctx_t *ctx,
3494 uint8_t *val);
3495
3496int32_t lsm6dso32_sh_batch_slave_3_set(stmdev_ctx_t *ctx,
3497 uint8_t val);
3498int32_t lsm6dso32_sh_batch_slave_3_get(stmdev_ctx_t *ctx,
3499 uint8_t *val);
3504typedef enum
3505{
3506 LSM6DSO32_DEN_DISABLE = 0,
3507 LSM6DSO32_LEVEL_FIFO = 6,
3508 LSM6DSO32_LEVEL_LETCHED = 3,
3509 LSM6DSO32_LEVEL_TRIGGER = 2,
3510 LSM6DSO32_EDGE_TRIGGER = 4,
3511} lsm6dso32_den_mode_t;
3512int32_t lsm6dso32_den_mode_set(stmdev_ctx_t *ctx,
3513 lsm6dso32_den_mode_t val);
3514int32_t lsm6dso32_den_mode_get(stmdev_ctx_t *ctx,
3515 lsm6dso32_den_mode_t *val);
3516
3517typedef enum
3518{
3519 LSM6DSO32_DEN_ACT_LOW = 0,
3520 LSM6DSO32_DEN_ACT_HIGH = 1,
3521} lsm6dso32_den_lh_t;
3522int32_t lsm6dso32_den_polarity_set(stmdev_ctx_t *ctx,
3523 lsm6dso32_den_lh_t val);
3524int32_t lsm6dso32_den_polarity_get(stmdev_ctx_t *ctx,
3525 lsm6dso32_den_lh_t *val);
3526
3527typedef enum
3528{
3529 LSM6DSO32_STAMP_IN_GY_DATA = 0,
3530 LSM6DSO32_STAMP_IN_XL_DATA = 1,
3531 LSM6DSO32_STAMP_IN_GY_XL_DATA = 2,
3532} lsm6dso32_den_xl_g_t;
3533int32_t lsm6dso32_den_enable_set(stmdev_ctx_t *ctx,
3534 lsm6dso32_den_xl_g_t val);
3535int32_t lsm6dso32_den_enable_get(stmdev_ctx_t *ctx,
3536 lsm6dso32_den_xl_g_t *val);
3537
3538int32_t lsm6dso32_den_mark_axis_x_set(stmdev_ctx_t *ctx, uint8_t val);
3539int32_t lsm6dso32_den_mark_axis_x_get(stmdev_ctx_t *ctx,
3540 uint8_t *val);
3541
3542int32_t lsm6dso32_den_mark_axis_y_set(stmdev_ctx_t *ctx, uint8_t val);
3543int32_t lsm6dso32_den_mark_axis_y_get(stmdev_ctx_t *ctx,
3544 uint8_t *val);
3545
3546int32_t lsm6dso32_den_mark_axis_z_set(stmdev_ctx_t *ctx, uint8_t val);
3547int32_t lsm6dso32_den_mark_axis_z_get(stmdev_ctx_t *ctx,
3548 uint8_t *val);
3549
3550typedef enum
3551{
3552 LSM6DSO32_PEDO_DISABLE = 0x00,
3553 LSM6DSO32_PEDO_BASE_MODE = 0x01,
3554 LSM6DSO32_PEDO_ADV_MODE = 0x03,
3555 LSM6DSO32_FALSE_STEP_REJ = 0x13,
3556 LSM6DSO32_FALSE_STEP_REJ_ADV_MODE = 0x33,
3557} lsm6dso32_pedo_md_t;
3558int32_t lsm6dso32_pedo_sens_set(stmdev_ctx_t *ctx,
3559 lsm6dso32_pedo_md_t val);
3560int32_t lsm6dso32_pedo_sens_get(stmdev_ctx_t *ctx,
3561 lsm6dso32_pedo_md_t *val);
3562
3563int32_t lsm6dso32_pedo_step_detect_get(stmdev_ctx_t *ctx,
3564 uint8_t *val);
3565
3566int32_t lsm6dso32_pedo_debounce_steps_set(stmdev_ctx_t *ctx,
3567 uint8_t *buff);
3568int32_t lsm6dso32_pedo_debounce_steps_get(stmdev_ctx_t *ctx,
3569 uint8_t *buff);
3570
3571int32_t lsm6dso32_pedo_steps_period_set(stmdev_ctx_t *ctx,
3572 uint16_t val);
3573int32_t lsm6dso32_pedo_steps_period_get(stmdev_ctx_t *ctx,
3574 uint16_t *val);
3575
3576typedef enum
3577{
3578 LSM6DSO32_EVERY_STEP = 0,
3579 LSM6DSO32_COUNT_OVERFLOW = 1,
3580} lsm6dso32_carry_count_en_t;
3581int32_t lsm6dso32_pedo_int_mode_set(stmdev_ctx_t *ctx,
3582 lsm6dso32_carry_count_en_t val);
3583int32_t lsm6dso32_pedo_int_mode_get(stmdev_ctx_t *ctx,
3584 lsm6dso32_carry_count_en_t *val);
3585
3586int32_t lsm6dso32_motion_sens_set(stmdev_ctx_t *ctx, uint8_t val);
3587int32_t lsm6dso32_motion_sens_get(stmdev_ctx_t *ctx, uint8_t *val);
3588
3589int32_t lsm6dso32_motion_flag_data_ready_get(stmdev_ctx_t *ctx,
3590 uint8_t *val);
3599int32_t lsm6dso32_tilt_sens_set(stmdev_ctx_t *ctx, uint8_t val);
3600int32_t lsm6dso32_tilt_sens_get(stmdev_ctx_t *ctx, uint8_t *val);
3601
3602int32_t lsm6dso32_tilt_flag_data_ready_get(stmdev_ctx_t *ctx,
3603 uint8_t *val);
3607int32_t lsm6dso32_mag_sensitivity_set(stmdev_ctx_t *ctx,
3608 uint16_t val);
3609int32_t lsm6dso32_mag_sensitivity_get(stmdev_ctx_t *ctx,
3610 uint16_t *val);
3611
3612int32_t lsm6dso32_mag_offset_set(stmdev_ctx_t *ctx, int16_t *val);
3613int32_t lsm6dso32_mag_offset_get(stmdev_ctx_t *ctx, int16_t *val);
3614
3615int32_t lsm6dso32_mag_soft_iron_set(stmdev_ctx_t *ctx, int16_t *val);
3616int32_t lsm6dso32_mag_soft_iron_get(stmdev_ctx_t *ctx, int16_t *val);
3617
3618typedef enum
3619{
3620 LSM6DSO32_Z_EQ_Y = 0,
3621 LSM6DSO32_Z_EQ_MIN_Y = 1,
3622 LSM6DSO32_Z_EQ_X = 2,
3623 LSM6DSO32_Z_EQ_MIN_X = 3,
3624 LSM6DSO32_Z_EQ_MIN_Z = 4,
3625 LSM6DSO32_Z_EQ_Z = 5,
3626} lsm6dso32_mag_z_axis_t;
3627int32_t lsm6dso32_mag_z_orient_set(stmdev_ctx_t *ctx,
3628 lsm6dso32_mag_z_axis_t val);
3629int32_t lsm6dso32_mag_z_orient_get(stmdev_ctx_t *ctx,
3630 lsm6dso32_mag_z_axis_t *val);
3631
3632typedef enum
3633{
3634 LSM6DSO32_Y_EQ_Y = 0,
3635 LSM6DSO32_Y_EQ_MIN_Y = 1,
3636 LSM6DSO32_Y_EQ_X = 2,
3637 LSM6DSO32_Y_EQ_MIN_X = 3,
3638 LSM6DSO32_Y_EQ_MIN_Z = 4,
3639 LSM6DSO32_Y_EQ_Z = 5,
3640} lsm6dso32_mag_y_axis_t;
3641int32_t lsm6dso32_mag_y_orient_set(stmdev_ctx_t *ctx,
3642 lsm6dso32_mag_y_axis_t val);
3643int32_t lsm6dso32_mag_y_orient_get(stmdev_ctx_t *ctx,
3644 lsm6dso32_mag_y_axis_t *val);
3645
3646typedef enum
3647{
3648 LSM6DSO32_X_EQ_Y = 0,
3649 LSM6DSO32_X_EQ_MIN_Y = 1,
3650 LSM6DSO32_X_EQ_X = 2,
3651 LSM6DSO32_X_EQ_MIN_X = 3,
3652 LSM6DSO32_X_EQ_MIN_Z = 4,
3653 LSM6DSO32_X_EQ_Z = 5,
3654} lsm6dso32_mag_x_axis_t;
3655int32_t lsm6dso32_mag_x_orient_set(stmdev_ctx_t *ctx,
3656 lsm6dso32_mag_x_axis_t val);
3657int32_t lsm6dso32_mag_x_orient_get(stmdev_ctx_t *ctx,
3658 lsm6dso32_mag_x_axis_t *val);
3667int32_t lsm6dso32_long_cnt_flag_data_ready_get(stmdev_ctx_t *ctx,
3668 uint8_t *val);
3669
3670int32_t lsm6dso32_emb_fsm_en_set(stmdev_ctx_t *ctx, uint8_t val);
3671int32_t lsm6dso32_emb_fsm_en_get(stmdev_ctx_t *ctx, uint8_t *val);
3672
3673typedef struct
3674{
3675 lsm6dso32_fsm_enable_a_t fsm_enable_a;
3676 lsm6dso32_fsm_enable_b_t fsm_enable_b;
3677} lsm6dso32_emb_fsm_enable_t;
3678int32_t lsm6dso32_fsm_enable_set(stmdev_ctx_t *ctx,
3679 lsm6dso32_emb_fsm_enable_t *val);
3680int32_t lsm6dso32_fsm_enable_get(stmdev_ctx_t *ctx,
3681 lsm6dso32_emb_fsm_enable_t *val);
3682
3683int32_t lsm6dso32_long_cnt_set(stmdev_ctx_t *ctx, uint16_t val);
3684int32_t lsm6dso32_long_cnt_get(stmdev_ctx_t *ctx, uint16_t *val);
3685
3686typedef enum
3687{
3688 LSM6DSO32_LC_NORMAL = 0,
3689 LSM6DSO32_LC_CLEAR = 1,
3690 LSM6DSO32_LC_CLEAR_DONE = 2,
3691} lsm6dso32_fsm_lc_clr_t;
3692int32_t lsm6dso32_long_clr_set(stmdev_ctx_t *ctx,
3693 lsm6dso32_fsm_lc_clr_t val);
3694int32_t lsm6dso32_long_clr_get(stmdev_ctx_t *ctx,
3695 lsm6dso32_fsm_lc_clr_t *val);
3696
3697typedef struct
3698{
3699 lsm6dso32_fsm_outs1_t fsm_outs1;
3700 lsm6dso32_fsm_outs2_t fsm_outs2;
3701 lsm6dso32_fsm_outs3_t fsm_outs3;
3702 lsm6dso32_fsm_outs4_t fsm_outs4;
3703 lsm6dso32_fsm_outs5_t fsm_outs5;
3704 lsm6dso32_fsm_outs6_t fsm_outs6;
3705 lsm6dso32_fsm_outs7_t fsm_outs7;
3706 lsm6dso32_fsm_outs8_t fsm_outs8;
3707 lsm6dso32_fsm_outs1_t fsm_outs9;
3708 lsm6dso32_fsm_outs2_t fsm_outs10;
3709 lsm6dso32_fsm_outs3_t fsm_outs11;
3710 lsm6dso32_fsm_outs4_t fsm_outs12;
3711 lsm6dso32_fsm_outs5_t fsm_outs13;
3712 lsm6dso32_fsm_outs6_t fsm_outs14;
3713 lsm6dso32_fsm_outs7_t fsm_outs15;
3714 lsm6dso32_fsm_outs8_t fsm_outs16;
3715} lsm6dso32_fsm_out_t;
3716int32_t lsm6dso32_fsm_out_get(stmdev_ctx_t *ctx,
3717 lsm6dso32_fsm_out_t *val);
3718
3719typedef enum
3720{
3721 LSM6DSO32_ODR_FSM_12Hz5 = 0,
3722 LSM6DSO32_ODR_FSM_26Hz = 1,
3723 LSM6DSO32_ODR_FSM_52Hz = 2,
3724 LSM6DSO32_ODR_FSM_104Hz = 3,
3725} lsm6dso32_fsm_odr_t;
3726int32_t lsm6dso32_fsm_data_rate_set(stmdev_ctx_t *ctx,
3727 lsm6dso32_fsm_odr_t val);
3728int32_t lsm6dso32_fsm_data_rate_get(stmdev_ctx_t *ctx,
3729 lsm6dso32_fsm_odr_t *val);
3730
3731int32_t lsm6dso32_fsm_init_set(stmdev_ctx_t *ctx, uint8_t val);
3732int32_t lsm6dso32_fsm_init_get(stmdev_ctx_t *ctx, uint8_t *val);
3733
3734int32_t lsm6dso32_long_cnt_int_value_set(stmdev_ctx_t *ctx,
3735 uint16_t val);
3736int32_t lsm6dso32_long_cnt_int_value_get(stmdev_ctx_t *ctx,
3737 uint16_t *val);
3738
3739int32_t lsm6dso32_fsm_number_of_programs_set(stmdev_ctx_t *ctx,
3740 uint8_t *buff);
3741int32_t lsm6dso32_fsm_number_of_programs_get(stmdev_ctx_t *ctx,
3742 uint8_t *buff);
3743
3744int32_t lsm6dso32_fsm_start_address_set(stmdev_ctx_t *ctx,
3745 uint16_t val);
3746int32_t lsm6dso32_fsm_start_address_get(stmdev_ctx_t *ctx,
3747 uint16_t *val);
3751typedef struct
3752{
3753 lsm6dso32_sensor_hub_1_t sh_byte_1;
3754 lsm6dso32_sensor_hub_2_t sh_byte_2;
3755 lsm6dso32_sensor_hub_3_t sh_byte_3;
3756 lsm6dso32_sensor_hub_4_t sh_byte_4;
3757 lsm6dso32_sensor_hub_5_t sh_byte_5;
3758 lsm6dso32_sensor_hub_6_t sh_byte_6;
3759 lsm6dso32_sensor_hub_7_t sh_byte_7;
3760 lsm6dso32_sensor_hub_8_t sh_byte_8;
3761 lsm6dso32_sensor_hub_9_t sh_byte_9;
3762 lsm6dso32_sensor_hub_10_t sh_byte_10;
3763 lsm6dso32_sensor_hub_11_t sh_byte_11;
3764 lsm6dso32_sensor_hub_12_t sh_byte_12;
3765 lsm6dso32_sensor_hub_13_t sh_byte_13;
3766 lsm6dso32_sensor_hub_14_t sh_byte_14;
3767 lsm6dso32_sensor_hub_15_t sh_byte_15;
3768 lsm6dso32_sensor_hub_16_t sh_byte_16;
3769 lsm6dso32_sensor_hub_17_t sh_byte_17;
3770 lsm6dso32_sensor_hub_18_t sh_byte_18;
3771} lsm6dso32_emb_sh_read_t;
3772int32_t lsm6dso32_sh_read_data_raw_get(stmdev_ctx_t *ctx,
3773 lsm6dso32_emb_sh_read_t *val);
3774
3775typedef enum
3776{
3777 LSM6DSO32_SLV_0 = 0,
3778 LSM6DSO32_SLV_0_1 = 1,
3779 LSM6DSO32_SLV_0_1_2 = 2,
3780 LSM6DSO32_SLV_0_1_2_3 = 3,
3781} lsm6dso32_aux_sens_on_t;
3782int32_t lsm6dso32_sh_slave_connected_set(stmdev_ctx_t *ctx,
3783 lsm6dso32_aux_sens_on_t val);
3784int32_t lsm6dso32_sh_slave_connected_get(stmdev_ctx_t *ctx,
3785 lsm6dso32_aux_sens_on_t *val);
3786
3787int32_t lsm6dso32_sh_master_set(stmdev_ctx_t *ctx, uint8_t val);
3788int32_t lsm6dso32_sh_master_get(stmdev_ctx_t *ctx, uint8_t *val);
3789
3790typedef enum
3791{
3792 LSM6DSO32_EXT_PULL_UP = 0,
3793 LSM6DSO32_INTERNAL_PULL_UP = 1,
3794} lsm6dso32_shub_pu_en_t;
3795int32_t lsm6dso32_sh_pin_mode_set(stmdev_ctx_t *ctx,
3796 lsm6dso32_shub_pu_en_t val);
3797int32_t lsm6dso32_sh_pin_mode_get(stmdev_ctx_t *ctx,
3798 lsm6dso32_shub_pu_en_t *val);
3799
3800int32_t lsm6dso32_sh_pass_through_set(stmdev_ctx_t *ctx, uint8_t val);
3801int32_t lsm6dso32_sh_pass_through_get(stmdev_ctx_t *ctx,
3802 uint8_t *val);
3803
3804typedef enum
3805{
3806 LSM6DSO32_EXT_ON_INT2_PIN = 1,
3807 LSM6DSO32_XL_GY_DRDY = 0,
3808} lsm6dso32_start_config_t;
3809int32_t lsm6dso32_sh_syncro_mode_set(stmdev_ctx_t *ctx,
3810 lsm6dso32_start_config_t val);
3811int32_t lsm6dso32_sh_syncro_mode_get(stmdev_ctx_t *ctx,
3812 lsm6dso32_start_config_t *val);
3813
3814typedef enum
3815{
3816 LSM6DSO32_EACH_SH_CYCLE = 0,
3817 LSM6DSO32_ONLY_FIRST_CYCLE = 1,
3818} lsm6dso32_write_once_t;
3819int32_t lsm6dso32_sh_write_mode_set(stmdev_ctx_t *ctx,
3820 lsm6dso32_write_once_t val);
3821int32_t lsm6dso32_sh_write_mode_get(stmdev_ctx_t *ctx,
3822 lsm6dso32_write_once_t *val);
3823
3824int32_t lsm6dso32_sh_reset_set(stmdev_ctx_t *ctx);
3825int32_t lsm6dso32_sh_reset_get(stmdev_ctx_t *ctx, uint8_t *val);
3826
3827typedef enum
3828{
3829 LSM6DSO32_SH_ODR_104Hz = 0,
3830 LSM6DSO32_SH_ODR_52Hz = 1,
3831 LSM6DSO32_SH_ODR_26Hz = 2,
3832 LSM6DSO32_SH_ODR_13Hz = 3,
3833} lsm6dso32_shub_odr_t;
3834int32_t lsm6dso32_sh_data_rate_set(stmdev_ctx_t *ctx,
3835 lsm6dso32_shub_odr_t val);
3836int32_t lsm6dso32_sh_data_rate_get(stmdev_ctx_t *ctx,
3837 lsm6dso32_shub_odr_t *val);
3838
3839typedef struct
3840{
3841 uint8_t slv0_add;
3842 uint8_t slv0_subadd;
3843 uint8_t slv0_data;
3844} lsm6dso32_sh_cfg_write_t;
3845int32_t lsm6dso32_sh_cfg_write(stmdev_ctx_t *ctx,
3846 lsm6dso32_sh_cfg_write_t *val);
3847
3848typedef struct
3849{
3850 uint8_t slv_add;
3851 uint8_t slv_subadd;
3852 uint8_t slv_len;
3853} lsm6dso32_sh_cfg_read_t;
3854int32_t lsm6dso32_sh_slv0_cfg_read(stmdev_ctx_t *ctx,
3855 lsm6dso32_sh_cfg_read_t *val);
3856int32_t lsm6dso32_sh_slv1_cfg_read(stmdev_ctx_t *ctx,
3857 lsm6dso32_sh_cfg_read_t *val);
3858int32_t lsm6dso32_sh_slv2_cfg_read(stmdev_ctx_t *ctx,
3859 lsm6dso32_sh_cfg_read_t *val);
3860int32_t lsm6dso32_sh_slv3_cfg_read(stmdev_ctx_t *ctx,
3861 lsm6dso32_sh_cfg_read_t *val);
3862
3863int32_t lsm6dso32_sh_status_get(stmdev_ctx_t *ctx,
3864 lsm6dso32_status_master_t *val);
3865
3871#ifdef __cplusplus
3872}
3873#endif
3874
3875#endif /*LSM6DSO32_DRIVER_H */
3876
3877/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
stmdev_mdelay_ptr
void(* stmdev_mdelay_ptr)(uint32_t millisec)
Definition lsm6dso32_reg.h:122
stmdev_read_ptr
int32_t(* stmdev_read_ptr)(void *, uint8_t, uint8_t *, uint16_t)
Definition lsm6dso32_reg.h:121
stmdev_write_ptr
int32_t(* stmdev_write_ptr)(void *, uint8_t, const uint8_t *, uint16_t)
Definition lsm6dso32_reg.h:120
lsm6dso32_den_mark_axis_x_set
int32_t lsm6dso32_den_mark_axis_x_set(stmdev_ctx_t *ctx, uint8_t val)
DEN value stored in LSB of X-axis.[set].
Definition lsm6dso32_reg.c:6800
lsm6dso32_den_mode_set
int32_t lsm6dso32_den_mode_set(stmdev_ctx_t *ctx, lsm6dso32_den_mode_t val)
DEN functionality marking mode.[set].
Definition lsm6dso32_reg.c:6607
lsm6dso32_den_mark_axis_z_get
int32_t lsm6dso32_den_mark_axis_z_get(stmdev_ctx_t *ctx, uint8_t *val)
DEN value stored in LSB of Z-axis.[get].
Definition lsm6dso32_reg.c:6910
lsm6dso32_den_mark_axis_y_set
int32_t lsm6dso32_den_mark_axis_y_set(stmdev_ctx_t *ctx, uint8_t val)
DEN value stored in LSB of Y-axis.[set].
Definition lsm6dso32_reg.c:6843
lsm6dso32_den_mode_get
int32_t lsm6dso32_den_mode_get(stmdev_ctx_t *ctx, lsm6dso32_den_mode_t *val)
DEN functionality marking mode.[get].
Definition lsm6dso32_reg.c:6632
lsm6dso32_den_enable_get
int32_t lsm6dso32_den_enable_get(stmdev_ctx_t *ctx, lsm6dso32_den_xl_g_t *val)
DEN enable.[get].
Definition lsm6dso32_reg.c:6762
lsm6dso32_den_mark_axis_x_get
int32_t lsm6dso32_den_mark_axis_x_get(stmdev_ctx_t *ctx, uint8_t *val)
DEN value stored in LSB of X-axis.[get].
Definition lsm6dso32_reg.c:6824
lsm6dso32_den_mark_axis_y_get
int32_t lsm6dso32_den_mark_axis_y_get(stmdev_ctx_t *ctx, uint8_t *val)
DEN value stored in LSB of Y-axis.[get].
Definition lsm6dso32_reg.c:6867
lsm6dso32_den_polarity_get
int32_t lsm6dso32_den_polarity_get(stmdev_ctx_t *ctx, lsm6dso32_den_lh_t *val)
DEN active level configuration.[get].
Definition lsm6dso32_reg.c:6703
lsm6dso32_den_enable_set
int32_t lsm6dso32_den_enable_set(stmdev_ctx_t *ctx, lsm6dso32_den_xl_g_t val)
DEN enable.[set].
Definition lsm6dso32_reg.c:6737
lsm6dso32_den_polarity_set
int32_t lsm6dso32_den_polarity_set(stmdev_ctx_t *ctx, lsm6dso32_den_lh_t val)
DEN active level configuration.[set].
Definition lsm6dso32_reg.c:6678
lsm6dso32_den_mark_axis_z_set
int32_t lsm6dso32_den_mark_axis_z_set(stmdev_ctx_t *ctx, uint8_t val)
DEN value stored in LSB of Z-axis.[set].
Definition lsm6dso32_reg.c:6886
lsm6dso32_angular_rate_raw_get
int32_t lsm6dso32_angular_rate_raw_get(stmdev_ctx_t *ctx, int16_t *val)
Angular rate sensor. The value is expressed as a 16-bit word in two’s complement.[get].
Definition lsm6dso32_reg.c:1273
lsm6dso32_temperature_raw_get
int32_t lsm6dso32_temperature_raw_get(stmdev_ctx_t *ctx, int16_t *val)
Temperature data output register (r). L and H registers together express a 16-bit word in two’s compl...
Definition lsm6dso32_reg.c:1252
lsm6dso32_number_of_steps_get
int32_t lsm6dso32_number_of_steps_get(stmdev_ctx_t *ctx, uint16_t *val)
Step counter output register.[get].
Definition lsm6dso32_reg.c:1341
lsm6dso32_steps_reset
int32_t lsm6dso32_steps_reset(stmdev_ctx_t *ctx)
Reset step counter register.[get].
Definition lsm6dso32_reg.c:1371
lsm6dso32_rounding_mode_set
int32_t lsm6dso32_rounding_mode_set(stmdev_ctx_t *ctx, lsm6dso32_rounding_t val)
Circular burst-mode (rounding) read of the output registers.[set].
Definition lsm6dso32_reg.c:1183
lsm6dso32_rounding_mode_get
int32_t lsm6dso32_rounding_mode_get(stmdev_ctx_t *ctx, lsm6dso32_rounding_t *val)
Gyroscope UI chain full-scale selection.[get].
Definition lsm6dso32_reg.c:1208
lsm6dso32_fifo_out_raw_get
int32_t lsm6dso32_fifo_out_raw_get(stmdev_ctx_t *ctx, uint8_t *buff)
FIFO data output [get].
Definition lsm6dso32_reg.c:1324
lsm6dso32_acceleration_raw_get
int32_t lsm6dso32_acceleration_raw_get(stmdev_ctx_t *ctx, int16_t *val)
Linear acceleration output register. The value is expressed as a 16-bit word in two’s complement....
Definition lsm6dso32_reg.c:1299
lsm6dso32_act_mode_get
int32_t lsm6dso32_act_mode_get(stmdev_ctx_t *ctx, lsm6dso32_inact_en_t *val)
Enable inactivity function.[get].
Definition lsm6dso32_reg.c:4145
lsm6dso32_mag_offset_get
int32_t lsm6dso32_mag_offset_get(stmdev_ctx_t *ctx, int16_t *val)
Offset for hard-iron compensation register (r/w).[get].
Definition lsm6dso32_reg.c:7615
lsm6dso32_mag_x_orient_get
int32_t lsm6dso32_mag_x_orient_get(stmdev_ctx_t *ctx, lsm6dso32_mag_x_axis_t *val)
Magnetometer X-axis coordinates rotation (to be aligned to accelerometer/gyroscope axes orientation)....
Definition lsm6dso32_reg.c:8105
lsm6dso32_6d_threshold_set
int32_t lsm6dso32_6d_threshold_set(stmdev_ctx_t *ctx, lsm6dso32_sixd_ths_t val)
Threshold for 4D/6D function.[set].
Definition lsm6dso32_reg.c:4822
lsm6dso32_mag_y_orient_set
int32_t lsm6dso32_mag_y_orient_set(stmdev_ctx_t *ctx, lsm6dso32_mag_y_axis_t val)
Magnetometer Y-axis coordinates rotation (to be aligned to accelerometer/gyroscope axes orientation)....
Definition lsm6dso32_reg.c:7991
lsm6dso32_act_sleep_dur_get
int32_t lsm6dso32_act_sleep_dur_get(stmdev_ctx_t *ctx, uint8_t *val)
Duration to go in sleep mode.[get] 1 LSb = 512 / ODR.
Definition lsm6dso32_reg.c:4213
lsm6dso32_act_mode_set
int32_t lsm6dso32_act_mode_set(stmdev_ctx_t *ctx, lsm6dso32_inact_en_t val)
Enable inactivity function.[set].
Definition lsm6dso32_reg.c:4120
lsm6dso32_act_pin_notification_get
int32_t lsm6dso32_act_pin_notification_get(stmdev_ctx_t *ctx, lsm6dso32_sleep_status_on_int_t *val)
Drives the sleep status instead of sleep change on INT pins (only if INT1_SLEEP_CHANGE or INT2_SLEEP_...
Definition lsm6dso32_reg.c:4086
lsm6dso32_mag_y_orient_get
int32_t lsm6dso32_mag_y_orient_get(stmdev_ctx_t *ctx, lsm6dso32_mag_y_axis_t *val)
Magnetometer Y-axis coordinates rotation (to be aligned to accelerometer/gyroscope axes orientation)....
Definition lsm6dso32_reg.c:8021
lsm6dso32_mag_z_orient_get
int32_t lsm6dso32_mag_z_orient_get(stmdev_ctx_t *ctx, lsm6dso32_mag_z_axis_t *val)
Magnetometer Z-axis coordinates rotation (to be aligned to accelerometer/gyroscope axes orientation)....
Definition lsm6dso32_reg.c:7937
lsm6dso32_mag_offset_set
int32_t lsm6dso32_mag_offset_set(stmdev_ctx_t *ctx, int16_t *val)
Offset for hard-iron compensation register (r/w).[set].
Definition lsm6dso32_reg.c:7560
lsm6dso32_act_pin_notification_set
int32_t lsm6dso32_act_pin_notification_set(stmdev_ctx_t *ctx, lsm6dso32_sleep_status_on_int_t val)
Drives the sleep status instead of sleep change on INT pins (only if INT1_SLEEP_CHANGE or INT2_SLEEP_...
Definition lsm6dso32_reg.c:4058
lsm6dso32_mag_sensitivity_set
int32_t lsm6dso32_mag_sensitivity_set(stmdev_ctx_t *ctx, uint16_t val)
External magnetometer sensitivity value register.[set].
Definition lsm6dso32_reg.c:7505
lsm6dso32_mag_z_orient_set
int32_t lsm6dso32_mag_z_orient_set(stmdev_ctx_t *ctx, lsm6dso32_mag_z_axis_t val)
Magnetometer Z-axis coordinates rotation (to be aligned to accelerometer/gyroscope axes orientation)....
Definition lsm6dso32_reg.c:7907
lsm6dso32_6d_threshold_get
int32_t lsm6dso32_6d_threshold_get(stmdev_ctx_t *ctx, lsm6dso32_sixd_ths_t *val)
Threshold for 4D/6D function.[get].
Definition lsm6dso32_reg.c:4847
lsm6dso32_4d_mode_set
int32_t lsm6dso32_4d_mode_set(stmdev_ctx_t *ctx, uint8_t val)
4D orientation detection enable.[set]
Definition lsm6dso32_reg.c:4881
lsm6dso32_mag_soft_iron_get
int32_t lsm6dso32_mag_soft_iron_get(stmdev_ctx_t *ctx, int16_t *val)
Soft-iron (3x3 symmetric) matrix correction register (r/w). The value is expressed as half-precision ...
Definition lsm6dso32_reg.c:7793
lsm6dso32_mag_sensitivity_get
int32_t lsm6dso32_mag_sensitivity_get(stmdev_ctx_t *ctx, uint16_t *val)
External magnetometer sensitivity value register.[get].
Definition lsm6dso32_reg.c:7532
lsm6dso32_4d_mode_get
int32_t lsm6dso32_4d_mode_get(stmdev_ctx_t *ctx, uint8_t *val)
4D orientation detection enable.[get]
Definition lsm6dso32_reg.c:4905
lsm6dso32_act_sleep_dur_set
int32_t lsm6dso32_act_sleep_dur_set(stmdev_ctx_t *ctx, uint8_t val)
Duration to go in sleep mode.[set] 1 LSb = 512 / ODR.
Definition lsm6dso32_reg.c:4188
lsm6dso32_gy_sleep_mode_get
int32_t lsm6dso32_gy_sleep_mode_get(stmdev_ctx_t *ctx, uint8_t *val)
Enables gyroscope Sleep mode.[get].
Definition lsm6dso32_reg.c:4036
lsm6dso32_gy_sleep_mode_set
int32_t lsm6dso32_gy_sleep_mode_set(stmdev_ctx_t *ctx, uint8_t val)
Enables gyroscope Sleep mode.[set].
Definition lsm6dso32_reg.c:4012
lsm6dso32_mag_x_orient_set
int32_t lsm6dso32_mag_x_orient_set(stmdev_ctx_t *ctx, lsm6dso32_mag_x_axis_t val)
Magnetometer X-axis coordinates rotation (to be aligned to accelerometer/gyroscope axes orientation)....
Definition lsm6dso32_reg.c:8075
lsm6dso32_mag_soft_iron_set
int32_t lsm6dso32_mag_soft_iron_set(stmdev_ctx_t *ctx, int16_t *val)
Soft-iron (3x3 symmetric) matrix correction register (r/w). The value is expressed as half-precision ...
Definition lsm6dso32_reg.c:7676
lsm6dso32_write_reg
int32_t lsm6dso32_write_reg(stmdev_ctx_t *ctx, uint8_t reg, uint8_t *data, uint16_t len)
Write generic device register.
Definition lsm6dso32_reg.c:75
lsm6dso32_read_reg
int32_t lsm6dso32_read_reg(stmdev_ctx_t *ctx, uint8_t reg, uint8_t *data, uint16_t len)
Read generic device register.
Definition lsm6dso32_reg.c:54
lsm6dso32_pedo_int_mode_set
int32_t lsm6dso32_pedo_int_mode_set(stmdev_ctx_t *ctx, lsm6dso32_carry_count_en_t val)
Set when user wants to generate interrupt on count overflow event/every step.[set].
Definition lsm6dso32_reg.c:7207
lsm6dso32_pedo_sens_set
int32_t lsm6dso32_pedo_sens_set(stmdev_ctx_t *ctx, lsm6dso32_pedo_md_t val)
Enable pedometer algorithm.[set].
Definition lsm6dso32_reg.c:6942
lsm6dso32_pedo_steps_period_get
int32_t lsm6dso32_pedo_steps_period_get(stmdev_ctx_t *ctx, uint16_t *val)
Time period register for step detection on delta time (r/w).[get].
Definition lsm6dso32_reg.c:7178
lsm6dso32_pedo_step_detect_get
int32_t lsm6dso32_pedo_step_detect_get(stmdev_ctx_t *ctx, uint8_t *val)
Interrupt status bit for step detection.[get].
Definition lsm6dso32_reg.c:7081
lsm6dso32_pedo_sens_get
int32_t lsm6dso32_pedo_sens_get(stmdev_ctx_t *ctx, lsm6dso32_pedo_md_t *val)
Enable pedometer algorithm.[get].
Definition lsm6dso32_reg.c:7008
lsm6dso32_pedo_int_mode_get
int32_t lsm6dso32_pedo_int_mode_get(stmdev_ctx_t *ctx, lsm6dso32_carry_count_en_t *val)
Set when user wants to generate interrupt on count overflow event/every step.[get].
Definition lsm6dso32_reg.c:7235
lsm6dso32_pedo_debounce_steps_set
int32_t lsm6dso32_pedo_debounce_steps_set(stmdev_ctx_t *ctx, uint8_t *buff)
Pedometer debounce configuration register (r/w).[set].
Definition lsm6dso32_reg.c:7112
lsm6dso32_pedo_steps_period_set
int32_t lsm6dso32_pedo_steps_period_set(stmdev_ctx_t *ctx, uint16_t val)
Time period register for step detection on delta time (r/w).[set].
Definition lsm6dso32_reg.c:7150
lsm6dso32_pedo_debounce_steps_get
int32_t lsm6dso32_pedo_debounce_steps_get(stmdev_ctx_t *ctx, uint8_t *buff)
Pedometer debounce configuration register (r/w).[get].
Definition lsm6dso32_reg.c:7131
lsm6dso32_from_lsb_to_celsius
float_t lsm6dso32_from_lsb_to_celsius(int16_t lsb)
Definition lsm6dso32_reg.c:142
lsm6dso32_from_fs1000_to_mdps
float_t lsm6dso32_from_fs1000_to_mdps(int16_t lsb)
Definition lsm6dso32_reg.c:132
lsm6dso32_from_fs500_to_mdps
float_t lsm6dso32_from_fs500_to_mdps(int16_t lsb)
Definition lsm6dso32_reg.c:127
lsm6dso32_from_fs250_to_mdps
float_t lsm6dso32_from_fs250_to_mdps(int16_t lsb)
Definition lsm6dso32_reg.c:122
lsm6dso32_from_fs125_to_mdps
float_t lsm6dso32_from_fs125_to_mdps(int16_t lsb)
Definition lsm6dso32_reg.c:117
lsm6dso32_from_fs8_to_mg
float_t lsm6dso32_from_fs8_to_mg(int16_t lsb)
Definition lsm6dso32_reg.c:102
lsm6dso32_from_fs4_to_mg
float_t lsm6dso32_from_fs4_to_mg(int16_t lsb)
Definition lsm6dso32_reg.c:97
lsm6dso32_from_lsb_to_nsec
float_t lsm6dso32_from_lsb_to_nsec(int16_t lsb)
Definition lsm6dso32_reg.c:147
lsm6dso32_from_fs32_to_mg
float_t lsm6dso32_from_fs32_to_mg(int16_t lsb)
Definition lsm6dso32_reg.c:112
lsm6dso32_from_fs16_to_mg
float_t lsm6dso32_from_fs16_to_mg(int16_t lsb)
Definition lsm6dso32_reg.c:107
lsm6dso32_from_fs2000_to_mdps
float_t lsm6dso32_from_fs2000_to_mdps(int16_t lsb)
Definition lsm6dso32_reg.c:137
lsm6dso32_sh_data_rate_get
int32_t lsm6dso32_sh_data_rate_get(stmdev_ctx_t *ctx, lsm6dso32_shub_odr_t *val)
Rate at which the master communicates.[get].
Definition lsm6dso32_reg.c:9496
lsm6dso32_sh_data_rate_set
int32_t lsm6dso32_sh_data_rate_set(stmdev_ctx_t *ctx, lsm6dso32_shub_odr_t val)
Rate at which the master communicates.[set].
Definition lsm6dso32_reg.c:9461
lsm6dso32_sh_syncro_mode_set
int32_t lsm6dso32_sh_syncro_mode_set(stmdev_ctx_t *ctx, lsm6dso32_start_config_t val)
Sensor hub trigger signal selection.[set].
Definition lsm6dso32_reg.c:9223
lsm6dso32_sh_pin_mode_get
int32_t lsm6dso32_sh_pin_mode_get(stmdev_ctx_t *ctx, lsm6dso32_shub_pu_en_t *val)
Master I2C pull-up enable.[get].
Definition lsm6dso32_reg.c:9110
lsm6dso32_sh_slave_connected_get
int32_t lsm6dso32_sh_slave_connected_get(stmdev_ctx_t *ctx, lsm6dso32_aux_sens_on_t *val)
Number of external sensors to be read by the sensor hub.[get].
Definition lsm6dso32_reg.c:8954
lsm6dso32_sh_master_get
int32_t lsm6dso32_sh_master_get(stmdev_ctx_t *ctx, uint8_t *val)
Sensor hub I2C master enable.[get].
Definition lsm6dso32_reg.c:9043
lsm6dso32_sh_pass_through_set
int32_t lsm6dso32_sh_pass_through_set(stmdev_ctx_t *ctx, uint8_t val)
I2C interface pass-through.[set].
Definition lsm6dso32_reg.c:9156
lsm6dso32_sh_write_mode_set
int32_t lsm6dso32_sh_write_mode_set(stmdev_ctx_t *ctx, lsm6dso32_write_once_t val)
Slave 0 write operation is performed only at the first sensor hub cycle.[set].
Definition lsm6dso32_reg.c:9306
lsm6dso32_sh_slv1_cfg_read
int32_t lsm6dso32_sh_slv1_cfg_read(stmdev_ctx_t *ctx, lsm6dso32_sh_cfg_read_t *val)
Configure slave 0 for perform a write/read.[set].
Definition lsm6dso32_reg.c:9652
lsm6dso32_sh_slv2_cfg_read
int32_t lsm6dso32_sh_slv2_cfg_read(stmdev_ctx_t *ctx, lsm6dso32_sh_cfg_read_t *val)
Configure slave 0 for perform a write/read.[set].
Definition lsm6dso32_reg.c:9707
lsm6dso32_sh_cfg_write
int32_t lsm6dso32_sh_cfg_write(stmdev_ctx_t *ctx, lsm6dso32_sh_cfg_write_t *val)
Configure slave 0 for perform a write.[set].
Definition lsm6dso32_reg.c:9551
lsm6dso32_sh_slave_connected_set
int32_t lsm6dso32_sh_slave_connected_set(stmdev_ctx_t *ctx, lsm6dso32_aux_sens_on_t val)
Number of external sensors to be read by the sensor hub.[set].
Definition lsm6dso32_reg.c:8917
lsm6dso32_sh_pass_through_get
int32_t lsm6dso32_sh_pass_through_get(stmdev_ctx_t *ctx, uint8_t *val)
I2C interface pass-through.[get].
Definition lsm6dso32_reg.c:9193
lsm6dso32_sh_status_get
int32_t lsm6dso32_sh_status_get(stmdev_ctx_t *ctx, lsm6dso32_status_master_t *val)
Sensor hub source register.[get].
Definition lsm6dso32_reg.c:9814
lsm6dso32_sh_syncro_mode_get
int32_t lsm6dso32_sh_syncro_mode_get(stmdev_ctx_t *ctx, lsm6dso32_start_config_t *val)
Sensor hub trigger signal selection.[get].
Definition lsm6dso32_reg.c:9260
lsm6dso32_sh_master_set
int32_t lsm6dso32_sh_master_set(stmdev_ctx_t *ctx, uint8_t val)
Sensor hub I2C master enable.[set].
Definition lsm6dso32_reg.c:9007
lsm6dso32_sh_write_mode_get
int32_t lsm6dso32_sh_write_mode_get(stmdev_ctx_t *ctx, lsm6dso32_write_once_t *val)
Slave 0 write operation is performed only at the first sensor hub cycle.[get].
Definition lsm6dso32_reg.c:9344
lsm6dso32_sh_read_data_raw_get
int32_t lsm6dso32_sh_read_data_raw_get(stmdev_ctx_t *ctx, lsm6dso32_emb_sh_read_t *val)
Sensor hub output registers.[get].
Definition lsm6dso32_reg.c:8888
lsm6dso32_sh_reset_get
int32_t lsm6dso32_sh_reset_get(stmdev_ctx_t *ctx, uint8_t *val)
Reset Master logic and output registers.[get].
Definition lsm6dso32_reg.c:9431
lsm6dso32_sh_reset_set
int32_t lsm6dso32_sh_reset_set(stmdev_ctx_t *ctx)
Reset Master logic and output registers.[set].
Definition lsm6dso32_reg.c:9388
lsm6dso32_sh_pin_mode_set
int32_t lsm6dso32_sh_pin_mode_set(stmdev_ctx_t *ctx, lsm6dso32_shub_pu_en_t val)
Master I2C pull-up enable.[set].
Definition lsm6dso32_reg.c:9073
lsm6dso32_sh_slv0_cfg_read
int32_t lsm6dso32_sh_slv0_cfg_read(stmdev_ctx_t *ctx, lsm6dso32_sh_cfg_read_t *val)
Configure slave 0 for perform a read.[set].
Definition lsm6dso32_reg.c:9597
lsm6dso32_sh_slv3_cfg_read
int32_t lsm6dso32_sh_slv3_cfg_read(stmdev_ctx_t *ctx, lsm6dso32_sh_cfg_read_t *val)
Configure slave 0 for perform a write/read.[set].
Definition lsm6dso32_reg.c:9762
lsm6dso32_timestamp_set
int32_t lsm6dso32_timestamp_set(stmdev_ctx_t *ctx, uint8_t val)
Enables timestamp counter.[set].
Definition lsm6dso32_reg.c:1103
lsm6dso32_timestamp_get
int32_t lsm6dso32_timestamp_get(stmdev_ctx_t *ctx, uint8_t *val)
Enables timestamp counter.[get].
Definition lsm6dso32_reg.c:1127
lsm6dso32_timestamp_raw_get
int32_t lsm6dso32_timestamp_raw_get(stmdev_ctx_t *ctx, uint32_t *val)
Timestamp first data output register (r). The value is expressed as a 32-bit word and the bit resolut...
Definition lsm6dso32_reg.c:1148
lsm6dso32_wkup_dur_set
int32_t lsm6dso32_wkup_dur_set(stmdev_ctx_t *ctx, uint8_t val)
Wake up duration event.[set] 1LSb = 1 / ODR.
Definition lsm6dso32_reg.c:3954
lsm6dso32_wkup_ths_weight_get
int32_t lsm6dso32_wkup_ths_weight_get(stmdev_ctx_t *ctx, lsm6dso32_wake_ths_w_t *val)
Weight of 1 LSB of wakeup threshold.[get] 0: 1 LSB =FS_XL / 64 1: 1 LSB = FS_XL / 256.
Definition lsm6dso32_reg.c:3827
lsm6dso32_wkup_dur_get
int32_t lsm6dso32_wkup_dur_get(stmdev_ctx_t *ctx, uint8_t *val)
Wake up duration event.[get] 1LSb = 1 / ODR.
Definition lsm6dso32_reg.c:3979
lsm6dso32_wkup_threshold_get
int32_t lsm6dso32_wkup_threshold_get(stmdev_ctx_t *ctx, uint8_t *val)
Threshold for wakeup: 1 LSB weight depends on WAKE_THS_W in WAKE_UP_DUR.[get].
Definition lsm6dso32_reg.c:3887
lsm6dso32_wkup_ths_weight_set
int32_t lsm6dso32_wkup_ths_weight_set(stmdev_ctx_t *ctx, lsm6dso32_wake_ths_w_t val)
Weight of 1 LSB of wakeup threshold.[set] 0: 1 LSB =FS_XL / 64 1: 1 LSB = FS_XL / 256.
Definition lsm6dso32_reg.c:3799
lsm6dso32_wkup_threshold_set
int32_t lsm6dso32_wkup_threshold_set(stmdev_ctx_t *ctx, uint8_t val)
Threshold for wakeup: 1 LSB weight depends on WAKE_THS_W in WAKE_UP_DUR.[set].
Definition lsm6dso32_reg.c:3862
lsm6dso32_xl_usr_offset_on_wkup_get
int32_t lsm6dso32_xl_usr_offset_on_wkup_get(stmdev_ctx_t *ctx, uint8_t *val)
Wake up duration event.[get] 1LSb = 1 / ODR.
Definition lsm6dso32_reg.c:3933
lsm6dso32_xl_usr_offset_on_wkup_set
int32_t lsm6dso32_xl_usr_offset_on_wkup_set(stmdev_ctx_t *ctx, uint8_t val)
Wake up duration event.[set] 1LSb = 1 / ODR.
Definition lsm6dso32_reg.c:3907
lsm6dso32_ln_pg_write
int32_t lsm6dso32_ln_pg_write(stmdev_ctx_t *ctx, uint16_t address, uint8_t *buf, uint8_t len)
Write buffer in a page.[set].
Definition lsm6dso32_reg.c:1619
lsm6dso32_ln_pg_read_byte
int32_t lsm6dso32_ln_pg_read_byte(stmdev_ctx_t *ctx, uint16_t address, uint8_t *val)
Read a line(byte) in a page.[get].
Definition lsm6dso32_reg.c:1725
lsm6dso32_reset_get
int32_t lsm6dso32_reset_get(stmdev_ctx_t *ctx, uint8_t *val)
Software reset. Restore the default values in user registers.[get].
Definition lsm6dso32_reg.c:1908
lsm6dso32_mem_bank_set
int32_t lsm6dso32_mem_bank_set(stmdev_ctx_t *ctx, lsm6dso32_reg_access_t val)
Enable access to the embedded functions/sensor hub configuration registers.[set].
Definition lsm6dso32_reg.c:1472
lsm6dso32_gy_self_test_set
int32_t lsm6dso32_gy_self_test_set(stmdev_ctx_t *ctx, lsm6dso32_st_g_t val)
Angular rate sensor self-test enable.[set].
Definition lsm6dso32_reg.c:2078
lsm6dso32_reset_set
int32_t lsm6dso32_reset_set(stmdev_ctx_t *ctx, uint8_t val)
Software reset. Restore the default values in user registers[set].
Definition lsm6dso32_reg.c:1884
lsm6dso32_boot_get
int32_t lsm6dso32_boot_get(stmdev_ctx_t *ctx, uint8_t *val)
Reboot memory content. Reload the calibration parameters.[get].
Definition lsm6dso32_reg.c:1996
lsm6dso32_data_ready_mode_set
int32_t lsm6dso32_data_ready_mode_set(stmdev_ctx_t *ctx, lsm6dso32_dataready_pulsed_t val)
Data-ready pulsed / letched mode.[set].
Definition lsm6dso32_reg.c:1802
lsm6dso32_odr_cal_reg_get
int32_t lsm6dso32_odr_cal_reg_get(stmdev_ctx_t *ctx, uint8_t *val)
Difference in percentage of the effective ODR(and timestamp rate) with respect to the typical....
Definition lsm6dso32_reg.c:1450
lsm6dso32_gy_self_test_get
int32_t lsm6dso32_gy_self_test_get(stmdev_ctx_t *ctx, lsm6dso32_st_g_t *val)
Angular rate sensor self-test enable.[get].
Definition lsm6dso32_reg.c:2103
lsm6dso32_odr_cal_reg_set
int32_t lsm6dso32_odr_cal_reg_set(stmdev_ctx_t *ctx, uint8_t val)
Difference in percentage of the effective ODR(and timestamp rate) with respect to the typical....
Definition lsm6dso32_reg.c:1422
lsm6dso32_data_ready_mode_get
int32_t lsm6dso32_data_ready_mode_get(stmdev_ctx_t *ctx, lsm6dso32_dataready_pulsed_t *val)
Data-ready pulsed / letched mode.[get].
Definition lsm6dso32_reg.c:1831
lsm6dso32_auto_increment_get
int32_t lsm6dso32_auto_increment_get(stmdev_ctx_t *ctx, uint8_t *val)
Register address automatically incremented during a multiple byte access with a serial interface....
Definition lsm6dso32_reg.c:1953
lsm6dso32_boot_set
int32_t lsm6dso32_boot_set(stmdev_ctx_t *ctx, uint8_t val)
Reboot memory content. Reload the calibration parameters.[set].
Definition lsm6dso32_reg.c:1972
lsm6dso32_xl_self_test_get
int32_t lsm6dso32_xl_self_test_get(stmdev_ctx_t *ctx, lsm6dso32_st_xl_t *val)
Linear acceleration sensor self-test enable.[get].
Definition lsm6dso32_reg.c:2040
lsm6dso32_device_id_get
int32_t lsm6dso32_device_id_get(stmdev_ctx_t *ctx, uint8_t *buff)
Device "Who am I".[get].
Definition lsm6dso32_reg.c:1866
lsm6dso32_auto_increment_set
int32_t lsm6dso32_auto_increment_set(stmdev_ctx_t *ctx, uint8_t val)
Register address automatically incremented during a multiple byte access with a serial interface....
Definition lsm6dso32_reg.c:1928
lsm6dso32_ln_pg_write_byte
int32_t lsm6dso32_ln_pg_write_byte(stmdev_ctx_t *ctx, uint16_t address, uint8_t *val)
Write a line(byte) in a page.[set].
Definition lsm6dso32_reg.c:1540
lsm6dso32_xl_self_test_set
int32_t lsm6dso32_xl_self_test_set(stmdev_ctx_t *ctx, lsm6dso32_st_xl_t val)
Linear acceleration sensor self-test enable.[set].
Definition lsm6dso32_reg.c:2015
lsm6dso32_mem_bank_get
int32_t lsm6dso32_mem_bank_get(stmdev_ctx_t *ctx, lsm6dso32_reg_access_t *val)
Enable access to the embedded functions/sensor hub configuration registers.[get].
Definition lsm6dso32_reg.c:1500
lsm6dso32_rst_batch_counter_get
int32_t lsm6dso32_rst_batch_counter_get(stmdev_ctx_t *ctx, uint8_t *val)
Resets the internal counter of batching events for a single sensor. This bit is automatically reset t...
Definition lsm6dso32_reg.c:5965
lsm6dso32_batch_counter_threshold_set
int32_t lsm6dso32_batch_counter_threshold_set(stmdev_ctx_t *ctx, uint16_t val)
Batch data rate counter.[set].
Definition lsm6dso32_reg.c:5987
lsm6dso32_fifo_pedo_batch_set
int32_t lsm6dso32_fifo_pedo_batch_set(stmdev_ctx_t *ctx, uint8_t val)
: Enable FIFO batching of pedometer embedded function values.[set]
Definition lsm6dso32_reg.c:6262
lsm6dso32_fifo_mode_t
lsm6dso32_fifo_mode_t
Definition lsm6dso32_reg.h:3382
lsm6dso32_compression_algo_set
int32_t lsm6dso32_compression_algo_set(stmdev_ctx_t *ctx, lsm6dso32_uncoptr_rate_t val)
Enable and configure compression algo.[set].
Definition lsm6dso32_reg.c:5215
lsm6dso32_fifo_gy_batch_get
int32_t lsm6dso32_fifo_gy_batch_get(stmdev_ctx_t *ctx, lsm6dso32_bdr_gy_t *val)
Selects Batching Data Rate (writing frequency in FIFO) for gyroscope data.[get].
Definition lsm6dso32_reg.c:5579
lsm6dso32_fifo_tag_t
lsm6dso32_fifo_tag_t
Definition lsm6dso32_reg.h:3426
lsm6dso32_compression_algo_real_time_set
int32_t lsm6dso32_compression_algo_real_time_set(stmdev_ctx_t *ctx, uint8_t val)
Enables/Disables compression algorithm runtime.[set].
Definition lsm6dso32_reg.c:5360
lsm6dso32_odr_t_batch_t
lsm6dso32_odr_t_batch_t
Definition lsm6dso32_reg.h:3396
lsm6dso32_fifo_xl_batch_set
int32_t lsm6dso32_fifo_xl_batch_set(stmdev_ctx_t *ctx, lsm6dso32_bdr_xl_t val)
Selects Batching Data Rate (writing frequency in FIFO) for accelerometer data.[set].
Definition lsm6dso32_reg.c:5452
lsm6dso32_sh_batch_slave_3_get
int32_t lsm6dso32_sh_batch_slave_3_get(stmdev_ctx_t *ctx, uint8_t *val)
Enable FIFO batching data of fourth slave.[get].
Definition lsm6dso32_reg.c:6563
lsm6dso32_fifo_ovr_flag_get
int32_t lsm6dso32_fifo_ovr_flag_get(stmdev_ctx_t *ctx, uint8_t *val)
FIFO overrun status.[get].
Definition lsm6dso32_reg.c:6119
lsm6dso32_fifo_data_level_get
int32_t lsm6dso32_fifo_data_level_get(stmdev_ctx_t *ctx, uint16_t *val)
Number of unread sensor data(TAG + 6 bytes) stored in FIFO.[get].
Definition lsm6dso32_reg.c:6052
lsm6dso32_fifo_virtual_sens_odr_chg_set
int32_t lsm6dso32_fifo_virtual_sens_odr_chg_set(stmdev_ctx_t *ctx, uint8_t val)
Enables ODR CHANGE virtual sensor to be batched in FIFO.[set].
Definition lsm6dso32_reg.c:5314
lsm6dso32_fifo_temp_batch_set
int32_t lsm6dso32_fifo_temp_batch_set(stmdev_ctx_t *ctx, lsm6dso32_odr_t_batch_t val)
Selects Batching Data Rate (writing frequency in FIFO) for temperature data.[set].
Definition lsm6dso32_reg.c:5729
lsm6dso32_compression_algo_real_time_get
int32_t lsm6dso32_compression_algo_real_time_get(stmdev_ctx_t *ctx, uint8_t *val)
Enables/Disables compression algorithm runtime.[get].
Definition lsm6dso32_reg.c:5385
lsm6dso32_sh_batch_slave_0_set
int32_t lsm6dso32_sh_batch_slave_0_set(stmdev_ctx_t *ctx, uint8_t val)
Enable FIFO batching data of first slave.[set].
Definition lsm6dso32_reg.c:6330
lsm6dso32_batch_counter_threshold_get
int32_t lsm6dso32_batch_counter_threshold_get(stmdev_ctx_t *ctx, uint16_t *val)
Batch data rate counter.[get].
Definition lsm6dso32_reg.c:6023
lsm6dso32_rst_batch_counter_set
int32_t lsm6dso32_rst_batch_counter_set(stmdev_ctx_t *ctx, uint8_t val)
Resets the internal counter of batching vents for a single sensor. This bit is automatically reset to...
Definition lsm6dso32_reg.c:5936
lsm6dso32_fifo_watermark_get
int32_t lsm6dso32_fifo_watermark_get(stmdev_ctx_t *ctx, uint16_t *val)
FIFO watermark level selection.[get].
Definition lsm6dso32_reg.c:5117
lsm6dso32_bdr_gy_t
lsm6dso32_bdr_gy_t
Definition lsm6dso32_reg.h:3362
lsm6dso32_trig_counter_bdr_t
lsm6dso32_trig_counter_bdr_t
Definition lsm6dso32_reg.h:3420
lsm6dso32_uncoptr_rate_t
lsm6dso32_uncoptr_rate_t
Definition lsm6dso32_reg.h:3314
lsm6dso32_fifo_xl_batch_get
int32_t lsm6dso32_fifo_xl_batch_get(stmdev_ctx_t *ctx, lsm6dso32_bdr_xl_t *val)
Selects Batching Data Rate (writing frequency in FIFO) for accelerometer data.[get].
Definition lsm6dso32_reg.c:5478
lsm6dso32_fifo_mode_set
int32_t lsm6dso32_fifo_mode_set(stmdev_ctx_t *ctx, lsm6dso32_fifo_mode_t val)
FIFO mode selection.[set].
Definition lsm6dso32_reg.c:5653
lsm6dso32_fifo_sensor_tag_get
int32_t lsm6dso32_fifo_sensor_tag_get(stmdev_ctx_t *ctx, lsm6dso32_fifo_tag_t *val)
Identifies the sensor in FIFO_DATA_OUT.[get].
Definition lsm6dso32_reg.c:6157
lsm6dso32_sh_batch_slave_2_set
int32_t lsm6dso32_sh_batch_slave_2_set(stmdev_ctx_t *ctx, uint8_t val)
Enable FIFO batching data of third slave.[set].
Definition lsm6dso32_reg.c:6462
lsm6dso32_fifo_pedo_batch_get
int32_t lsm6dso32_fifo_pedo_batch_get(stmdev_ctx_t *ctx, uint8_t *val)
Enable FIFO batching of pedometer embedded function values.[get].
Definition lsm6dso32_reg.c:6299
lsm6dso32_sh_batch_slave_1_set
int32_t lsm6dso32_sh_batch_slave_1_set(stmdev_ctx_t *ctx, uint8_t val)
Enable FIFO batching data of second slave.[set].
Definition lsm6dso32_reg.c:6396
lsm6dso32_fifo_status_get
int32_t lsm6dso32_fifo_status_get(stmdev_ctx_t *ctx, lsm6dso32_fifo_status2_t *val)
FIFO status.[get].
Definition lsm6dso32_reg.c:6081
lsm6dso32_fifo_mode_get
int32_t lsm6dso32_fifo_mode_get(stmdev_ctx_t *ctx, lsm6dso32_fifo_mode_t *val)
FIFO mode selection.[get].
Definition lsm6dso32_reg.c:5678
lsm6dso32_fifo_timestamp_decimation_get
int32_t lsm6dso32_fifo_timestamp_decimation_get(stmdev_ctx_t *ctx, lsm6dso32_odr_ts_batch_t *val)
Selects decimation for timestamp batching in FIFO. Writing rate will be the maximum rate between XL a...
Definition lsm6dso32_reg.c:5826
lsm6dso32_sh_batch_slave_1_get
int32_t lsm6dso32_sh_batch_slave_1_get(stmdev_ctx_t *ctx, uint8_t *val)
Enable FIFO batching data of second slave.[get].
Definition lsm6dso32_reg.c:6431
lsm6dso32_compression_algo_get
int32_t lsm6dso32_compression_algo_get(stmdev_ctx_t *ctx, lsm6dso32_uncoptr_rate_t *val)
Enable and configure compression algo.[get].
Definition lsm6dso32_reg.c:5268
lsm6dso32_fifo_gy_batch_set
int32_t lsm6dso32_fifo_gy_batch_set(stmdev_ctx_t *ctx, lsm6dso32_bdr_gy_t val)
Selects Batching Data Rate (writing frequency in FIFO) for gyroscope data.[set].
Definition lsm6dso32_reg.c:5553
lsm6dso32_fifo_cnt_event_batch_get
int32_t lsm6dso32_fifo_cnt_event_batch_get(stmdev_ctx_t *ctx, lsm6dso32_trig_counter_bdr_t *val)
Selects the trigger for the internal counter of batching events between XL and gyro....
Definition lsm6dso32_reg.c:5899
lsm6dso32_fifo_stop_on_wtm_get
int32_t lsm6dso32_fifo_stop_on_wtm_get(stmdev_ctx_t *ctx, uint8_t *val)
Sensing chain FIFO stop values memorization at threshold level.[get].
Definition lsm6dso32_reg.c:5431
lsm6dso32_fifo_virtual_sens_odr_chg_get
int32_t lsm6dso32_fifo_virtual_sens_odr_chg_get(stmdev_ctx_t *ctx, uint8_t *val)
Enables ODR CHANGE virtual sensor to be batched in FIFO.[get].
Definition lsm6dso32_reg.c:5339
lsm6dso32_compression_algo_init_set
int32_t lsm6dso32_compression_algo_init_set(stmdev_ctx_t *ctx, uint8_t val)
FIFO compression feature initialization request [set].
Definition lsm6dso32_reg.c:5145
lsm6dso32_fifo_wtm_flag_get
int32_t lsm6dso32_fifo_wtm_flag_get(stmdev_ctx_t *ctx, uint8_t *val)
FIFO watermark status.[get].
Definition lsm6dso32_reg.c:6138
lsm6dso32_fifo_timestamp_decimation_set
int32_t lsm6dso32_fifo_timestamp_decimation_set(stmdev_ctx_t *ctx, lsm6dso32_odr_ts_batch_t val)
Selects decimation for timestamp batching in FIFO. Writing rate will be the maximum rate between XL a...
Definition lsm6dso32_reg.c:5799
lsm6dso32_compression_algo_init_get
int32_t lsm6dso32_compression_algo_init_get(stmdev_ctx_t *ctx, uint8_t *val)
FIFO compression feature initialization request [get].
Definition lsm6dso32_reg.c:5183
lsm6dso32_fifo_stop_on_wtm_set
int32_t lsm6dso32_fifo_stop_on_wtm_set(stmdev_ctx_t *ctx, uint8_t val)
Sensing chain FIFO stop values memorization at threshold level.[set].
Definition lsm6dso32_reg.c:5406
lsm6dso32_fifo_cnt_event_batch_set
int32_t lsm6dso32_fifo_cnt_event_batch_set(stmdev_ctx_t *ctx, lsm6dso32_trig_counter_bdr_t val)
Selects the trigger for the internal counter of batching events between XL and gyro....
Definition lsm6dso32_reg.c:5870
lsm6dso32_fifo_watermark_set
int32_t lsm6dso32_fifo_watermark_set(stmdev_ctx_t *ctx, uint16_t val)
FIFO watermark level selection.[set].
Definition lsm6dso32_reg.c:5083
lsm6dso32_sh_batch_slave_2_get
int32_t lsm6dso32_sh_batch_slave_2_get(stmdev_ctx_t *ctx, uint8_t *val)
Enable FIFO batching data of third slave.[get].
Definition lsm6dso32_reg.c:6497
lsm6dso32_fifo_full_flag_get
int32_t lsm6dso32_fifo_full_flag_get(stmdev_ctx_t *ctx, uint8_t *val)
Smart FIFO full status.[get].
Definition lsm6dso32_reg.c:6099
lsm6dso32_sh_batch_slave_3_set
int32_t lsm6dso32_sh_batch_slave_3_set(stmdev_ctx_t *ctx, uint8_t val)
Enable FIFO batching data of fourth slave.[set].
Definition lsm6dso32_reg.c:6528
lsm6dso32_odr_ts_batch_t
lsm6dso32_odr_ts_batch_t
Definition lsm6dso32_reg.h:3408
lsm6dso32_bdr_xl_t
lsm6dso32_bdr_xl_t
Definition lsm6dso32_reg.h:3342
lsm6dso32_fifo_temp_batch_get
int32_t lsm6dso32_fifo_temp_batch_get(stmdev_ctx_t *ctx, lsm6dso32_odr_t_batch_t *val)
Selects Batching Data Rate (writing frequency in FIFO) for temperature data.[get].
Definition lsm6dso32_reg.c:5755
lsm6dso32_sh_batch_slave_0_get
int32_t lsm6dso32_sh_batch_slave_0_get(stmdev_ctx_t *ctx, uint8_t *val)
Enable FIFO batching data of first slave.[get].
Definition lsm6dso32_reg.c:6365
LSM6DSO32_BYPASS_TO_FIFO_MODE
@ LSM6DSO32_BYPASS_TO_FIFO_MODE
Definition lsm6dso32_reg.h:3388
LSM6DSO32_STREAM_MODE
@ LSM6DSO32_STREAM_MODE
Definition lsm6dso32_reg.h:3387
LSM6DSO32_BYPASS_MODE
@ LSM6DSO32_BYPASS_MODE
Definition lsm6dso32_reg.h:3383
LSM6DSO32_BYPASS_TO_STREAM_MODE
@ LSM6DSO32_BYPASS_TO_STREAM_MODE
Definition lsm6dso32_reg.h:3386
LSM6DSO32_STREAM_TO_FIFO_MODE
@ LSM6DSO32_STREAM_TO_FIFO_MODE
Definition lsm6dso32_reg.h:3385
LSM6DSO32_FIFO_MODE
@ LSM6DSO32_FIFO_MODE
Definition lsm6dso32_reg.h:3384
LSM6DSO32_GYRO_3XC_TAG
@ LSM6DSO32_GYRO_3XC_TAG
Definition lsm6dso32_reg.h:3439
LSM6DSO32_SENSORHUB_NACK_TAG
@ LSM6DSO32_SENSORHUB_NACK_TAG
Definition lsm6dso32_reg.h:3445
LSM6DSO32_GYRO_NC_TAG
@ LSM6DSO32_GYRO_NC_TAG
Definition lsm6dso32_reg.h:3427
LSM6DSO32_XL_2XC_TAG
@ LSM6DSO32_XL_2XC_TAG
Definition lsm6dso32_reg.h:3434
LSM6DSO32_XL_NC_T_1_TAG
@ LSM6DSO32_XL_NC_T_1_TAG
Definition lsm6dso32_reg.h:3433
LSM6DSO32_SENSORHUB_SLAVE3_TAG
@ LSM6DSO32_SENSORHUB_SLAVE3_TAG
Definition lsm6dso32_reg.h:3443
LSM6DSO32_GYRO_NC_T_2_TAG
@ LSM6DSO32_GYRO_NC_T_2_TAG
Definition lsm6dso32_reg.h:3436
LSM6DSO32_GYRO_NC_T_1_TAG
@ LSM6DSO32_GYRO_NC_T_1_TAG
Definition lsm6dso32_reg.h:3437
LSM6DSO32_XL_NC_TAG
@ LSM6DSO32_XL_NC_TAG
Definition lsm6dso32_reg.h:3428
LSM6DSO32_GYRO_2XC_TAG
@ LSM6DSO32_GYRO_2XC_TAG
Definition lsm6dso32_reg.h:3438
LSM6DSO32_XL_NC_T_2_TAG
@ LSM6DSO32_XL_NC_T_2_TAG
Definition lsm6dso32_reg.h:3432
LSM6DSO32_SENSORHUB_SLAVE2_TAG
@ LSM6DSO32_SENSORHUB_SLAVE2_TAG
Definition lsm6dso32_reg.h:3442
LSM6DSO32_CFG_CHANGE_TAG
@ LSM6DSO32_CFG_CHANGE_TAG
Definition lsm6dso32_reg.h:3431
LSM6DSO32_TIMESTAMP_TAG
@ LSM6DSO32_TIMESTAMP_TAG
Definition lsm6dso32_reg.h:3430
LSM6DSO32_TEMPERATURE_TAG
@ LSM6DSO32_TEMPERATURE_TAG
Definition lsm6dso32_reg.h:3429
LSM6DSO32_SENSORHUB_SLAVE0_TAG
@ LSM6DSO32_SENSORHUB_SLAVE0_TAG
Definition lsm6dso32_reg.h:3440
LSM6DSO32_XL_3XC_TAG
@ LSM6DSO32_XL_3XC_TAG
Definition lsm6dso32_reg.h:3435
LSM6DSO32_SENSORHUB_SLAVE1_TAG
@ LSM6DSO32_SENSORHUB_SLAVE1_TAG
Definition lsm6dso32_reg.h:3441
LSM6DSO32_STEP_COUNTER_TAG
@ LSM6DSO32_STEP_COUNTER_TAG
Definition lsm6dso32_reg.h:3444
LSM6DSO32_TEMP_BATCHED_AT_1Hz6
@ LSM6DSO32_TEMP_BATCHED_AT_1Hz6
Definition lsm6dso32_reg.h:3398
LSM6DSO32_TEMP_NOT_BATCHED
@ LSM6DSO32_TEMP_NOT_BATCHED
Definition lsm6dso32_reg.h:3397
LSM6DSO32_TEMP_BATCHED_AT_52Hz
@ LSM6DSO32_TEMP_BATCHED_AT_52Hz
Definition lsm6dso32_reg.h:3400
LSM6DSO32_TEMP_BATCHED_AT_12Hz5
@ LSM6DSO32_TEMP_BATCHED_AT_12Hz5
Definition lsm6dso32_reg.h:3399
LSM6DSO32_GY_BATCHED_AT_3333Hz
@ LSM6DSO32_GY_BATCHED_AT_3333Hz
Definition lsm6dso32_reg.h:3372
LSM6DSO32_GY_NOT_BATCHED
@ LSM6DSO32_GY_NOT_BATCHED
Definition lsm6dso32_reg.h:3363
LSM6DSO32_GY_BATCHED_AT_417Hz
@ LSM6DSO32_GY_BATCHED_AT_417Hz
Definition lsm6dso32_reg.h:3369
LSM6DSO32_GY_BATCHED_AT_833Hz
@ LSM6DSO32_GY_BATCHED_AT_833Hz
Definition lsm6dso32_reg.h:3370
LSM6DSO32_GY_BATCHED_AT_26Hz
@ LSM6DSO32_GY_BATCHED_AT_26Hz
Definition lsm6dso32_reg.h:3365
LSM6DSO32_GY_BATCHED_AT_6Hz5
@ LSM6DSO32_GY_BATCHED_AT_6Hz5
Definition lsm6dso32_reg.h:3374
LSM6DSO32_GY_BATCHED_AT_12Hz5
@ LSM6DSO32_GY_BATCHED_AT_12Hz5
Definition lsm6dso32_reg.h:3364
LSM6DSO32_GY_BATCHED_AT_1667Hz
@ LSM6DSO32_GY_BATCHED_AT_1667Hz
Definition lsm6dso32_reg.h:3371
LSM6DSO32_GY_BATCHED_AT_208Hz
@ LSM6DSO32_GY_BATCHED_AT_208Hz
Definition lsm6dso32_reg.h:3368
LSM6DSO32_GY_BATCHED_AT_52Hz
@ LSM6DSO32_GY_BATCHED_AT_52Hz
Definition lsm6dso32_reg.h:3366
LSM6DSO32_GY_BATCHED_AT_104Hz
@ LSM6DSO32_GY_BATCHED_AT_104Hz
Definition lsm6dso32_reg.h:3367
LSM6DSO32_GY_BATCHED_AT_6667Hz
@ LSM6DSO32_GY_BATCHED_AT_6667Hz
Definition lsm6dso32_reg.h:3373
LSM6DSO32_GYRO_BATCH_EVENT
@ LSM6DSO32_GYRO_BATCH_EVENT
Definition lsm6dso32_reg.h:3422
LSM6DSO32_XL_BATCH_EVENT
@ LSM6DSO32_XL_BATCH_EVENT
Definition lsm6dso32_reg.h:3421
LSM6DSO32_CMP_16_TO_1
@ LSM6DSO32_CMP_16_TO_1
Definition lsm6dso32_reg.h:3318
LSM6DSO32_CMP_ALWAYS
@ LSM6DSO32_CMP_ALWAYS
Definition lsm6dso32_reg.h:3316
LSM6DSO32_CMP_DISABLE
@ LSM6DSO32_CMP_DISABLE
Definition lsm6dso32_reg.h:3315
LSM6DSO32_CMP_32_TO_1
@ LSM6DSO32_CMP_32_TO_1
Definition lsm6dso32_reg.h:3319
LSM6DSO32_CMP_8_TO_1
@ LSM6DSO32_CMP_8_TO_1
Definition lsm6dso32_reg.h:3317
LSM6DSO32_DEC_8
@ LSM6DSO32_DEC_8
Definition lsm6dso32_reg.h:3411
LSM6DSO32_DEC_32
@ LSM6DSO32_DEC_32
Definition lsm6dso32_reg.h:3412
LSM6DSO32_DEC_1
@ LSM6DSO32_DEC_1
Definition lsm6dso32_reg.h:3410
LSM6DSO32_NO_DECIMATION
@ LSM6DSO32_NO_DECIMATION
Definition lsm6dso32_reg.h:3409
LSM6DSO32_XL_BATCHED_AT_26Hz
@ LSM6DSO32_XL_BATCHED_AT_26Hz
Definition lsm6dso32_reg.h:3345
LSM6DSO32_XL_BATCHED_AT_1667Hz
@ LSM6DSO32_XL_BATCHED_AT_1667Hz
Definition lsm6dso32_reg.h:3351
LSM6DSO32_XL_BATCHED_AT_12Hz5
@ LSM6DSO32_XL_BATCHED_AT_12Hz5
Definition lsm6dso32_reg.h:3344
LSM6DSO32_XL_BATCHED_AT_208Hz
@ LSM6DSO32_XL_BATCHED_AT_208Hz
Definition lsm6dso32_reg.h:3348
LSM6DSO32_XL_BATCHED_AT_6Hz5
@ LSM6DSO32_XL_BATCHED_AT_6Hz5
Definition lsm6dso32_reg.h:3354
LSM6DSO32_XL_BATCHED_AT_104Hz
@ LSM6DSO32_XL_BATCHED_AT_104Hz
Definition lsm6dso32_reg.h:3347
LSM6DSO32_XL_BATCHED_AT_417Hz
@ LSM6DSO32_XL_BATCHED_AT_417Hz
Definition lsm6dso32_reg.h:3349
LSM6DSO32_XL_BATCHED_AT_3333Hz
@ LSM6DSO32_XL_BATCHED_AT_3333Hz
Definition lsm6dso32_reg.h:3352
LSM6DSO32_XL_BATCHED_AT_6667Hz
@ LSM6DSO32_XL_BATCHED_AT_6667Hz
Definition lsm6dso32_reg.h:3353
LSM6DSO32_XL_NOT_BATCHED
@ LSM6DSO32_XL_NOT_BATCHED
Definition lsm6dso32_reg.h:3343
LSM6DSO32_XL_BATCHED_AT_52Hz
@ LSM6DSO32_XL_BATCHED_AT_52Hz
Definition lsm6dso32_reg.h:3346
LSM6DSO32_XL_BATCHED_AT_833Hz
@ LSM6DSO32_XL_BATCHED_AT_833Hz
Definition lsm6dso32_reg.h:3350
lsm6dso32_xl_fast_settling_get
int32_t lsm6dso32_xl_fast_settling_get(stmdev_ctx_t *ctx, uint8_t *val)
Enables accelerometer LPF2 and HPF fast-settling mode. The filter sets the second samples after writi...
Definition lsm6dso32_reg.c:2596
lsm6dso32_xl_fast_settling_set
int32_t lsm6dso32_xl_fast_settling_set(stmdev_ctx_t *ctx, uint8_t val)
Enables accelerometer LPF2 and HPF fast-settling mode. The filter sets the second samples after writi...
Definition lsm6dso32_reg.c:2570
lsm6dso32_xl_hp_path_internal_get
int32_t lsm6dso32_xl_hp_path_internal_get(stmdev_ctx_t *ctx, lsm6dso32_slope_fds_t *val)
HPF or SLOPE filter selection on wake-up and Activity/Inactivity functions.[get].
Definition lsm6dso32_reg.c:2643
lsm6dso32_xl_lp2_on_6d_set
int32_t lsm6dso32_xl_lp2_on_6d_set(stmdev_ctx_t *ctx, uint8_t val)
Low pass filter 2 on 6D function selection.[set].
Definition lsm6dso32_reg.c:2375
lsm6dso32_xl_lp2_on_6d_get
int32_t lsm6dso32_xl_lp2_on_6d_get(stmdev_ctx_t *ctx, uint8_t *val)
Low pass filter 2 on 6D function selection.[get].
Definition lsm6dso32_reg.c:2399
lsm6dso32_gy_filter_lp1_get
int32_t lsm6dso32_gy_filter_lp1_get(stmdev_ctx_t *ctx, uint8_t *val)
Enables gyroscope digital LPF1 if auxiliary SPI is disabled; the bandwidth can be selected through FT...
Definition lsm6dso32_reg.c:2226
lsm6dso32_xl_filter_lp2_set
int32_t lsm6dso32_xl_filter_lp2_set(stmdev_ctx_t *ctx, uint8_t val)
Accelerometer output from LPF2 filtering stage selection.[set].
Definition lsm6dso32_reg.c:2155
lsm6dso32_xl_filter_lp2_get
int32_t lsm6dso32_xl_filter_lp2_get(stmdev_ctx_t *ctx, uint8_t *val)
Accelerometer output from LPF2 filtering stage selection.[get].
Definition lsm6dso32_reg.c:2179
lsm6dso32_xl_hp_path_internal_set
int32_t lsm6dso32_xl_hp_path_internal_set(stmdev_ctx_t *ctx, lsm6dso32_slope_fds_t val)
HPF or SLOPE filter selection on wake-up and Activity/Inactivity functions.[set].
Definition lsm6dso32_reg.c:2617
lsm6dso32_gy_lp1_bandwidth_get
int32_t lsm6dso32_gy_lp1_bandwidth_get(stmdev_ctx_t *ctx, lsm6dso32_ftype_t *val)
Gyroscope lp1 bandwidth.[get].
Definition lsm6dso32_reg.c:2317
lsm6dso32_gy_hp_path_internal_set
int32_t lsm6dso32_gy_hp_path_internal_set(stmdev_ctx_t *ctx, lsm6dso32_hpm_g_t val)
Enables gyroscope digital high-pass filter. The filter is enabled only if the gyro is in HP mode....
Definition lsm6dso32_reg.c:2678
lsm6dso32_filter_settling_mask_get
int32_t lsm6dso32_filter_settling_mask_get(stmdev_ctx_t *ctx, uint8_t *val)
Mask DRDY on pin (both XL & Gyro) until filter settling ends (XL and Gyro independently masked)....
Definition lsm6dso32_reg.c:2272
lsm6dso32_xl_hp_path_on_out_set
int32_t lsm6dso32_xl_hp_path_on_out_set(stmdev_ctx_t *ctx, lsm6dso32_hp_slope_xl_en_t val)
Accelerometer slope filter / high-pass filter selection on output.[set].
Definition lsm6dso32_reg.c:2420
lsm6dso32_gy_hp_path_internal_get
int32_t lsm6dso32_gy_hp_path_internal_get(stmdev_ctx_t *ctx, lsm6dso32_hpm_g_t *val)
Enables gyroscope digital high-pass filter. The filter is enabled only if the gyro is in HP mode....
Definition lsm6dso32_reg.c:2705
lsm6dso32_filter_settling_mask_set
int32_t lsm6dso32_filter_settling_mask_set(stmdev_ctx_t *ctx, uint8_t val)
Mask DRDY on pin (both XL & Gyro) until filter settling ends (XL and Gyro independently masked)....
Definition lsm6dso32_reg.c:2246
lsm6dso32_gy_lp1_bandwidth_set
int32_t lsm6dso32_gy_lp1_bandwidth_set(stmdev_ctx_t *ctx, lsm6dso32_ftype_t val)
Gyroscope lp1 bandwidth.[set].
Definition lsm6dso32_reg.c:2292
lsm6dso32_gy_filter_lp1_set
int32_t lsm6dso32_gy_filter_lp1_set(stmdev_ctx_t *ctx, uint8_t val)
Enables gyroscope digital LPF1 if auxiliary SPI is disabled; the bandwidth can be selected through FT...
Definition lsm6dso32_reg.c:2200
lsm6dso32_xl_hp_path_on_out_get
int32_t lsm6dso32_xl_hp_path_on_out_get(stmdev_ctx_t *ctx, lsm6dso32_hp_slope_xl_en_t *val)
Accelerometer slope filter / high-pass filter selection on output.[get].
Definition lsm6dso32_reg.c:2448
lsm6dso32_fsm_data_rate_set
int32_t lsm6dso32_fsm_data_rate_set(stmdev_ctx_t *ctx, lsm6dso32_fsm_odr_t val)
Finite State Machine ODR configuration.[set].
Definition lsm6dso32_reg.c:8559
lsm6dso32_fsm_lc_clr_t
lsm6dso32_fsm_lc_clr_t
Definition lsm6dso32_reg.h:3687
lsm6dso32_long_clr_set
int32_t lsm6dso32_long_clr_set(stmdev_ctx_t *ctx, lsm6dso32_fsm_lc_clr_t val)
Clear FSM long counter value.[set].
Definition lsm6dso32_reg.c:8440
lsm6dso32_fsm_enable_set
int32_t lsm6dso32_fsm_enable_set(stmdev_ctx_t *ctx, lsm6dso32_emb_fsm_enable_t *val)
Final State Machine enable.[set].
Definition lsm6dso32_reg.c:8274
lsm6dso32_emb_fsm_en_set
int32_t lsm6dso32_emb_fsm_en_set(stmdev_ctx_t *ctx, uint8_t val)
Final State Machine global enable.[set].
Definition lsm6dso32_reg.c:8202
lsm6dso32_long_cnt_int_value_set
int32_t lsm6dso32_long_cnt_int_value_set(stmdev_ctx_t *ctx, uint16_t val)
FSM long counter timeout register (r/w). The long counter timeout value is an unsigned integer value ...
Definition lsm6dso32_reg.c:8720
lsm6dso32_fsm_data_rate_get
int32_t lsm6dso32_fsm_data_rate_get(stmdev_ctx_t *ctx, lsm6dso32_fsm_odr_t *val)
Finite State Machine ODR configuration.[get].
Definition lsm6dso32_reg.c:8598
lsm6dso32_long_clr_get
int32_t lsm6dso32_long_clr_get(stmdev_ctx_t *ctx, lsm6dso32_fsm_lc_clr_t *val)
Clear FSM long counter value.[get].
Definition lsm6dso32_reg.c:8478
lsm6dso32_fsm_number_of_programs_get
int32_t lsm6dso32_fsm_number_of_programs_get(stmdev_ctx_t *ctx, uint8_t *buff)
FSM number of programs register.[get].
Definition lsm6dso32_reg.c:8797
lsm6dso32_fsm_init_set
int32_t lsm6dso32_fsm_init_set(stmdev_ctx_t *ctx, uint8_t val)
FSM initialization request.[set].
Definition lsm6dso32_reg.c:8651
lsm6dso32_fsm_number_of_programs_set
int32_t lsm6dso32_fsm_number_of_programs_set(stmdev_ctx_t *ctx, uint8_t *buff)
FSM number of programs register.[set].
Definition lsm6dso32_reg.c:8779
lsm6dso32_fsm_init_get
int32_t lsm6dso32_fsm_init_get(stmdev_ctx_t *ctx, uint8_t *val)
FSM initialization request.[get].
Definition lsm6dso32_reg.c:8687
lsm6dso32_long_cnt_flag_data_ready_get
int32_t lsm6dso32_long_cnt_flag_data_ready_get(stmdev_ctx_t *ctx, uint8_t *val)
Interrupt status bit for FSM long counter timeout interrupt event.[get].
Definition lsm6dso32_reg.c:8171
lsm6dso32_long_cnt_int_value_get
int32_t lsm6dso32_long_cnt_int_value_get(stmdev_ctx_t *ctx, uint16_t *val)
FSM long counter timeout register (r/w). The long counter timeout value is an unsigned integer value ...
Definition lsm6dso32_reg.c:8751
lsm6dso32_fsm_enable_get
int32_t lsm6dso32_fsm_enable_get(stmdev_ctx_t *ctx, lsm6dso32_emb_fsm_enable_t *val)
Final State Machine enable.[get].
Definition lsm6dso32_reg.c:8348
lsm6dso32_fsm_out_get
int32_t lsm6dso32_fsm_out_get(stmdev_ctx_t *ctx, lsm6dso32_fsm_out_t *val)
FSM output registers[get].
Definition lsm6dso32_reg.c:8530
lsm6dso32_emb_fsm_en_get
int32_t lsm6dso32_emb_fsm_en_get(stmdev_ctx_t *ctx, uint8_t *val)
Final State Machine global enable.[get].
Definition lsm6dso32_reg.c:8238
lsm6dso32_fsm_start_address_get
int32_t lsm6dso32_fsm_start_address_get(stmdev_ctx_t *ctx, uint16_t *val)
FSM start address register (r/w). First available address is 0x033C.[get].
Definition lsm6dso32_reg.c:8846
lsm6dso32_fsm_start_address_set
int32_t lsm6dso32_fsm_start_address_set(stmdev_ctx_t *ctx, uint16_t val)
FSM start address register (r/w). First available address is 0x033C.[set].
Definition lsm6dso32_reg.c:8816
lsm6dso32_fsm_odr_t
lsm6dso32_fsm_odr_t
Definition lsm6dso32_reg.h:3720
lsm6dso32_long_cnt_get
int32_t lsm6dso32_long_cnt_get(stmdev_ctx_t *ctx, uint16_t *val)
FSM long counter status register. Long counter value is an unsigned integer value (16-bit format)....
Definition lsm6dso32_reg.c:8409
lsm6dso32_long_cnt_set
int32_t lsm6dso32_long_cnt_set(stmdev_ctx_t *ctx, uint16_t val)
FSM long counter status register. Long counter value is an unsigned integer value (16-bit format)....
Definition lsm6dso32_reg.c:8378
LSM6DSO32_LC_CLEAR_DONE
@ LSM6DSO32_LC_CLEAR_DONE
Definition lsm6dso32_reg.h:3690
LSM6DSO32_LC_NORMAL
@ LSM6DSO32_LC_NORMAL
Definition lsm6dso32_reg.h:3688
LSM6DSO32_LC_CLEAR
@ LSM6DSO32_LC_CLEAR
Definition lsm6dso32_reg.h:3689
LSM6DSO32_ODR_FSM_26Hz
@ LSM6DSO32_ODR_FSM_26Hz
Definition lsm6dso32_reg.h:3722
LSM6DSO32_ODR_FSM_12Hz5
@ LSM6DSO32_ODR_FSM_12Hz5
Definition lsm6dso32_reg.h:3721
LSM6DSO32_ODR_FSM_52Hz
@ LSM6DSO32_ODR_FSM_52Hz
Definition lsm6dso32_reg.h:3723
LSM6DSO32_ODR_FSM_104Hz
@ LSM6DSO32_ODR_FSM_104Hz
Definition lsm6dso32_reg.h:3724
lsm6dso32_ff_dur_get
int32_t lsm6dso32_ff_dur_get(stmdev_ctx_t *ctx, uint8_t *val)
Free-fall duration event.[get] 1LSb = 1 / ODR.
Definition lsm6dso32_reg.c:5043
lsm6dso32_ff_dur_set
int32_t lsm6dso32_ff_dur_set(stmdev_ctx_t *ctx, uint8_t val)
Free-fall duration event.[set] 1LSb = 1 / ODR.
Definition lsm6dso32_reg.c:5002
lsm6dso32_ff_threshold_set
int32_t lsm6dso32_ff_threshold_set(stmdev_ctx_t *ctx, lsm6dso32_ff_ths_t val)
Free fall threshold setting.[set].
Definition lsm6dso32_reg.c:4938
lsm6dso32_ff_threshold_get
int32_t lsm6dso32_ff_threshold_get(stmdev_ctx_t *ctx, lsm6dso32_ff_ths_t *val)
Free fall threshold setting.[get].
Definition lsm6dso32_reg.c:4963
lsm6dso32_pin_int2_route_get
int32_t lsm6dso32_pin_int2_route_get(stmdev_ctx_t *ctx, lsm6dso32_pin_int2_route_t *val)
Select the signal that need to route on int2 pad.[get].
Definition lsm6dso32_reg.c:3443
lsm6dso32_int_notification_get
int32_t lsm6dso32_int_notification_get(stmdev_ctx_t *ctx, lsm6dso32_lir_t *val)
Interrupt notification mode.[get].
Definition lsm6dso32_reg.c:3708
lsm6dso32_pin_mode_set
int32_t lsm6dso32_pin_mode_set(stmdev_ctx_t *ctx, lsm6dso32_pp_od_t val)
Push-pull/open drain selection on interrupt pads.[set].
Definition lsm6dso32_reg.c:3496
lsm6dso32_pin_int1_route_set
int32_t lsm6dso32_pin_int1_route_set(stmdev_ctx_t *ctx, lsm6dso32_pin_int1_route_t *val)
Select the signal that need to route on int1 pad.[set].
Definition lsm6dso32_reg.c:3113
lsm6dso32_pin_mode_get
int32_t lsm6dso32_pin_mode_get(stmdev_ctx_t *ctx, lsm6dso32_pp_od_t *val)
Push-pull/open drain selection on interrupt pads.[get].
Definition lsm6dso32_reg.c:3521
lsm6dso32_pin_int2_route_set
int32_t lsm6dso32_pin_int2_route_set(stmdev_ctx_t *ctx, lsm6dso32_pin_int2_route_t *val)
Select the signal that need to route on int2 pad.[set].
Definition lsm6dso32_reg.c:3305
lsm6dso32_pin_int1_route_get
int32_t lsm6dso32_pin_int1_route_get(stmdev_ctx_t *ctx, lsm6dso32_pin_int1_route_t *val)
Select the signal that need to route on int1 pad.[get].
Definition lsm6dso32_reg.c:3251
lsm6dso32_pin_polarity_get
int32_t lsm6dso32_pin_polarity_get(stmdev_ctx_t *ctx, lsm6dso32_h_lactive_t *val)
Interrupt active-high/low.[get].
Definition lsm6dso32_reg.c:3580
lsm6dso32_pin_polarity_set
int32_t lsm6dso32_pin_polarity_set(stmdev_ctx_t *ctx, lsm6dso32_h_lactive_t val)
Interrupt active-high/low.[set].
Definition lsm6dso32_reg.c:3555
lsm6dso32_int1_mode_get
int32_t lsm6dso32_int1_mode_get(stmdev_ctx_t *ctx, lsm6dso32_int1_pd_en_t *val)
Connect/Disconnect INT1 internal pull-down.[get].
Definition lsm6dso32_reg.c:3077
lsm6dso32_all_on_int1_get
int32_t lsm6dso32_all_on_int1_get(stmdev_ctx_t *ctx, uint8_t *val)
All interrupt signals become available on INT1 pin.[get].
Definition lsm6dso32_reg.c:3638
lsm6dso32_int1_mode_set
int32_t lsm6dso32_int1_mode_set(stmdev_ctx_t *ctx, lsm6dso32_int1_pd_en_t val)
Connect/Disconnect INT1 internal pull-down.[set].
Definition lsm6dso32_reg.c:3052
lsm6dso32_all_on_int1_set
int32_t lsm6dso32_all_on_int1_set(stmdev_ctx_t *ctx, uint8_t val)
All interrupt signals become available on INT1 pin.[set].
Definition lsm6dso32_reg.c:3614
lsm6dso32_int_notification_set
int32_t lsm6dso32_int_notification_set(stmdev_ctx_t *ctx, lsm6dso32_lir_t val)
Interrupt notification mode.[set].
Definition lsm6dso32_reg.c:3657
lsm6dso32_motion_flag_data_ready_get
int32_t lsm6dso32_motion_flag_data_ready_get(stmdev_ctx_t *ctx, uint8_t *val)
Interrupt status bit for significant motion detection.[get].
Definition lsm6dso32_reg.c:7350
lsm6dso32_motion_sens_set
int32_t lsm6dso32_motion_sens_set(stmdev_ctx_t *ctx, uint8_t val)
Enable significant motion detection function.[set].
Definition lsm6dso32_reg.c:7284
lsm6dso32_motion_sens_get
int32_t lsm6dso32_motion_sens_get(stmdev_ctx_t *ctx, uint8_t *val)
Enable significant motion detection function.[get].
Definition lsm6dso32_reg.c:7320
lsm6dso32_tap_detection_on_z_set
int32_t lsm6dso32_tap_detection_on_z_set(stmdev_ctx_t *ctx, uint8_t val)
Enable Z direction in tap recognition.[set].
Definition lsm6dso32_reg.c:4246
lsm6dso32_tap_shock_set
int32_t lsm6dso32_tap_shock_set(stmdev_ctx_t *ctx, uint8_t val)
Maximum duration is the maximum time of an over threshold signal detection to be recognized as a tap ...
Definition lsm6dso32_reg.c:4590
lsm6dso32_tap_threshold_x_set
int32_t lsm6dso32_tap_threshold_x_set(stmdev_ctx_t *ctx, uint8_t val)
X-axis tap recognition threshold.[set].
Definition lsm6dso32_reg.c:4381
lsm6dso32_tap_quiet_get
int32_t lsm6dso32_tap_quiet_get(stmdev_ctx_t *ctx, uint8_t *val)
Quiet time is the time after the first detected tap in which there must not be any over threshold eve...
Definition lsm6dso32_reg.c:4674
lsm6dso32_tap_detection_on_x_set
int32_t lsm6dso32_tap_detection_on_x_set(stmdev_ctx_t *ctx, uint8_t val)
Enable X direction in tap recognition.[set].
Definition lsm6dso32_reg.c:4336
lsm6dso32_tap_detection_on_y_set
int32_t lsm6dso32_tap_detection_on_y_set(stmdev_ctx_t *ctx, uint8_t val)
Enable Y direction in tap recognition.[set].
Definition lsm6dso32_reg.c:4291
lsm6dso32_tap_threshold_z_set
int32_t lsm6dso32_tap_threshold_z_set(stmdev_ctx_t *ctx, uint8_t val)
Z-axis recognition threshold.[set].
Definition lsm6dso32_reg.c:4542
lsm6dso32_tap_threshold_y_get
int32_t lsm6dso32_tap_threshold_y_get(stmdev_ctx_t *ctx, uint8_t *val)
Y-axis tap recognition threshold.[get].
Definition lsm6dso32_reg.c:4523
lsm6dso32_tap_detection_on_y_get
int32_t lsm6dso32_tap_detection_on_y_get(stmdev_ctx_t *ctx, uint8_t *val)
Enable Y direction in tap recognition.[get].
Definition lsm6dso32_reg.c:4316
lsm6dso32_tap_mode_get
int32_t lsm6dso32_tap_mode_get(stmdev_ctx_t *ctx, lsm6dso32_single_double_tap_t *val)
Single/double-tap event enable.[get].
Definition lsm6dso32_reg.c:4775
lsm6dso32_tap_dur_set
int32_t lsm6dso32_tap_dur_set(stmdev_ctx_t *ctx, uint8_t val)
When double tap recognition is enabled, this register expresses the maximum time between two consecut...
Definition lsm6dso32_reg.c:4700
lsm6dso32_tap_detection_on_z_get
int32_t lsm6dso32_tap_detection_on_z_get(stmdev_ctx_t *ctx, uint8_t *val)
Enable Z direction in tap recognition.[get].
Definition lsm6dso32_reg.c:4271
lsm6dso32_tap_axis_priority_get
int32_t lsm6dso32_tap_axis_priority_get(stmdev_ctx_t *ctx, lsm6dso32_tap_priority_t *val)
Selection of axis priority for TAP detection.[get].
Definition lsm6dso32_reg.c:4449
lsm6dso32_tap_detection_on_x_get
int32_t lsm6dso32_tap_detection_on_x_get(stmdev_ctx_t *ctx, uint8_t *val)
Enable X direction in tap recognition.[get].
Definition lsm6dso32_reg.c:4361
lsm6dso32_tap_mode_set
int32_t lsm6dso32_tap_mode_set(stmdev_ctx_t *ctx, lsm6dso32_single_double_tap_t val)
Single/double-tap event enable.[set].
Definition lsm6dso32_reg.c:4750
lsm6dso32_tap_quiet_set
int32_t lsm6dso32_tap_quiet_set(stmdev_ctx_t *ctx, uint8_t val)
Quiet time is the time after the first detected tap in which there must not be any over threshold eve...
Definition lsm6dso32_reg.c:4644
lsm6dso32_tap_threshold_x_get
int32_t lsm6dso32_tap_threshold_x_get(stmdev_ctx_t *ctx, uint8_t *val)
X-axis tap recognition threshold.[get].
Definition lsm6dso32_reg.c:4405
lsm6dso32_tap_shock_get
int32_t lsm6dso32_tap_shock_get(stmdev_ctx_t *ctx, uint8_t *val)
Maximum duration is the maximum time of an over threshold signal detection to be recognized as a tap ...
Definition lsm6dso32_reg.c:4619
lsm6dso32_tap_threshold_y_set
int32_t lsm6dso32_tap_threshold_y_set(stmdev_ctx_t *ctx, uint8_t val)
Y-axis tap recognition threshold.[set].
Definition lsm6dso32_reg.c:4499
lsm6dso32_tap_axis_priority_set
int32_t lsm6dso32_tap_axis_priority_set(stmdev_ctx_t *ctx, lsm6dso32_tap_priority_t val)
Selection of axis priority for TAP detection.[set].
Definition lsm6dso32_reg.c:4424
lsm6dso32_tap_dur_get
int32_t lsm6dso32_tap_dur_get(stmdev_ctx_t *ctx, uint8_t *val)
When double tap recognition is enabled, this register expresses the maximum time between two consecut...
Definition lsm6dso32_reg.c:4731
lsm6dso32_tap_threshold_z_get
int32_t lsm6dso32_tap_threshold_z_get(stmdev_ctx_t *ctx, uint8_t *val)
Z-axis recognition threshold.[get].
Definition lsm6dso32_reg.c:4566
lsm6dso32_tilt_flag_data_ready_get
int32_t lsm6dso32_tilt_flag_data_ready_get(stmdev_ctx_t *ctx, uint8_t *val)
Interrupt status bit for tilt detection.[get].
Definition lsm6dso32_reg.c:7461
lsm6dso32_tilt_sens_set
int32_t lsm6dso32_tilt_sens_set(stmdev_ctx_t *ctx, uint8_t val)
Enable tilt calculation.[set].
Definition lsm6dso32_reg.c:7395
lsm6dso32_tilt_sens_get
int32_t lsm6dso32_tilt_sens_get(stmdev_ctx_t *ctx, uint8_t *val)
Enable tilt calculation.[get].
Definition lsm6dso32_reg.c:7431
lsm6dso32_xl_usr_offset_x_get
int32_t lsm6dso32_xl_usr_offset_x_get(stmdev_ctx_t *ctx, uint8_t *buff)
Accelerometer X-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_...
Definition lsm6dso32_reg.c:949
lsm6dso32_gy_full_scale_set
int32_t lsm6dso32_gy_full_scale_set(stmdev_ctx_t *ctx, lsm6dso32_fs_g_t val)
Gyroscope UI chain full-scale selection.[set].
Definition lsm6dso32_reg.c:455
lsm6dso32_xl_usr_offset_get
int32_t lsm6dso32_xl_usr_offset_get(stmdev_ctx_t *ctx, uint8_t *val)
User offset on out flag.[get].
Definition lsm6dso32_reg.c:1071
lsm6dso32_xl_usr_offset_z_get
int32_t lsm6dso32_xl_usr_offset_z_get(stmdev_ctx_t *ctx, uint8_t *buff)
Accelerometer Z-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_...
Definition lsm6dso32_reg.c:1029
lsm6dso32_xl_offset_weight_set
int32_t lsm6dso32_xl_offset_weight_set(stmdev_ctx_t *ctx, lsm6dso32_usr_off_w_t val)
Weight of XL user offset bits of registers X_OFS_USR (73h), Y_OFS_USR (74h), Z_OFS_USR (75h)....
Definition lsm6dso32_reg.c:716
lsm6dso32_xl_full_scale_set
int32_t lsm6dso32_xl_full_scale_set(stmdev_ctx_t *ctx, lsm6dso32_fs_xl_t val)
Accelerometer full-scale selection.[set].
Definition lsm6dso32_reg.c:172
lsm6dso32_block_data_update_set
int32_t lsm6dso32_block_data_update_set(stmdev_ctx_t *ctx, uint8_t val)
Block data update.[set].
Definition lsm6dso32_reg.c:670
lsm6dso32_xl_usr_offset_z_set
int32_t lsm6dso32_xl_usr_offset_z_set(stmdev_ctx_t *ctx, uint8_t *buff)
Accelerometer Z-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_...
Definition lsm6dso32_reg.c:1009
lsm6dso32_xl_flag_data_ready_get
int32_t lsm6dso32_xl_flag_data_ready_get(stmdev_ctx_t *ctx, uint8_t *val)
Accelerometer new data available.[get].
Definition lsm6dso32_reg.c:867
lsm6dso32_xl_data_rate_set
int32_t lsm6dso32_xl_data_rate_set(stmdev_ctx_t *ctx, lsm6dso32_odr_xl_t val)
Accelerometer UI data rate and power mode selection.[set].
Definition lsm6dso32_reg.c:242
lsm6dso32_xl_usr_offset_y_set
int32_t lsm6dso32_xl_usr_offset_y_set(stmdev_ctx_t *ctx, uint8_t *buff)
Accelerometer Y-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_...
Definition lsm6dso32_reg.c:969
lsm6dso32_xl_full_scale_get
int32_t lsm6dso32_xl_full_scale_get(stmdev_ctx_t *ctx, lsm6dso32_fs_xl_t *val)
Accelerometer full-scale selection.[get].
Definition lsm6dso32_reg.c:199
lsm6dso32_xl_offset_weight_get
int32_t lsm6dso32_xl_offset_weight_get(stmdev_ctx_t *ctx, lsm6dso32_usr_off_w_t *val)
Weight of XL user offset bits of registers X_OFS_USR (73h), Y_OFS_USR (74h), Z_OFS_USR (75h)....
Definition lsm6dso32_reg.c:742
lsm6dso32_i3c_disable_set
int32_t lsm6dso32_i3c_disable_set(stmdev_ctx_t *ctx, lsm6dso32_i3c_disable_t val)
I3C Enable/Disable communication protocol[.set].
Definition lsm6dso32_reg.c:2944
lsm6dso32_gy_flag_data_ready_get
int32_t lsm6dso32_gy_flag_data_ready_get(stmdev_ctx_t *ctx, uint8_t *val)
Gyroscope new data available.[get].
Definition lsm6dso32_reg.c:887
lsm6dso32_xl_data_rate_get
int32_t lsm6dso32_xl_data_rate_get(stmdev_ctx_t *ctx, lsm6dso32_odr_xl_t *val)
Accelerometer UI data rate selection.[get].
Definition lsm6dso32_reg.c:316
lsm6dso32_all_sources_get
int32_t lsm6dso32_all_sources_get(stmdev_ctx_t *ctx, lsm6dso32_all_sources_t *val)
Read all the interrupt flag of the device.[get].
Definition lsm6dso32_reg.c:778
lsm6dso32_xl_usr_offset_x_set
int32_t lsm6dso32_xl_usr_offset_x_set(stmdev_ctx_t *ctx, uint8_t *buff)
Accelerometer X-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_...
Definition lsm6dso32_reg.c:929
lsm6dso32_temp_flag_data_ready_get
int32_t lsm6dso32_temp_flag_data_ready_get(stmdev_ctx_t *ctx, uint8_t *val)
Temperature new data available.[get].
Definition lsm6dso32_reg.c:907
lsm6dso32_i3c_disable_get
int32_t lsm6dso32_i3c_disable_get(stmdev_ctx_t *ctx, lsm6dso32_i3c_disable_t *val)
I3C Enable/Disable communication protocol.[get].
Definition lsm6dso32_reg.c:2985
lsm6dso32_gy_data_rate_get
int32_t lsm6dso32_gy_data_rate_get(stmdev_ctx_t *ctx, lsm6dso32_odr_g_t *val)
Gyroscope UI data rate selection.[get].
Definition lsm6dso32_reg.c:574
lsm6dso32_gy_full_scale_get
int32_t lsm6dso32_gy_full_scale_get(stmdev_ctx_t *ctx, lsm6dso32_fs_g_t *val)
Gyroscope UI chain full-scale selection.[get].
Definition lsm6dso32_reg.c:480
lsm6dso32_gy_data_rate_set
int32_t lsm6dso32_gy_data_rate_set(stmdev_ctx_t *ctx, lsm6dso32_odr_g_t val)
Gyroscope UI data rate selection.[set].
Definition lsm6dso32_reg.c:526
lsm6dso32_status_reg_get
int32_t lsm6dso32_status_reg_get(stmdev_ctx_t *ctx, lsm6dso32_status_reg_t *val)
The STATUS_REG register is read by the primary interface.[get].
Definition lsm6dso32_reg.c:849
lsm6dso32_i2c_interface_get
int32_t lsm6dso32_i2c_interface_get(stmdev_ctx_t *ctx, lsm6dso32_i2c_disable_t *val)
Disable / Enable I2C interface.[get].
Definition lsm6dso32_reg.c:2910
lsm6dso32_xl_usr_offset_y_get
int32_t lsm6dso32_xl_usr_offset_y_get(stmdev_ctx_t *ctx, uint8_t *buff)
Accelerometer Y-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_...
Definition lsm6dso32_reg.c:989
lsm6dso32_block_data_update_get
int32_t lsm6dso32_block_data_update_get(stmdev_ctx_t *ctx, uint8_t *val)
Block data update.[get].
Definition lsm6dso32_reg.c:695
lsm6dso32_spi_mode_get
int32_t lsm6dso32_spi_mode_get(stmdev_ctx_t *ctx, lsm6dso32_sim_t *val)
SPI Serial Interface Mode selection.[get].
Definition lsm6dso32_reg.c:2849
lsm6dso32_spi_mode_set
int32_t lsm6dso32_spi_mode_set(stmdev_ctx_t *ctx, lsm6dso32_sim_t val)
SPI Serial Interface Mode selection.[set].
Definition lsm6dso32_reg.c:2825
lsm6dso32_xl_usr_offset_set
int32_t lsm6dso32_xl_usr_offset_set(stmdev_ctx_t *ctx, uint8_t val)
Enables user offset on out.[set].
Definition lsm6dso32_reg.c:1047
lsm6dso32_i2c_interface_set
int32_t lsm6dso32_i2c_interface_set(stmdev_ctx_t *ctx, lsm6dso32_i2c_disable_t val)
Disable / Enable I2C interface.[set].
Definition lsm6dso32_reg.c:2884
lsm6dso32_sdo_sa0_mode_get
int32_t lsm6dso32_sdo_sa0_mode_get(stmdev_ctx_t *ctx, lsm6dso32_sdo_pu_en_t *val)
Connect/Disconnect SDO/SA0 internal pull-up.[get].
Definition lsm6dso32_reg.c:2791
lsm6dso32_sdo_sa0_mode_set
int32_t lsm6dso32_sdo_sa0_mode_set(stmdev_ctx_t *ctx, lsm6dso32_sdo_pu_en_t val)
Connect/Disconnect SDO/SA0 internal pull-up.[set].
Definition lsm6dso32_reg.c:2766
lsm6dso32_slope_fds_t
lsm6dso32_slope_fds_t
Definition lsm6dso32_reg.h:3014
LSM6DSO32_USE_SLOPE
@ LSM6DSO32_USE_SLOPE
Definition lsm6dso32_reg.h:3015
LSM6DSO32_USE_HPF
@ LSM6DSO32_USE_HPF
Definition lsm6dso32_reg.h:3016
lsm6dso32_den_lh_t
lsm6dso32_den_lh_t
Definition lsm6dso32_reg.h:3518
LSM6DSO32_DEN_ACT_HIGH
@ LSM6DSO32_DEN_ACT_HIGH
Definition lsm6dso32_reg.h:3520
LSM6DSO32_DEN_ACT_LOW
@ LSM6DSO32_DEN_ACT_LOW
Definition lsm6dso32_reg.h:3519
lsm6dso32_hp_slope_xl_en_t
lsm6dso32_hp_slope_xl_en_t
Definition lsm6dso32_reg.h:2978
LSM6DSO32_LP_ODR_DIV_10
@ LSM6DSO32_LP_ODR_DIV_10
Definition lsm6dso32_reg.h:2995
LSM6DSO32_HP_REF_MD_ODR_DIV_10
@ LSM6DSO32_HP_REF_MD_ODR_DIV_10
Definition lsm6dso32_reg.h:2988
LSM6DSO32_LP_ODR_DIV_100
@ LSM6DSO32_LP_ODR_DIV_100
Definition lsm6dso32_reg.h:2998
LSM6DSO32_HP_PATH_DISABLE_ON_OUT
@ LSM6DSO32_HP_PATH_DISABLE_ON_OUT
Definition lsm6dso32_reg.h:2979
LSM6DSO32_HP_REF_MD_ODR_DIV_20
@ LSM6DSO32_HP_REF_MD_ODR_DIV_20
Definition lsm6dso32_reg.h:2989
LSM6DSO32_HP_REF_MD_ODR_DIV_45
@ LSM6DSO32_HP_REF_MD_ODR_DIV_45
Definition lsm6dso32_reg.h:2990
LSM6DSO32_HP_REF_MD_ODR_DIV_100
@ LSM6DSO32_HP_REF_MD_ODR_DIV_100
Definition lsm6dso32_reg.h:2991
LSM6DSO32_HP_ODR_DIV_800
@ LSM6DSO32_HP_ODR_DIV_800
Definition lsm6dso32_reg.h:2987
LSM6DSO32_HP_REF_MD_ODR_DIV_400
@ LSM6DSO32_HP_REF_MD_ODR_DIV_400
Definition lsm6dso32_reg.h:2993
LSM6DSO32_LP_ODR_DIV_20
@ LSM6DSO32_LP_ODR_DIV_20
Definition lsm6dso32_reg.h:2996
LSM6DSO32_HP_ODR_DIV_20
@ LSM6DSO32_HP_ODR_DIV_20
Definition lsm6dso32_reg.h:2982
LSM6DSO32_HP_ODR_DIV_100
@ LSM6DSO32_HP_ODR_DIV_100
Definition lsm6dso32_reg.h:2984
LSM6DSO32_SLOPE_ODR_DIV_4
@ LSM6DSO32_SLOPE_ODR_DIV_4
Definition lsm6dso32_reg.h:2980
LSM6DSO32_HP_REF_MD_ODR_DIV_800
@ LSM6DSO32_HP_REF_MD_ODR_DIV_800
Definition lsm6dso32_reg.h:2994
LSM6DSO32_LP_ODR_DIV_45
@ LSM6DSO32_LP_ODR_DIV_45
Definition lsm6dso32_reg.h:2997
LSM6DSO32_LP_ODR_DIV_200
@ LSM6DSO32_LP_ODR_DIV_200
Definition lsm6dso32_reg.h:2999
LSM6DSO32_HP_ODR_DIV_200
@ LSM6DSO32_HP_ODR_DIV_200
Definition lsm6dso32_reg.h:2985
LSM6DSO32_LP_ODR_DIV_800
@ LSM6DSO32_LP_ODR_DIV_800
Definition lsm6dso32_reg.h:3001
LSM6DSO32_HP_ODR_DIV_45
@ LSM6DSO32_HP_ODR_DIV_45
Definition lsm6dso32_reg.h:2983
LSM6DSO32_HP_REF_MD_ODR_DIV_200
@ LSM6DSO32_HP_REF_MD_ODR_DIV_200
Definition lsm6dso32_reg.h:2992
LSM6DSO32_HP_ODR_DIV_10
@ LSM6DSO32_HP_ODR_DIV_10
Definition lsm6dso32_reg.h:2981
LSM6DSO32_LP_ODR_DIV_400
@ LSM6DSO32_LP_ODR_DIV_400
Definition lsm6dso32_reg.h:3000
LSM6DSO32_HP_ODR_DIV_400
@ LSM6DSO32_HP_ODR_DIV_400
Definition lsm6dso32_reg.h:2986
lsm6dso32_ln_pg_read
int32_t lsm6dso32_ln_pg_read(stmdev_ctx_t *ctx, uint16_t address, uint8_t *val)
lsm6dso32_st_xl_t
lsm6dso32_st_xl_t
Definition lsm6dso32_reg.h:2926
LSM6DSO32_XL_ST_POSITIVE
@ LSM6DSO32_XL_ST_POSITIVE
Definition lsm6dso32_reg.h:2928
LSM6DSO32_XL_ST_DISABLE
@ LSM6DSO32_XL_ST_DISABLE
Definition lsm6dso32_reg.h:2927
LSM6DSO32_XL_ST_NEGATIVE
@ LSM6DSO32_XL_ST_NEGATIVE
Definition lsm6dso32_reg.h:2929
lsm6dso32_wake_ths_w_t
lsm6dso32_wake_ths_w_t
Definition lsm6dso32_reg.h:3151
LSM6DSO32_LSb_FS_DIV_64
@ LSM6DSO32_LSb_FS_DIV_64
Definition lsm6dso32_reg.h:3152
LSM6DSO32_LSb_FS_DIV_256
@ LSM6DSO32_LSb_FS_DIV_256
Definition lsm6dso32_reg.h:3153
lsm6dso32_rounding_t
lsm6dso32_rounding_t
Definition lsm6dso32_reg.h:2843
LSM6DSO32_ROUND_GY
@ LSM6DSO32_ROUND_GY
Definition lsm6dso32_reg.h:2846
LSM6DSO32_NO_ROUND
@ LSM6DSO32_NO_ROUND
Definition lsm6dso32_reg.h:2844
LSM6DSO32_ROUND_GY_XL
@ LSM6DSO32_ROUND_GY_XL
Definition lsm6dso32_reg.h:2847
LSM6DSO32_ROUND_XL
@ LSM6DSO32_ROUND_XL
Definition lsm6dso32_reg.h:2845
lsm6dso32_aux_sens_on_t
lsm6dso32_aux_sens_on_t
Definition lsm6dso32_reg.h:3776
LSM6DSO32_SLV_0_1_2
@ LSM6DSO32_SLV_0_1_2
Definition lsm6dso32_reg.h:3779
LSM6DSO32_SLV_0
@ LSM6DSO32_SLV_0
Definition lsm6dso32_reg.h:3777
LSM6DSO32_SLV_0_1
@ LSM6DSO32_SLV_0_1
Definition lsm6dso32_reg.h:3778
LSM6DSO32_SLV_0_1_2_3
@ LSM6DSO32_SLV_0_1_2_3
Definition lsm6dso32_reg.h:3780
lsm6dso32_reg_access_t
lsm6dso32_reg_access_t
Definition lsm6dso32_reg.h:2884
LSM6DSO32_USER_BANK
@ LSM6DSO32_USER_BANK
Definition lsm6dso32_reg.h:2885
LSM6DSO32_EMBEDDED_FUNC_BANK
@ LSM6DSO32_EMBEDDED_FUNC_BANK
Definition lsm6dso32_reg.h:2887
LSM6DSO32_SENSOR_HUB_BANK
@ LSM6DSO32_SENSOR_HUB_BANK
Definition lsm6dso32_reg.h:2886
lsm6dso32_sixd_ths_t
lsm6dso32_sixd_ths_t
Definition lsm6dso32_reg.h:3260
LSM6DSO32_DEG_68
@ LSM6DSO32_DEG_68
Definition lsm6dso32_reg.h:3261
LSM6DSO32_DEG_47
@ LSM6DSO32_DEG_47
Definition lsm6dso32_reg.h:3262
lsm6dso32_h_lactive_t
lsm6dso32_h_lactive_t
Definition lsm6dso32_reg.h:3126
LSM6DSO32_ACTIVE_HIGH
@ LSM6DSO32_ACTIVE_HIGH
Definition lsm6dso32_reg.h:3127
LSM6DSO32_ACTIVE_LOW
@ LSM6DSO32_ACTIVE_LOW
Definition lsm6dso32_reg.h:3128
lsm6dso32_i3c_disable_t
lsm6dso32_i3c_disable_t
Definition lsm6dso32_reg.h:3067
LSM6DSO32_I3C_ENABLE_T_25ms
@ LSM6DSO32_I3C_ENABLE_T_25ms
Definition lsm6dso32_reg.h:3072
LSM6DSO32_I3C_DISABLE
@ LSM6DSO32_I3C_DISABLE
Definition lsm6dso32_reg.h:3068
LSM6DSO32_I3C_ENABLE_T_2us
@ LSM6DSO32_I3C_ENABLE_T_2us
Definition lsm6dso32_reg.h:3070
LSM6DSO32_I3C_ENABLE_T_50us
@ LSM6DSO32_I3C_ENABLE_T_50us
Definition lsm6dso32_reg.h:3069
LSM6DSO32_I3C_ENABLE_T_1ms
@ LSM6DSO32_I3C_ENABLE_T_1ms
Definition lsm6dso32_reg.h:3071
lsm6dso32_den_mode_t
lsm6dso32_den_mode_t
Definition lsm6dso32_reg.h:3505
LSM6DSO32_LEVEL_FIFO
@ LSM6DSO32_LEVEL_FIFO
Definition lsm6dso32_reg.h:3507
LSM6DSO32_EDGE_TRIGGER
@ LSM6DSO32_EDGE_TRIGGER
Definition lsm6dso32_reg.h:3510
LSM6DSO32_DEN_DISABLE
@ LSM6DSO32_DEN_DISABLE
Definition lsm6dso32_reg.h:3506
LSM6DSO32_LEVEL_TRIGGER
@ LSM6DSO32_LEVEL_TRIGGER
Definition lsm6dso32_reg.h:3509
LSM6DSO32_LEVEL_LETCHED
@ LSM6DSO32_LEVEL_LETCHED
Definition lsm6dso32_reg.h:3508
lsm6dso32_st_g_t
lsm6dso32_st_g_t
Definition lsm6dso32_reg.h:2937
LSM6DSO32_GY_ST_NEGATIVE
@ LSM6DSO32_GY_ST_NEGATIVE
Definition lsm6dso32_reg.h:2940
LSM6DSO32_GY_ST_POSITIVE
@ LSM6DSO32_GY_ST_POSITIVE
Definition lsm6dso32_reg.h:2939
LSM6DSO32_GY_ST_DISABLE
@ LSM6DSO32_GY_ST_DISABLE
Definition lsm6dso32_reg.h:2938
lsm6dso32_tap_priority_t
lsm6dso32_tap_priority_t
Definition lsm6dso32_reg.h:3219
LSM6DSO32_XYZ
@ LSM6DSO32_XYZ
Definition lsm6dso32_reg.h:3220
LSM6DSO32_ZXY
@ LSM6DSO32_ZXY
Definition lsm6dso32_reg.h:3225
LSM6DSO32_YXZ
@ LSM6DSO32_YXZ
Definition lsm6dso32_reg.h:3221
LSM6DSO32_XZY
@ LSM6DSO32_XZY
Definition lsm6dso32_reg.h:3222
LSM6DSO32_YZX
@ LSM6DSO32_YZX
Definition lsm6dso32_reg.h:3224
LSM6DSO32_ZYX
@ LSM6DSO32_ZYX
Definition lsm6dso32_reg.h:3223
lsm6dso32_mag_x_axis_t
lsm6dso32_mag_x_axis_t
Definition lsm6dso32_reg.h:3647
LSM6DSO32_X_EQ_X
@ LSM6DSO32_X_EQ_X
Definition lsm6dso32_reg.h:3650
LSM6DSO32_X_EQ_Z
@ LSM6DSO32_X_EQ_Z
Definition lsm6dso32_reg.h:3653
LSM6DSO32_X_EQ_MIN_Z
@ LSM6DSO32_X_EQ_MIN_Z
Definition lsm6dso32_reg.h:3652
LSM6DSO32_X_EQ_Y
@ LSM6DSO32_X_EQ_Y
Definition lsm6dso32_reg.h:3648
LSM6DSO32_X_EQ_MIN_X
@ LSM6DSO32_X_EQ_MIN_X
Definition lsm6dso32_reg.h:3651
LSM6DSO32_X_EQ_MIN_Y
@ LSM6DSO32_X_EQ_MIN_Y
Definition lsm6dso32_reg.h:3649
lsm6dso32_pedo_md_t
lsm6dso32_pedo_md_t
Definition lsm6dso32_reg.h:3551
LSM6DSO32_PEDO_BASE_MODE
@ LSM6DSO32_PEDO_BASE_MODE
Definition lsm6dso32_reg.h:3553
LSM6DSO32_PEDO_DISABLE
@ LSM6DSO32_PEDO_DISABLE
Definition lsm6dso32_reg.h:3552
LSM6DSO32_PEDO_ADV_MODE
@ LSM6DSO32_PEDO_ADV_MODE
Definition lsm6dso32_reg.h:3554
LSM6DSO32_FALSE_STEP_REJ
@ LSM6DSO32_FALSE_STEP_REJ
Definition lsm6dso32_reg.h:3555
LSM6DSO32_FALSE_STEP_REJ_ADV_MODE
@ LSM6DSO32_FALSE_STEP_REJ_ADV_MODE
Definition lsm6dso32_reg.h:3556
lsm6dso32_usr_off_w_t
lsm6dso32_usr_off_w_t
Definition lsm6dso32_reg.h:2772
LSM6DSO32_LSb_16mg
@ LSM6DSO32_LSb_16mg
Definition lsm6dso32_reg.h:2774
LSM6DSO32_LSb_1mg
@ LSM6DSO32_LSb_1mg
Definition lsm6dso32_reg.h:2773
lsm6dso32_single_double_tap_t
lsm6dso32_single_double_tap_t
Definition lsm6dso32_reg.h:3250
LSM6DSO32_ONLY_SINGLE
@ LSM6DSO32_ONLY_SINGLE
Definition lsm6dso32_reg.h:3251
LSM6DSO32_BOTH_SINGLE_DOUBLE
@ LSM6DSO32_BOTH_SINGLE_DOUBLE
Definition lsm6dso32_reg.h:3252
lsm6dso32_sim_t
lsm6dso32_sim_t
Definition lsm6dso32_reg.h:3047
LSM6DSO32_SPI_4_WIRE
@ LSM6DSO32_SPI_4_WIRE
Definition lsm6dso32_reg.h:3048
LSM6DSO32_SPI_3_WIRE
@ LSM6DSO32_SPI_3_WIRE
Definition lsm6dso32_reg.h:3049
lsm6dso32_odr_xl_t
lsm6dso32_odr_xl_t
Definition lsm6dso32_reg.h:2687
LSM6DSO32_XL_ODR_3333Hz_HIGH_PERF
@ LSM6DSO32_XL_ODR_3333Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2707
LSM6DSO32_XL_ODR_6667Hz_HIGH_PERF
@ LSM6DSO32_XL_ODR_6667Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2708
LSM6DSO32_XL_ODR_833Hz_HIGH_PERF
@ LSM6DSO32_XL_ODR_833Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2705
LSM6DSO32_XL_ODR_208Hz_ULTRA_LOW_PW
@ LSM6DSO32_XL_ODR_208Hz_ULTRA_LOW_PW
Definition lsm6dso32_reg.h:2718
LSM6DSO32_XL_ODR_12Hz5_HIGH_PERF
@ LSM6DSO32_XL_ODR_12Hz5_HIGH_PERF
Definition lsm6dso32_reg.h:2699
LSM6DSO32_XL_ODR_52Hz_HIGH_PERF
@ LSM6DSO32_XL_ODR_52Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2701
LSM6DSO32_XL_ODR_417Hz_HIGH_PERF
@ LSM6DSO32_XL_ODR_417Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2704
LSM6DSO32_XL_ODR_6Hz5_ULTRA_LOW_PW
@ LSM6DSO32_XL_ODR_6Hz5_ULTRA_LOW_PW
Definition lsm6dso32_reg.h:2713
LSM6DSO32_XL_ODR_208Hz_NORMAL_MD
@ LSM6DSO32_XL_ODR_208Hz_NORMAL_MD
Definition lsm6dso32_reg.h:2697
LSM6DSO32_XL_ODR_26Hz_LOW_PW
@ LSM6DSO32_XL_ODR_26Hz_LOW_PW
Definition lsm6dso32_reg.h:2693
LSM6DSO32_XL_ODR_208Hz_HIGH_PERF
@ LSM6DSO32_XL_ODR_208Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2703
LSM6DSO32_XL_ODR_12Hz5_LOW_PW
@ LSM6DSO32_XL_ODR_12Hz5_LOW_PW
Definition lsm6dso32_reg.h:2692
LSM6DSO32_XL_ODR_104Hz_NORMAL_MD
@ LSM6DSO32_XL_ODR_104Hz_NORMAL_MD
Definition lsm6dso32_reg.h:2696
LSM6DSO32_XL_ODR_26Hz_HIGH_PERF
@ LSM6DSO32_XL_ODR_26Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2700
LSM6DSO32_XL_ODR_52Hz_ULTRA_LOW_PW
@ LSM6DSO32_XL_ODR_52Hz_ULTRA_LOW_PW
Definition lsm6dso32_reg.h:2716
LSM6DSO32_XL_ODR_12Hz5_ULTRA_LOW_PW
@ LSM6DSO32_XL_ODR_12Hz5_ULTRA_LOW_PW
Definition lsm6dso32_reg.h:2714
LSM6DSO32_XL_ODR_6Hz5_LOW_PW
@ LSM6DSO32_XL_ODR_6Hz5_LOW_PW
Definition lsm6dso32_reg.h:2691
LSM6DSO32_XL_ODR_26Hz_ULTRA_LOW_PW
@ LSM6DSO32_XL_ODR_26Hz_ULTRA_LOW_PW
Definition lsm6dso32_reg.h:2715
LSM6DSO32_XL_ODR_1667Hz_HIGH_PERF
@ LSM6DSO32_XL_ODR_1667Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2706
LSM6DSO32_XL_ODR_OFF
@ LSM6DSO32_XL_ODR_OFF
Definition lsm6dso32_reg.h:2689
LSM6DSO32_XL_ODR_104Hz_HIGH_PERF
@ LSM6DSO32_XL_ODR_104Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2702
LSM6DSO32_XL_ODR_52Hz_LOW_PW
@ LSM6DSO32_XL_ODR_52Hz_LOW_PW
Definition lsm6dso32_reg.h:2694
LSM6DSO32_XL_ODR_104Hz_ULTRA_LOW_PW
@ LSM6DSO32_XL_ODR_104Hz_ULTRA_LOW_PW
Definition lsm6dso32_reg.h:2717
lsm6dso32_shub_odr_t
lsm6dso32_shub_odr_t
Definition lsm6dso32_reg.h:3828
LSM6DSO32_SH_ODR_13Hz
@ LSM6DSO32_SH_ODR_13Hz
Definition lsm6dso32_reg.h:3832
LSM6DSO32_SH_ODR_26Hz
@ LSM6DSO32_SH_ODR_26Hz
Definition lsm6dso32_reg.h:3831
LSM6DSO32_SH_ODR_52Hz
@ LSM6DSO32_SH_ODR_52Hz
Definition lsm6dso32_reg.h:3830
LSM6DSO32_SH_ODR_104Hz
@ LSM6DSO32_SH_ODR_104Hz
Definition lsm6dso32_reg.h:3829
lsm6dso32_sleep_status_on_int_t
lsm6dso32_sleep_status_on_int_t
Definition lsm6dso32_reg.h:3175
LSM6DSO32_DRIVE_SLEEP_CHG_EVENT
@ LSM6DSO32_DRIVE_SLEEP_CHG_EVENT
Definition lsm6dso32_reg.h:3176
LSM6DSO32_DRIVE_SLEEP_STATUS
@ LSM6DSO32_DRIVE_SLEEP_STATUS
Definition lsm6dso32_reg.h:3177
lsm6dso32_shub_pu_en_t
lsm6dso32_shub_pu_en_t
Definition lsm6dso32_reg.h:3791
LSM6DSO32_INTERNAL_PULL_UP
@ LSM6DSO32_INTERNAL_PULL_UP
Definition lsm6dso32_reg.h:3793
LSM6DSO32_EXT_PULL_UP
@ LSM6DSO32_EXT_PULL_UP
Definition lsm6dso32_reg.h:3792
lsm6dso32_start_config_t
lsm6dso32_start_config_t
Definition lsm6dso32_reg.h:3805
LSM6DSO32_XL_GY_DRDY
@ LSM6DSO32_XL_GY_DRDY
Definition lsm6dso32_reg.h:3807
LSM6DSO32_EXT_ON_INT2_PIN
@ LSM6DSO32_EXT_ON_INT2_PIN
Definition lsm6dso32_reg.h:3806
lsm6dso32_carry_count_en_t
lsm6dso32_carry_count_en_t
Definition lsm6dso32_reg.h:3577
LSM6DSO32_COUNT_OVERFLOW
@ LSM6DSO32_COUNT_OVERFLOW
Definition lsm6dso32_reg.h:3579
LSM6DSO32_EVERY_STEP
@ LSM6DSO32_EVERY_STEP
Definition lsm6dso32_reg.h:3578
lsm6dso32_write_once_t
lsm6dso32_write_once_t
Definition lsm6dso32_reg.h:3815
LSM6DSO32_EACH_SH_CYCLE
@ LSM6DSO32_EACH_SH_CYCLE
Definition lsm6dso32_reg.h:3816
LSM6DSO32_ONLY_FIRST_CYCLE
@ LSM6DSO32_ONLY_FIRST_CYCLE
Definition lsm6dso32_reg.h:3817
lsm6dso32_sdo_pu_en_t
lsm6dso32_sdo_pu_en_t
Definition lsm6dso32_reg.h:3037
LSM6DSO32_PULL_UP_DISC
@ LSM6DSO32_PULL_UP_DISC
Definition lsm6dso32_reg.h:3038
LSM6DSO32_PULL_UP_CONNECT
@ LSM6DSO32_PULL_UP_CONNECT
Definition lsm6dso32_reg.h:3039
lsm6dso32_lir_t
lsm6dso32_lir_t
Definition lsm6dso32_reg.h:3139
LSM6DSO32_ALL_INT_LATCHED
@ LSM6DSO32_ALL_INT_LATCHED
Definition lsm6dso32_reg.h:3143
LSM6DSO32_BASE_LATCHED_EMB_PULSED
@ LSM6DSO32_BASE_LATCHED_EMB_PULSED
Definition lsm6dso32_reg.h:3141
LSM6DSO32_BASE_PULSED_EMB_LATCHED
@ LSM6DSO32_BASE_PULSED_EMB_LATCHED
Definition lsm6dso32_reg.h:3142
LSM6DSO32_ALL_INT_PULSED
@ LSM6DSO32_ALL_INT_PULSED
Definition lsm6dso32_reg.h:3140
lsm6dso32_ftype_t
lsm6dso32_ftype_t
Definition lsm6dso32_reg.h:2959
LSM6DSO32_ULTRA_LIGHT
@ LSM6DSO32_ULTRA_LIGHT
Definition lsm6dso32_reg.h:2960
LSM6DSO32_STRONG
@ LSM6DSO32_STRONG
Definition lsm6dso32_reg.h:2964
LSM6DSO32_VERY_STRONG
@ LSM6DSO32_VERY_STRONG
Definition lsm6dso32_reg.h:2965
LSM6DSO32_XTREME
@ LSM6DSO32_XTREME
Definition lsm6dso32_reg.h:2967
LSM6DSO32_MEDIUM
@ LSM6DSO32_MEDIUM
Definition lsm6dso32_reg.h:2963
LSM6DSO32_AGGRESSIVE
@ LSM6DSO32_AGGRESSIVE
Definition lsm6dso32_reg.h:2966
LSM6DSO32_LIGHT
@ LSM6DSO32_LIGHT
Definition lsm6dso32_reg.h:2962
LSM6DSO32_VERY_LIGHT
@ LSM6DSO32_VERY_LIGHT
Definition lsm6dso32_reg.h:2961
lsm6dso32_i2c_disable_t
lsm6dso32_i2c_disable_t
Definition lsm6dso32_reg.h:3057
LSM6DSO32_I2C_ENABLE
@ LSM6DSO32_I2C_ENABLE
Definition lsm6dso32_reg.h:3058
LSM6DSO32_I2C_DISABLE
@ LSM6DSO32_I2C_DISABLE
Definition lsm6dso32_reg.h:3059
lsm6dso32_mag_z_axis_t
lsm6dso32_mag_z_axis_t
Definition lsm6dso32_reg.h:3619
LSM6DSO32_Z_EQ_MIN_Z
@ LSM6DSO32_Z_EQ_MIN_Z
Definition lsm6dso32_reg.h:3624
LSM6DSO32_Z_EQ_MIN_X
@ LSM6DSO32_Z_EQ_MIN_X
Definition lsm6dso32_reg.h:3623
LSM6DSO32_Z_EQ_Z
@ LSM6DSO32_Z_EQ_Z
Definition lsm6dso32_reg.h:3625
LSM6DSO32_Z_EQ_MIN_Y
@ LSM6DSO32_Z_EQ_MIN_Y
Definition lsm6dso32_reg.h:3621
LSM6DSO32_Z_EQ_Y
@ LSM6DSO32_Z_EQ_Y
Definition lsm6dso32_reg.h:3620
LSM6DSO32_Z_EQ_X
@ LSM6DSO32_Z_EQ_X
Definition lsm6dso32_reg.h:3622
lsm6dso32_fs_g_t
lsm6dso32_fs_g_t
Definition lsm6dso32_reg.h:2726
LSM6DSO32_500dps
@ LSM6DSO32_500dps
Definition lsm6dso32_reg.h:2729
LSM6DSO32_125dps
@ LSM6DSO32_125dps
Definition lsm6dso32_reg.h:2728
LSM6DSO32_2000dps
@ LSM6DSO32_2000dps
Definition lsm6dso32_reg.h:2731
LSM6DSO32_1000dps
@ LSM6DSO32_1000dps
Definition lsm6dso32_reg.h:2730
LSM6DSO32_250dps
@ LSM6DSO32_250dps
Definition lsm6dso32_reg.h:2727
lsm6dso32_odr_g_t
lsm6dso32_odr_g_t
Definition lsm6dso32_reg.h:2739
LSM6DSO32_GY_ODR_52Hz_LOW_PW
@ LSM6DSO32_GY_ODR_52Hz_LOW_PW
Definition lsm6dso32_reg.h:2759
LSM6DSO32_GY_ODR_104Hz_HIGH_PERF
@ LSM6DSO32_GY_ODR_104Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2746
LSM6DSO32_GY_ODR_12Hz5_LOW_PW
@ LSM6DSO32_GY_ODR_12Hz5_LOW_PW
Definition lsm6dso32_reg.h:2757
LSM6DSO32_GY_ODR_26Hz_HIGH_PERF
@ LSM6DSO32_GY_ODR_26Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2744
LSM6DSO32_GY_ODR_208Hz_NORMAL_MD
@ LSM6DSO32_GY_ODR_208Hz_NORMAL_MD
Definition lsm6dso32_reg.h:2755
LSM6DSO32_GY_ODR_6667Hz_HIGH_PERF
@ LSM6DSO32_GY_ODR_6667Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2752
LSM6DSO32_GY_ODR_104Hz_NORMAL_MD
@ LSM6DSO32_GY_ODR_104Hz_NORMAL_MD
Definition lsm6dso32_reg.h:2754
LSM6DSO32_GY_ODR_OFF
@ LSM6DSO32_GY_ODR_OFF
Definition lsm6dso32_reg.h:2741
LSM6DSO32_GY_ODR_52Hz_HIGH_PERF
@ LSM6DSO32_GY_ODR_52Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2745
LSM6DSO32_GY_ODR_417Hz_HIGH_PERF
@ LSM6DSO32_GY_ODR_417Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2748
LSM6DSO32_GY_ODR_26Hz_LOW_PW
@ LSM6DSO32_GY_ODR_26Hz_LOW_PW
Definition lsm6dso32_reg.h:2758
LSM6DSO32_GY_ODR_12Hz5_HIGH_PERF
@ LSM6DSO32_GY_ODR_12Hz5_HIGH_PERF
Definition lsm6dso32_reg.h:2743
LSM6DSO32_GY_ODR_3333Hz_HIGH_PERF
@ LSM6DSO32_GY_ODR_3333Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2751
LSM6DSO32_GY_ODR_1667Hz_HIGH_PERF
@ LSM6DSO32_GY_ODR_1667Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2750
LSM6DSO32_GY_ODR_833Hz_HIGH_PERF
@ LSM6DSO32_GY_ODR_833Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2749
LSM6DSO32_GY_ODR_208Hz_HIGH_PERF
@ LSM6DSO32_GY_ODR_208Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2747
lsm6dso32_dataready_pulsed_t
lsm6dso32_dataready_pulsed_t
Definition lsm6dso32_reg.h:2905
LSM6DSO32_DRDY_LATCHED
@ LSM6DSO32_DRDY_LATCHED
Definition lsm6dso32_reg.h:2906
LSM6DSO32_DRDY_PULSED
@ LSM6DSO32_DRDY_PULSED
Definition lsm6dso32_reg.h:2907
lsm6dso32_int1_pd_en_t
lsm6dso32_int1_pd_en_t
Definition lsm6dso32_reg.h:3080
LSM6DSO32_PULL_DOWN_CONNECT
@ LSM6DSO32_PULL_DOWN_CONNECT
Definition lsm6dso32_reg.h:3082
LSM6DSO32_PULL_DOWN_DISC
@ LSM6DSO32_PULL_DOWN_DISC
Definition lsm6dso32_reg.h:3081
lsm6dso32_mag_y_axis_t
lsm6dso32_mag_y_axis_t
Definition lsm6dso32_reg.h:3633
LSM6DSO32_Y_EQ_Y
@ LSM6DSO32_Y_EQ_Y
Definition lsm6dso32_reg.h:3634
LSM6DSO32_Y_EQ_X
@ LSM6DSO32_Y_EQ_X
Definition lsm6dso32_reg.h:3636
LSM6DSO32_Y_EQ_Z
@ LSM6DSO32_Y_EQ_Z
Definition lsm6dso32_reg.h:3639
LSM6DSO32_Y_EQ_MIN_X
@ LSM6DSO32_Y_EQ_MIN_X
Definition lsm6dso32_reg.h:3637
LSM6DSO32_Y_EQ_MIN_Y
@ LSM6DSO32_Y_EQ_MIN_Y
Definition lsm6dso32_reg.h:3635
LSM6DSO32_Y_EQ_MIN_Z
@ LSM6DSO32_Y_EQ_MIN_Z
Definition lsm6dso32_reg.h:3638
lsm6dso32_inact_en_t
lsm6dso32_inact_en_t
Definition lsm6dso32_reg.h:3185
LSM6DSO32_XL_12Hz5_GY_NOT_AFFECTED
@ LSM6DSO32_XL_12Hz5_GY_NOT_AFFECTED
Definition lsm6dso32_reg.h:3187
LSM6DSO32_XL_12Hz5_GY_PD
@ LSM6DSO32_XL_12Hz5_GY_PD
Definition lsm6dso32_reg.h:3189
LSM6DSO32_XL_AND_GY_NOT_AFFECTED
@ LSM6DSO32_XL_AND_GY_NOT_AFFECTED
Definition lsm6dso32_reg.h:3186
LSM6DSO32_XL_12Hz5_GY_SLEEP
@ LSM6DSO32_XL_12Hz5_GY_SLEEP
Definition lsm6dso32_reg.h:3188
lsm6dso32_fs_xl_t
lsm6dso32_fs_xl_t
Definition lsm6dso32_reg.h:2675
LSM6DSO32_32g
@ LSM6DSO32_32g
Definition lsm6dso32_reg.h:2679
LSM6DSO32_16g
@ LSM6DSO32_16g
Definition lsm6dso32_reg.h:2678
LSM6DSO32_8g
@ LSM6DSO32_8g
Definition lsm6dso32_reg.h:2677
LSM6DSO32_4g
@ LSM6DSO32_4g
Definition lsm6dso32_reg.h:2676
lsm6dso32_den_xl_g_t
lsm6dso32_den_xl_g_t
Definition lsm6dso32_reg.h:3528
LSM6DSO32_STAMP_IN_XL_DATA
@ LSM6DSO32_STAMP_IN_XL_DATA
Definition lsm6dso32_reg.h:3530
LSM6DSO32_STAMP_IN_GY_DATA
@ LSM6DSO32_STAMP_IN_GY_DATA
Definition lsm6dso32_reg.h:3529
LSM6DSO32_STAMP_IN_GY_XL_DATA
@ LSM6DSO32_STAMP_IN_GY_XL_DATA
Definition lsm6dso32_reg.h:3531
lsm6dso32_pp_od_t
lsm6dso32_pp_od_t
Definition lsm6dso32_reg.h:3116
LSM6DSO32_OPEN_DRAIN
@ LSM6DSO32_OPEN_DRAIN
Definition lsm6dso32_reg.h:3118
LSM6DSO32_PUSH_PULL
@ LSM6DSO32_PUSH_PULL
Definition lsm6dso32_reg.h:3117
lsm6dso32_ff_ths_t
lsm6dso32_ff_ths_t
Definition lsm6dso32_reg.h:3273
LSM6DSO32_FF_TSH_500mg
@ LSM6DSO32_FF_TSH_500mg
Definition lsm6dso32_reg.h:3276
LSM6DSO32_FF_TSH_438mg
@ LSM6DSO32_FF_TSH_438mg
Definition lsm6dso32_reg.h:3275
LSM6DSO32_FF_TSH_312mg
@ LSM6DSO32_FF_TSH_312mg
Definition lsm6dso32_reg.h:3274
lsm6dso32_hpm_g_t
lsm6dso32_hpm_g_t
Definition lsm6dso32_reg.h:3024
LSM6DSO32_HP_FILTER_NONE
@ LSM6DSO32_HP_FILTER_NONE
Definition lsm6dso32_reg.h:3025
LSM6DSO32_HP_FILTER_16mHz
@ LSM6DSO32_HP_FILTER_16mHz
Definition lsm6dso32_reg.h:3026
LSM6DSO32_HP_FILTER_1Hz04
@ LSM6DSO32_HP_FILTER_1Hz04
Definition lsm6dso32_reg.h:3029
LSM6DSO32_HP_FILTER_260mHz
@ LSM6DSO32_HP_FILTER_260mHz
Definition lsm6dso32_reg.h:3028
LSM6DSO32_HP_FILTER_65mHz
@ LSM6DSO32_HP_FILTER_65mHz
Definition lsm6dso32_reg.h:3027
bitwise_t
Definition lis2mdl_reg.h:79
lsm6dso32_all_int_src_t
Definition lsm6dso32_reg.h:542
lsm6dso32_all_int_src_t::sleep_change_ia
uint8_t sleep_change_ia
Definition lsm6dso32_reg.h:549
lsm6dso32_all_int_src_t::wu_ia
uint8_t wu_ia
Definition lsm6dso32_reg.h:545
lsm6dso32_all_int_src_t::double_tap
uint8_t double_tap
Definition lsm6dso32_reg.h:547
lsm6dso32_all_int_src_t::single_tap
uint8_t single_tap
Definition lsm6dso32_reg.h:546
lsm6dso32_all_int_src_t::timestamp_endcount
uint8_t timestamp_endcount
Definition lsm6dso32_reg.h:551
lsm6dso32_all_int_src_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:550
lsm6dso32_all_int_src_t::ff_ia
uint8_t ff_ia
Definition lsm6dso32_reg.h:544
lsm6dso32_all_int_src_t::d6d_ia
uint8_t d6d_ia
Definition lsm6dso32_reg.h:548
lsm6dso32_all_sources_t
Definition lsm6dso32_reg.h:2782
lsm6dso32_all_sources_t::all_int_src
lsm6dso32_all_int_src_t all_int_src
Definition lsm6dso32_reg.h:2783
lsm6dso32_all_sources_t::emb_func_status
lsm6dso32_emb_func_status_t emb_func_status
Definition lsm6dso32_reg.h:2788
lsm6dso32_all_sources_t::fsm_status_b
lsm6dso32_fsm_status_b_t fsm_status_b
Definition lsm6dso32_reg.h:2790
lsm6dso32_all_sources_t::d6d_src
lsm6dso32_d6d_src_t d6d_src
Definition lsm6dso32_reg.h:2786
lsm6dso32_all_sources_t::wake_up_src
lsm6dso32_wake_up_src_t wake_up_src
Definition lsm6dso32_reg.h:2784
lsm6dso32_all_sources_t::fsm_status_a
lsm6dso32_fsm_status_a_t fsm_status_a
Definition lsm6dso32_reg.h:2789
lsm6dso32_all_sources_t::status_reg
lsm6dso32_status_reg_t status_reg
Definition lsm6dso32_reg.h:2787
lsm6dso32_all_sources_t::tap_src
lsm6dso32_tap_src_t tap_src
Definition lsm6dso32_reg.h:2785
lsm6dso32_counter_bdr_reg1_t
Definition lsm6dso32_reg.h:279
lsm6dso32_counter_bdr_reg1_t::trig_counter_bdr
uint8_t trig_counter_bdr
Definition lsm6dso32_reg.h:283
lsm6dso32_counter_bdr_reg1_t::dataready_pulsed
uint8_t dataready_pulsed
Definition lsm6dso32_reg.h:285
lsm6dso32_counter_bdr_reg1_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:282
lsm6dso32_counter_bdr_reg1_t::rst_counter_bdr
uint8_t rst_counter_bdr
Definition lsm6dso32_reg.h:284
lsm6dso32_counter_bdr_reg1_t::cnt_bdr_th
uint8_t cnt_bdr_th
Definition lsm6dso32_reg.h:281
lsm6dso32_counter_bdr_reg2_t
Definition lsm6dso32_reg.h:297
lsm6dso32_counter_bdr_reg2_t::cnt_bdr_th
uint8_t cnt_bdr_th
Definition lsm6dso32_reg.h:298
lsm6dso32_ctrl10_c_t
Definition lsm6dso32_reg.h:528
lsm6dso32_ctrl10_c_t::not_used_02
uint8_t not_used_02
Definition lsm6dso32_reg.h:532
lsm6dso32_ctrl10_c_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:530
lsm6dso32_ctrl10_c_t::timestamp_en
uint8_t timestamp_en
Definition lsm6dso32_reg.h:531
lsm6dso32_ctrl1_xl_t
Definition lsm6dso32_reg.h:352
lsm6dso32_ctrl1_xl_t::odr_xl
uint8_t odr_xl
Definition lsm6dso32_reg.h:357
lsm6dso32_ctrl1_xl_t::fs_xl
uint8_t fs_xl
Definition lsm6dso32_reg.h:356
lsm6dso32_ctrl1_xl_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:354
lsm6dso32_ctrl1_xl_t::lpf2_xl_en
uint8_t lpf2_xl_en
Definition lsm6dso32_reg.h:355
lsm6dso32_ctrl2_g_t
Definition lsm6dso32_reg.h:368
lsm6dso32_ctrl2_g_t::fs_g
uint8_t fs_g
Definition lsm6dso32_reg.h:371
lsm6dso32_ctrl2_g_t::odr_g
uint8_t odr_g
Definition lsm6dso32_reg.h:372
lsm6dso32_ctrl2_g_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:370
lsm6dso32_ctrl3_c_t
Definition lsm6dso32_reg.h:382
lsm6dso32_ctrl3_c_t::boot
uint8_t boot
Definition lsm6dso32_reg.h:391
lsm6dso32_ctrl3_c_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:385
lsm6dso32_ctrl3_c_t::pp_od
uint8_t pp_od
Definition lsm6dso32_reg.h:388
lsm6dso32_ctrl3_c_t::sw_reset
uint8_t sw_reset
Definition lsm6dso32_reg.h:384
lsm6dso32_ctrl3_c_t::if_inc
uint8_t if_inc
Definition lsm6dso32_reg.h:386
lsm6dso32_ctrl3_c_t::h_lactive
uint8_t h_lactive
Definition lsm6dso32_reg.h:389
lsm6dso32_ctrl3_c_t::bdu
uint8_t bdu
Definition lsm6dso32_reg.h:390
lsm6dso32_ctrl3_c_t::sim
uint8_t sim
Definition lsm6dso32_reg.h:387
lsm6dso32_ctrl4_c_t
Definition lsm6dso32_reg.h:406
lsm6dso32_ctrl4_c_t::sleep_g
uint8_t sleep_g
Definition lsm6dso32_reg.h:414
lsm6dso32_ctrl4_c_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:408
lsm6dso32_ctrl4_c_t::drdy_mask
uint8_t drdy_mask
Definition lsm6dso32_reg.h:411
lsm6dso32_ctrl4_c_t::not_used_03
uint8_t not_used_03
Definition lsm6dso32_reg.h:415
lsm6dso32_ctrl4_c_t::not_used_02
uint8_t not_used_02
Definition lsm6dso32_reg.h:412
lsm6dso32_ctrl4_c_t::lpf1_sel_g
uint8_t lpf1_sel_g
Definition lsm6dso32_reg.h:409
lsm6dso32_ctrl4_c_t::int2_on_int1
uint8_t int2_on_int1
Definition lsm6dso32_reg.h:413
lsm6dso32_ctrl4_c_t::i2c_disable
uint8_t i2c_disable
Definition lsm6dso32_reg.h:410
lsm6dso32_ctrl5_c_t
Definition lsm6dso32_reg.h:430
lsm6dso32_ctrl5_c_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:434
lsm6dso32_ctrl5_c_t::st_g
uint8_t st_g
Definition lsm6dso32_reg.h:433
lsm6dso32_ctrl5_c_t::rounding
uint8_t rounding
Definition lsm6dso32_reg.h:435
lsm6dso32_ctrl5_c_t::xl_ulp_en
uint8_t xl_ulp_en
Definition lsm6dso32_reg.h:436
lsm6dso32_ctrl5_c_t::st_xl
uint8_t st_xl
Definition lsm6dso32_reg.h:432
lsm6dso32_ctrl6_c_t
Definition lsm6dso32_reg.h:448
lsm6dso32_ctrl6_c_t::ftype
uint8_t ftype
Definition lsm6dso32_reg.h:450
lsm6dso32_ctrl6_c_t::den_mode
uint8_t den_mode
Definition lsm6dso32_reg.h:454
lsm6dso32_ctrl6_c_t::usr_off_w
uint8_t usr_off_w
Definition lsm6dso32_reg.h:451
lsm6dso32_ctrl6_c_t::xl_hm_mode
uint8_t xl_hm_mode
Definition lsm6dso32_reg.h:452
lsm6dso32_ctrl7_g_t
Definition lsm6dso32_reg.h:466
lsm6dso32_ctrl7_g_t::g_hm_mode
uint8_t g_hm_mode
Definition lsm6dso32_reg.h:473
lsm6dso32_ctrl7_g_t::hpm_g
uint8_t hpm_g
Definition lsm6dso32_reg.h:471
lsm6dso32_ctrl7_g_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:468
lsm6dso32_ctrl7_g_t::usr_off_on_out
uint8_t usr_off_on_out
Definition lsm6dso32_reg.h:469
lsm6dso32_ctrl7_g_t::hp_en_g
uint8_t hp_en_g
Definition lsm6dso32_reg.h:472
lsm6dso32_ctrl7_g_t::not_used_02
uint8_t not_used_02
Definition lsm6dso32_reg.h:470
lsm6dso32_ctrl8_xl_t
Definition lsm6dso32_reg.h:486
lsm6dso32_ctrl8_xl_t::hp_slope_xl_en
uint8_t hp_slope_xl_en
Definition lsm6dso32_reg.h:490
lsm6dso32_ctrl8_xl_t::hpcf_xl
uint8_t hpcf_xl
Definition lsm6dso32_reg.h:493
lsm6dso32_ctrl8_xl_t::fastsettl_mode_xl
uint8_t fastsettl_mode_xl
Definition lsm6dso32_reg.h:491
lsm6dso32_ctrl8_xl_t::low_pass_on_6d
uint8_t low_pass_on_6d
Definition lsm6dso32_reg.h:488
lsm6dso32_ctrl8_xl_t::hp_ref_mode_xl
uint8_t hp_ref_mode_xl
Definition lsm6dso32_reg.h:492
lsm6dso32_ctrl8_xl_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:489
lsm6dso32_ctrl9_xl_t
Definition lsm6dso32_reg.h:506
lsm6dso32_ctrl9_xl_t::den_y
uint8_t den_y
Definition lsm6dso32_reg.h:513
lsm6dso32_ctrl9_xl_t::den_x
uint8_t den_x
Definition lsm6dso32_reg.h:514
lsm6dso32_ctrl9_xl_t::den_xl_g
uint8_t den_xl_g
Definition lsm6dso32_reg.h:511
lsm6dso32_ctrl9_xl_t::i3c_disable
uint8_t i3c_disable
Definition lsm6dso32_reg.h:509
lsm6dso32_ctrl9_xl_t::den_lh
uint8_t den_lh
Definition lsm6dso32_reg.h:510
lsm6dso32_ctrl9_xl_t::den_z
uint8_t den_z
Definition lsm6dso32_reg.h:512
lsm6dso32_ctrl9_xl_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:508
lsm6dso32_d6d_src_t
Definition lsm6dso32_reg.h:614
lsm6dso32_d6d_src_t::yh
uint8_t yh
Definition lsm6dso32_reg.h:619
lsm6dso32_d6d_src_t::zl
uint8_t zl
Definition lsm6dso32_reg.h:620
lsm6dso32_d6d_src_t::xh
uint8_t xh
Definition lsm6dso32_reg.h:617
lsm6dso32_d6d_src_t::den_drdy
uint8_t den_drdy
Definition lsm6dso32_reg.h:623
lsm6dso32_d6d_src_t::yl
uint8_t yl
Definition lsm6dso32_reg.h:618
lsm6dso32_d6d_src_t::xl
uint8_t xl
Definition lsm6dso32_reg.h:616
lsm6dso32_d6d_src_t::zh
uint8_t zh
Definition lsm6dso32_reg.h:621
lsm6dso32_d6d_src_t::d6d_ia
uint8_t d6d_ia
Definition lsm6dso32_reg.h:622
lsm6dso32_datawrite_src_mode_sub_slv0_t
Definition lsm6dso32_reg.h:2474
lsm6dso32_datawrite_src_mode_sub_slv0_t::slave0_dataw
uint8_t slave0_dataw
Definition lsm6dso32_reg.h:2475
lsm6dso32_emb_fsm_enable_t
Definition lsm6dso32_reg.h:3674
lsm6dso32_emb_fsm_enable_t::fsm_enable_a
lsm6dso32_fsm_enable_a_t fsm_enable_a
Definition lsm6dso32_reg.h:3675
lsm6dso32_emb_fsm_enable_t::fsm_enable_b
lsm6dso32_fsm_enable_b_t fsm_enable_b
Definition lsm6dso32_reg.h:3676
lsm6dso32_emb_func_en_a_t
Definition lsm6dso32_reg.h:1016
lsm6dso32_emb_func_en_a_t::sign_motion_en
uint8_t sign_motion_en
Definition lsm6dso32_reg.h:1021
lsm6dso32_emb_func_en_a_t::pedo_en
uint8_t pedo_en
Definition lsm6dso32_reg.h:1019
lsm6dso32_emb_func_en_a_t::tilt_en
uint8_t tilt_en
Definition lsm6dso32_reg.h:1020
lsm6dso32_emb_func_en_a_t::not_used_02
uint8_t not_used_02
Definition lsm6dso32_reg.h:1022
lsm6dso32_emb_func_en_a_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:1018
lsm6dso32_emb_func_en_b_t
Definition lsm6dso32_reg.h:1034
lsm6dso32_emb_func_en_b_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:1037
lsm6dso32_emb_func_en_b_t::pedo_adv_en
uint8_t pedo_adv_en
Definition lsm6dso32_reg.h:1039
lsm6dso32_emb_func_en_b_t::fifo_compr_en
uint8_t fifo_compr_en
Definition lsm6dso32_reg.h:1038
lsm6dso32_emb_func_en_b_t::fsm_en
uint8_t fsm_en
Definition lsm6dso32_reg.h:1036
lsm6dso32_emb_func_en_b_t::not_used_02
uint8_t not_used_02
Definition lsm6dso32_reg.h:1040
lsm6dso32_emb_func_fifo_cfg_t
Definition lsm6dso32_reg.h:1282
lsm6dso32_emb_func_fifo_cfg_t::pedo_fifo_en
uint8_t pedo_fifo_en
Definition lsm6dso32_reg.h:1285
lsm6dso32_emb_func_fifo_cfg_t::not_used_00
uint8_t not_used_00
Definition lsm6dso32_reg.h:1284
lsm6dso32_emb_func_fifo_cfg_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:1286
lsm6dso32_emb_func_init_a_t
Definition lsm6dso32_reg.h:1782
lsm6dso32_emb_func_init_a_t::sig_mot_init
uint8_t sig_mot_init
Definition lsm6dso32_reg.h:1787
lsm6dso32_emb_func_init_a_t::tilt_init
uint8_t tilt_init
Definition lsm6dso32_reg.h:1786
lsm6dso32_emb_func_init_a_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:1784
lsm6dso32_emb_func_init_a_t::step_det_init
uint8_t step_det_init
Definition lsm6dso32_reg.h:1785
lsm6dso32_emb_func_init_a_t::not_used_02
uint8_t not_used_02
Definition lsm6dso32_reg.h:1788
lsm6dso32_emb_func_init_b_t
Definition lsm6dso32_reg.h:1800
lsm6dso32_emb_func_init_b_t::not_used_02
uint8_t not_used_02
Definition lsm6dso32_reg.h:1805
lsm6dso32_emb_func_init_b_t::fsm_init
uint8_t fsm_init
Definition lsm6dso32_reg.h:1802
lsm6dso32_emb_func_init_b_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:1803
lsm6dso32_emb_func_init_b_t::fifo_compr_init
uint8_t fifo_compr_init
Definition lsm6dso32_reg.h:1804
lsm6dso32_emb_func_int1_t
Definition lsm6dso32_reg.h:1064
lsm6dso32_emb_func_int1_t::int1_sig_mot
uint8_t int1_sig_mot
Definition lsm6dso32_reg.h:1069
lsm6dso32_emb_func_int1_t::int1_tilt
uint8_t int1_tilt
Definition lsm6dso32_reg.h:1068
lsm6dso32_emb_func_int1_t::int1_fsm_lc
uint8_t int1_fsm_lc
Definition lsm6dso32_reg.h:1071
lsm6dso32_emb_func_int1_t::int1_step_detector
uint8_t int1_step_detector
Definition lsm6dso32_reg.h:1067
lsm6dso32_emb_func_int1_t::not_used_02
uint8_t not_used_02
Definition lsm6dso32_reg.h:1070
lsm6dso32_emb_func_int1_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:1066
lsm6dso32_emb_func_int2_t
Definition lsm6dso32_reg.h:1132
lsm6dso32_emb_func_int2_t::not_used_02
uint8_t not_used_02
Definition lsm6dso32_reg.h:1138
lsm6dso32_emb_func_int2_t::int2_step_detector
uint8_t int2_step_detector
Definition lsm6dso32_reg.h:1135
lsm6dso32_emb_func_int2_t::int2_sig_mot
uint8_t int2_sig_mot
Definition lsm6dso32_reg.h:1137
lsm6dso32_emb_func_int2_t::int2_fsm_lc
uint8_t int2_fsm_lc
Definition lsm6dso32_reg.h:1139
lsm6dso32_emb_func_int2_t::int2_tilt
uint8_t int2_tilt
Definition lsm6dso32_reg.h:1136
lsm6dso32_emb_func_int2_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:1134
lsm6dso32_emb_func_odr_cfg_b_t
Definition lsm6dso32_reg.h:1744
lsm6dso32_emb_func_odr_cfg_b_t::fsm_odr
uint8_t fsm_odr
Definition lsm6dso32_reg.h:1747
lsm6dso32_emb_func_odr_cfg_b_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:1746
lsm6dso32_emb_func_odr_cfg_b_t::not_used_02
uint8_t not_used_02
Definition lsm6dso32_reg.h:1748
lsm6dso32_emb_func_src_t
Definition lsm6dso32_reg.h:1760
lsm6dso32_emb_func_src_t::step_count_delta_ia
uint8_t step_count_delta_ia
Definition lsm6dso32_reg.h:1765
lsm6dso32_emb_func_src_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:1762
lsm6dso32_emb_func_src_t::not_used_02
uint8_t not_used_02
Definition lsm6dso32_reg.h:1767
lsm6dso32_emb_func_src_t::stepcounter_bit_set
uint8_t stepcounter_bit_set
Definition lsm6dso32_reg.h:1763
lsm6dso32_emb_func_src_t::step_detected
uint8_t step_detected
Definition lsm6dso32_reg.h:1766
lsm6dso32_emb_func_src_t::step_overflow
uint8_t step_overflow
Definition lsm6dso32_reg.h:1764
lsm6dso32_emb_func_src_t::pedo_rst_step
uint8_t pedo_rst_step
Definition lsm6dso32_reg.h:1768
lsm6dso32_emb_func_status_mainpage_t
Definition lsm6dso32_reg.h:668
lsm6dso32_emb_func_status_mainpage_t::is_tilt
uint8_t is_tilt
Definition lsm6dso32_reg.h:672
lsm6dso32_emb_func_status_mainpage_t::is_fsm_lc
uint8_t is_fsm_lc
Definition lsm6dso32_reg.h:675
lsm6dso32_emb_func_status_mainpage_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:670
lsm6dso32_emb_func_status_mainpage_t::is_sigmot
uint8_t is_sigmot
Definition lsm6dso32_reg.h:673
lsm6dso32_emb_func_status_mainpage_t::is_step_det
uint8_t is_step_det
Definition lsm6dso32_reg.h:671
lsm6dso32_emb_func_status_mainpage_t::not_used_02
uint8_t not_used_02
Definition lsm6dso32_reg.h:674
lsm6dso32_emb_func_status_t
Definition lsm6dso32_reg.h:1200
lsm6dso32_emb_func_status_t::is_fsm_lc
uint8_t is_fsm_lc
Definition lsm6dso32_reg.h:1207
lsm6dso32_emb_func_status_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:1202
lsm6dso32_emb_func_status_t::is_sigmot
uint8_t is_sigmot
Definition lsm6dso32_reg.h:1205
lsm6dso32_emb_func_status_t::is_step_det
uint8_t is_step_det
Definition lsm6dso32_reg.h:1203
lsm6dso32_emb_func_status_t::not_used_02
uint8_t not_used_02
Definition lsm6dso32_reg.h:1206
lsm6dso32_emb_func_status_t::is_tilt
uint8_t is_tilt
Definition lsm6dso32_reg.h:1204
lsm6dso32_emb_sh_read_t
Definition lsm6dso32_reg.h:3752
lsm6dso32_emb_sh_read_t::sh_byte_9
lsm6dso32_sensor_hub_9_t sh_byte_9
Definition lsm6dso32_reg.h:3761
lsm6dso32_emb_sh_read_t::sh_byte_16
lsm6dso32_sensor_hub_16_t sh_byte_16
Definition lsm6dso32_reg.h:3768
lsm6dso32_emb_sh_read_t::sh_byte_18
lsm6dso32_sensor_hub_18_t sh_byte_18
Definition lsm6dso32_reg.h:3770
lsm6dso32_emb_sh_read_t::sh_byte_8
lsm6dso32_sensor_hub_8_t sh_byte_8
Definition lsm6dso32_reg.h:3760
lsm6dso32_emb_sh_read_t::sh_byte_14
lsm6dso32_sensor_hub_14_t sh_byte_14
Definition lsm6dso32_reg.h:3766
lsm6dso32_emb_sh_read_t::sh_byte_1
lsm6dso32_sensor_hub_1_t sh_byte_1
Definition lsm6dso32_reg.h:3753
lsm6dso32_emb_sh_read_t::sh_byte_10
lsm6dso32_sensor_hub_10_t sh_byte_10
Definition lsm6dso32_reg.h:3762
lsm6dso32_emb_sh_read_t::sh_byte_13
lsm6dso32_sensor_hub_13_t sh_byte_13
Definition lsm6dso32_reg.h:3765
lsm6dso32_emb_sh_read_t::sh_byte_17
lsm6dso32_sensor_hub_17_t sh_byte_17
Definition lsm6dso32_reg.h:3769
lsm6dso32_emb_sh_read_t::sh_byte_15
lsm6dso32_sensor_hub_15_t sh_byte_15
Definition lsm6dso32_reg.h:3767
lsm6dso32_emb_sh_read_t::sh_byte_3
lsm6dso32_sensor_hub_3_t sh_byte_3
Definition lsm6dso32_reg.h:3755
lsm6dso32_emb_sh_read_t::sh_byte_11
lsm6dso32_sensor_hub_11_t sh_byte_11
Definition lsm6dso32_reg.h:3763
lsm6dso32_emb_sh_read_t::sh_byte_2
lsm6dso32_sensor_hub_2_t sh_byte_2
Definition lsm6dso32_reg.h:3754
lsm6dso32_emb_sh_read_t::sh_byte_4
lsm6dso32_sensor_hub_4_t sh_byte_4
Definition lsm6dso32_reg.h:3756
lsm6dso32_emb_sh_read_t::sh_byte_5
lsm6dso32_sensor_hub_5_t sh_byte_5
Definition lsm6dso32_reg.h:3757
lsm6dso32_emb_sh_read_t::sh_byte_6
lsm6dso32_sensor_hub_6_t sh_byte_6
Definition lsm6dso32_reg.h:3758
lsm6dso32_emb_sh_read_t::sh_byte_12
lsm6dso32_sensor_hub_12_t sh_byte_12
Definition lsm6dso32_reg.h:3764
lsm6dso32_emb_sh_read_t::sh_byte_7
lsm6dso32_sensor_hub_7_t sh_byte_7
Definition lsm6dso32_reg.h:3759
lsm6dso32_fifo_ctrl1_t
Definition lsm6dso32_reg.h:223
lsm6dso32_fifo_ctrl1_t::wtm
uint8_t wtm
Definition lsm6dso32_reg.h:224
lsm6dso32_fifo_ctrl2_t
Definition lsm6dso32_reg.h:229
lsm6dso32_fifo_ctrl2_t::uncoptr_rate
uint8_t uncoptr_rate
Definition lsm6dso32_reg.h:232
lsm6dso32_fifo_ctrl2_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:233
lsm6dso32_fifo_ctrl2_t::not_used_02
uint8_t not_used_02
Definition lsm6dso32_reg.h:235
lsm6dso32_fifo_ctrl2_t::odrchg_en
uint8_t odrchg_en
Definition lsm6dso32_reg.h:234
lsm6dso32_fifo_ctrl2_t::fifo_compr_rt_en
uint8_t fifo_compr_rt_en
Definition lsm6dso32_reg.h:236
lsm6dso32_fifo_ctrl2_t::wtm
uint8_t wtm
Definition lsm6dso32_reg.h:231
lsm6dso32_fifo_ctrl2_t::stop_on_wtm
uint8_t stop_on_wtm
Definition lsm6dso32_reg.h:237
lsm6dso32_fifo_ctrl3_t
Definition lsm6dso32_reg.h:251
lsm6dso32_fifo_ctrl3_t::bdr_xl
uint8_t bdr_xl
Definition lsm6dso32_reg.h:253
lsm6dso32_fifo_ctrl3_t::bdr_gy
uint8_t bdr_gy
Definition lsm6dso32_reg.h:254
lsm6dso32_fifo_ctrl4_t
Definition lsm6dso32_reg.h:263
lsm6dso32_fifo_ctrl4_t::odr_t_batch
uint8_t odr_t_batch
Definition lsm6dso32_reg.h:267
lsm6dso32_fifo_ctrl4_t::odr_ts_batch
uint8_t odr_ts_batch
Definition lsm6dso32_reg.h:268
lsm6dso32_fifo_ctrl4_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:266
lsm6dso32_fifo_ctrl4_t::fifo_mode
uint8_t fifo_mode
Definition lsm6dso32_reg.h:265
lsm6dso32_fifo_data_out_tag_t
Definition lsm6dso32_reg.h:984
lsm6dso32_fifo_data_out_tag_t::tag_sensor
uint8_t tag_sensor
Definition lsm6dso32_reg.h:988
lsm6dso32_fifo_data_out_tag_t::tag_parity
uint8_t tag_parity
Definition lsm6dso32_reg.h:986
lsm6dso32_fifo_data_out_tag_t::tag_cnt
uint8_t tag_cnt
Definition lsm6dso32_reg.h:987
lsm6dso32_fifo_status1_t
Definition lsm6dso32_reg.h:758
lsm6dso32_fifo_status1_t::diff_fifo
uint8_t diff_fifo
Definition lsm6dso32_reg.h:759
lsm6dso32_fifo_status2_t
Definition lsm6dso32_reg.h:764
lsm6dso32_fifo_status2_t::over_run_latched
uint8_t over_run_latched
Definition lsm6dso32_reg.h:768
lsm6dso32_fifo_status2_t::counter_bdr_ia
uint8_t counter_bdr_ia
Definition lsm6dso32_reg.h:769
lsm6dso32_fifo_status2_t::fifo_wtm_ia
uint8_t fifo_wtm_ia
Definition lsm6dso32_reg.h:772
lsm6dso32_fifo_status2_t::fifo_ovr_ia
uint8_t fifo_ovr_ia
Definition lsm6dso32_reg.h:771
lsm6dso32_fifo_status2_t::fifo_full_ia
uint8_t fifo_full_ia
Definition lsm6dso32_reg.h:770
lsm6dso32_fifo_status2_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:767
lsm6dso32_fifo_status2_t::diff_fifo
uint8_t diff_fifo
Definition lsm6dso32_reg.h:766
lsm6dso32_free_fall_t
Definition lsm6dso32_reg.h:899
lsm6dso32_free_fall_t::ff_ths
uint8_t ff_ths
Definition lsm6dso32_reg.h:901
lsm6dso32_free_fall_t::ff_dur
uint8_t ff_dur
Definition lsm6dso32_reg.h:902
lsm6dso32_fsm_enable_a_t
Definition lsm6dso32_reg.h:1296
lsm6dso32_fsm_enable_a_t::fsm6_en
uint8_t fsm6_en
Definition lsm6dso32_reg.h:1303
lsm6dso32_fsm_enable_a_t::fsm5_en
uint8_t fsm5_en
Definition lsm6dso32_reg.h:1302
lsm6dso32_fsm_enable_a_t::fsm1_en
uint8_t fsm1_en
Definition lsm6dso32_reg.h:1298
lsm6dso32_fsm_enable_a_t::fsm4_en
uint8_t fsm4_en
Definition lsm6dso32_reg.h:1301
lsm6dso32_fsm_enable_a_t::fsm7_en
uint8_t fsm7_en
Definition lsm6dso32_reg.h:1304
lsm6dso32_fsm_enable_a_t::fsm2_en
uint8_t fsm2_en
Definition lsm6dso32_reg.h:1299
lsm6dso32_fsm_enable_a_t::fsm8_en
uint8_t fsm8_en
Definition lsm6dso32_reg.h:1305
lsm6dso32_fsm_enable_a_t::fsm3_en
uint8_t fsm3_en
Definition lsm6dso32_reg.h:1300
lsm6dso32_fsm_enable_b_t
Definition lsm6dso32_reg.h:1320
lsm6dso32_fsm_enable_b_t::fsm15_en
uint8_t fsm15_en
Definition lsm6dso32_reg.h:1328
lsm6dso32_fsm_enable_b_t::fsm13_en
uint8_t fsm13_en
Definition lsm6dso32_reg.h:1326
lsm6dso32_fsm_enable_b_t::fsm11_en
uint8_t fsm11_en
Definition lsm6dso32_reg.h:1324
lsm6dso32_fsm_enable_b_t::fsm12_en
uint8_t fsm12_en
Definition lsm6dso32_reg.h:1325
lsm6dso32_fsm_enable_b_t::fsm9_en
uint8_t fsm9_en
Definition lsm6dso32_reg.h:1322
lsm6dso32_fsm_enable_b_t::fsm16_en
uint8_t fsm16_en
Definition lsm6dso32_reg.h:1329
lsm6dso32_fsm_enable_b_t::fsm14_en
uint8_t fsm14_en
Definition lsm6dso32_reg.h:1327
lsm6dso32_fsm_enable_b_t::fsm10_en
uint8_t fsm10_en
Definition lsm6dso32_reg.h:1323
lsm6dso32_fsm_int1_a_t
Definition lsm6dso32_reg.h:1084
lsm6dso32_fsm_int1_a_t::int1_fsm8
uint8_t int1_fsm8
Definition lsm6dso32_reg.h:1093
lsm6dso32_fsm_int1_a_t::int1_fsm3
uint8_t int1_fsm3
Definition lsm6dso32_reg.h:1088
lsm6dso32_fsm_int1_a_t::int1_fsm5
uint8_t int1_fsm5
Definition lsm6dso32_reg.h:1090
lsm6dso32_fsm_int1_a_t::int1_fsm7
uint8_t int1_fsm7
Definition lsm6dso32_reg.h:1092
lsm6dso32_fsm_int1_a_t::int1_fsm6
uint8_t int1_fsm6
Definition lsm6dso32_reg.h:1091
lsm6dso32_fsm_int1_a_t::int1_fsm2
uint8_t int1_fsm2
Definition lsm6dso32_reg.h:1087
lsm6dso32_fsm_int1_a_t::int1_fsm4
uint8_t int1_fsm4
Definition lsm6dso32_reg.h:1089
lsm6dso32_fsm_int1_a_t::int1_fsm1
uint8_t int1_fsm1
Definition lsm6dso32_reg.h:1086
lsm6dso32_fsm_int1_b_t
Definition lsm6dso32_reg.h:1108
lsm6dso32_fsm_int1_b_t::int1_fsm15
uint8_t int1_fsm15
Definition lsm6dso32_reg.h:1116
lsm6dso32_fsm_int1_b_t::int1_fsm9
uint8_t int1_fsm9
Definition lsm6dso32_reg.h:1110
lsm6dso32_fsm_int1_b_t::int1_fsm13
uint8_t int1_fsm13
Definition lsm6dso32_reg.h:1114
lsm6dso32_fsm_int1_b_t::int1_fsm10
uint8_t int1_fsm10
Definition lsm6dso32_reg.h:1111
lsm6dso32_fsm_int1_b_t::int1_fsm14
uint8_t int1_fsm14
Definition lsm6dso32_reg.h:1115
lsm6dso32_fsm_int1_b_t::int1_fsm11
uint8_t int1_fsm11
Definition lsm6dso32_reg.h:1112
lsm6dso32_fsm_int1_b_t::int1_fsm12
uint8_t int1_fsm12
Definition lsm6dso32_reg.h:1113
lsm6dso32_fsm_int1_b_t::int1_fsm16
uint8_t int1_fsm16
Definition lsm6dso32_reg.h:1117
lsm6dso32_fsm_int2_a_t
Definition lsm6dso32_reg.h:1152
lsm6dso32_fsm_int2_a_t::int2_fsm4
uint8_t int2_fsm4
Definition lsm6dso32_reg.h:1157
lsm6dso32_fsm_int2_a_t::int2_fsm1
uint8_t int2_fsm1
Definition lsm6dso32_reg.h:1154
lsm6dso32_fsm_int2_a_t::int2_fsm3
uint8_t int2_fsm3
Definition lsm6dso32_reg.h:1156
lsm6dso32_fsm_int2_a_t::int2_fsm6
uint8_t int2_fsm6
Definition lsm6dso32_reg.h:1159
lsm6dso32_fsm_int2_a_t::int2_fsm5
uint8_t int2_fsm5
Definition lsm6dso32_reg.h:1158
lsm6dso32_fsm_int2_a_t::int2_fsm8
uint8_t int2_fsm8
Definition lsm6dso32_reg.h:1161
lsm6dso32_fsm_int2_a_t::int2_fsm2
uint8_t int2_fsm2
Definition lsm6dso32_reg.h:1155
lsm6dso32_fsm_int2_a_t::int2_fsm7
uint8_t int2_fsm7
Definition lsm6dso32_reg.h:1160
lsm6dso32_fsm_int2_b_t
Definition lsm6dso32_reg.h:1176
lsm6dso32_fsm_int2_b_t::int2_fsm10
uint8_t int2_fsm10
Definition lsm6dso32_reg.h:1179
lsm6dso32_fsm_int2_b_t::int2_fsm14
uint8_t int2_fsm14
Definition lsm6dso32_reg.h:1183
lsm6dso32_fsm_int2_b_t::int2_fsm16
uint8_t int2_fsm16
Definition lsm6dso32_reg.h:1185
lsm6dso32_fsm_int2_b_t::int2_fsm12
uint8_t int2_fsm12
Definition lsm6dso32_reg.h:1181
lsm6dso32_fsm_int2_b_t::int2_fsm9
uint8_t int2_fsm9
Definition lsm6dso32_reg.h:1178
lsm6dso32_fsm_int2_b_t::int2_fsm13
uint8_t int2_fsm13
Definition lsm6dso32_reg.h:1182
lsm6dso32_fsm_int2_b_t::int2_fsm11
uint8_t int2_fsm11
Definition lsm6dso32_reg.h:1180
lsm6dso32_fsm_int2_b_t::int2_fsm15
uint8_t int2_fsm15
Definition lsm6dso32_reg.h:1184
lsm6dso32_fsm_long_counter_clear_t
Definition lsm6dso32_reg.h:1346
lsm6dso32_fsm_long_counter_clear_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:1350
lsm6dso32_fsm_long_counter_clear_t::fsm_lc_clr
uint8_t fsm_lc_clr
Definition lsm6dso32_reg.h:1349
lsm6dso32_fsm_out_t
Definition lsm6dso32_reg.h:3698
lsm6dso32_fsm_out_t::fsm_outs7
lsm6dso32_fsm_outs7_t fsm_outs7
Definition lsm6dso32_reg.h:3705
lsm6dso32_fsm_out_t::fsm_outs15
lsm6dso32_fsm_outs7_t fsm_outs15
Definition lsm6dso32_reg.h:3713
lsm6dso32_fsm_out_t::fsm_outs9
lsm6dso32_fsm_outs1_t fsm_outs9
Definition lsm6dso32_reg.h:3707
lsm6dso32_fsm_out_t::fsm_outs4
lsm6dso32_fsm_outs4_t fsm_outs4
Definition lsm6dso32_reg.h:3702
lsm6dso32_fsm_out_t::fsm_outs5
lsm6dso32_fsm_outs5_t fsm_outs5
Definition lsm6dso32_reg.h:3703
lsm6dso32_fsm_out_t::fsm_outs3
lsm6dso32_fsm_outs3_t fsm_outs3
Definition lsm6dso32_reg.h:3701
lsm6dso32_fsm_out_t::fsm_outs14
lsm6dso32_fsm_outs6_t fsm_outs14
Definition lsm6dso32_reg.h:3712
lsm6dso32_fsm_out_t::fsm_outs13
lsm6dso32_fsm_outs5_t fsm_outs13
Definition lsm6dso32_reg.h:3711
lsm6dso32_fsm_out_t::fsm_outs11
lsm6dso32_fsm_outs3_t fsm_outs11
Definition lsm6dso32_reg.h:3709
lsm6dso32_fsm_out_t::fsm_outs2
lsm6dso32_fsm_outs2_t fsm_outs2
Definition lsm6dso32_reg.h:3700
lsm6dso32_fsm_out_t::fsm_outs8
lsm6dso32_fsm_outs8_t fsm_outs8
Definition lsm6dso32_reg.h:3706
lsm6dso32_fsm_out_t::fsm_outs10
lsm6dso32_fsm_outs2_t fsm_outs10
Definition lsm6dso32_reg.h:3708
lsm6dso32_fsm_out_t::fsm_outs6
lsm6dso32_fsm_outs6_t fsm_outs6
Definition lsm6dso32_reg.h:3704
lsm6dso32_fsm_out_t::fsm_outs16
lsm6dso32_fsm_outs8_t fsm_outs16
Definition lsm6dso32_reg.h:3714
lsm6dso32_fsm_out_t::fsm_outs12
lsm6dso32_fsm_outs4_t fsm_outs12
Definition lsm6dso32_reg.h:3710
lsm6dso32_fsm_out_t::fsm_outs1
lsm6dso32_fsm_outs1_t fsm_outs1
Definition lsm6dso32_reg.h:3699
lsm6dso32_fsm_outs10_t
Definition lsm6dso32_reg.h:1576
lsm6dso32_fsm_outs10_t::p_z
uint8_t p_z
Definition lsm6dso32_reg.h:1581
lsm6dso32_fsm_outs10_t::p_x
uint8_t p_x
Definition lsm6dso32_reg.h:1585
lsm6dso32_fsm_outs10_t::p_y
uint8_t p_y
Definition lsm6dso32_reg.h:1583
lsm6dso32_fsm_outs10_t::n_v
uint8_t n_v
Definition lsm6dso32_reg.h:1578
lsm6dso32_fsm_outs10_t::n_x
uint8_t n_x
Definition lsm6dso32_reg.h:1584
lsm6dso32_fsm_outs10_t::n_y
uint8_t n_y
Definition lsm6dso32_reg.h:1582
lsm6dso32_fsm_outs10_t::p_v
uint8_t p_v
Definition lsm6dso32_reg.h:1579
lsm6dso32_fsm_outs10_t::n_z
uint8_t n_z
Definition lsm6dso32_reg.h:1580
lsm6dso32_fsm_outs11_t
Definition lsm6dso32_reg.h:1600
lsm6dso32_fsm_outs11_t::n_y
uint8_t n_y
Definition lsm6dso32_reg.h:1606
lsm6dso32_fsm_outs11_t::n_v
uint8_t n_v
Definition lsm6dso32_reg.h:1602
lsm6dso32_fsm_outs11_t::p_y
uint8_t p_y
Definition lsm6dso32_reg.h:1607
lsm6dso32_fsm_outs11_t::p_z
uint8_t p_z
Definition lsm6dso32_reg.h:1605
lsm6dso32_fsm_outs11_t::n_x
uint8_t n_x
Definition lsm6dso32_reg.h:1608
lsm6dso32_fsm_outs11_t::p_v
uint8_t p_v
Definition lsm6dso32_reg.h:1603
lsm6dso32_fsm_outs11_t::p_x
uint8_t p_x
Definition lsm6dso32_reg.h:1609
lsm6dso32_fsm_outs11_t::n_z
uint8_t n_z
Definition lsm6dso32_reg.h:1604
lsm6dso32_fsm_outs12_t
Definition lsm6dso32_reg.h:1624
lsm6dso32_fsm_outs12_t::p_y
uint8_t p_y
Definition lsm6dso32_reg.h:1631
lsm6dso32_fsm_outs12_t::p_v
uint8_t p_v
Definition lsm6dso32_reg.h:1627
lsm6dso32_fsm_outs12_t::p_x
uint8_t p_x
Definition lsm6dso32_reg.h:1633
lsm6dso32_fsm_outs12_t::n_v
uint8_t n_v
Definition lsm6dso32_reg.h:1626
lsm6dso32_fsm_outs12_t::n_z
uint8_t n_z
Definition lsm6dso32_reg.h:1628
lsm6dso32_fsm_outs12_t::p_z
uint8_t p_z
Definition lsm6dso32_reg.h:1629
lsm6dso32_fsm_outs12_t::n_y
uint8_t n_y
Definition lsm6dso32_reg.h:1630
lsm6dso32_fsm_outs12_t::n_x
uint8_t n_x
Definition lsm6dso32_reg.h:1632
lsm6dso32_fsm_outs13_t
Definition lsm6dso32_reg.h:1648
lsm6dso32_fsm_outs13_t::p_v
uint8_t p_v
Definition lsm6dso32_reg.h:1651
lsm6dso32_fsm_outs13_t::n_v
uint8_t n_v
Definition lsm6dso32_reg.h:1650
lsm6dso32_fsm_outs13_t::p_x
uint8_t p_x
Definition lsm6dso32_reg.h:1657
lsm6dso32_fsm_outs13_t::p_z
uint8_t p_z
Definition lsm6dso32_reg.h:1653
lsm6dso32_fsm_outs13_t::p_y
uint8_t p_y
Definition lsm6dso32_reg.h:1655
lsm6dso32_fsm_outs13_t::n_z
uint8_t n_z
Definition lsm6dso32_reg.h:1652
lsm6dso32_fsm_outs13_t::n_y
uint8_t n_y
Definition lsm6dso32_reg.h:1654
lsm6dso32_fsm_outs13_t::n_x
uint8_t n_x
Definition lsm6dso32_reg.h:1656
lsm6dso32_fsm_outs14_t
Definition lsm6dso32_reg.h:1672
lsm6dso32_fsm_outs14_t::p_v
uint8_t p_v
Definition lsm6dso32_reg.h:1675
lsm6dso32_fsm_outs14_t::p_z
uint8_t p_z
Definition lsm6dso32_reg.h:1677
lsm6dso32_fsm_outs14_t::n_z
uint8_t n_z
Definition lsm6dso32_reg.h:1676
lsm6dso32_fsm_outs14_t::n_v
uint8_t n_v
Definition lsm6dso32_reg.h:1674
lsm6dso32_fsm_outs14_t::p_y
uint8_t p_y
Definition lsm6dso32_reg.h:1679
lsm6dso32_fsm_outs14_t::n_y
uint8_t n_y
Definition lsm6dso32_reg.h:1678
lsm6dso32_fsm_outs14_t::p_x
uint8_t p_x
Definition lsm6dso32_reg.h:1681
lsm6dso32_fsm_outs14_t::n_x
uint8_t n_x
Definition lsm6dso32_reg.h:1680
lsm6dso32_fsm_outs15_t
Definition lsm6dso32_reg.h:1696
lsm6dso32_fsm_outs15_t::n_y
uint8_t n_y
Definition lsm6dso32_reg.h:1702
lsm6dso32_fsm_outs15_t::p_x
uint8_t p_x
Definition lsm6dso32_reg.h:1705
lsm6dso32_fsm_outs15_t::n_z
uint8_t n_z
Definition lsm6dso32_reg.h:1700
lsm6dso32_fsm_outs15_t::n_v
uint8_t n_v
Definition lsm6dso32_reg.h:1698
lsm6dso32_fsm_outs15_t::n_x
uint8_t n_x
Definition lsm6dso32_reg.h:1704
lsm6dso32_fsm_outs15_t::p_z
uint8_t p_z
Definition lsm6dso32_reg.h:1701
lsm6dso32_fsm_outs15_t::p_y
uint8_t p_y
Definition lsm6dso32_reg.h:1703
lsm6dso32_fsm_outs15_t::p_v
uint8_t p_v
Definition lsm6dso32_reg.h:1699
lsm6dso32_fsm_outs16_t
Definition lsm6dso32_reg.h:1720
lsm6dso32_fsm_outs16_t::n_z
uint8_t n_z
Definition lsm6dso32_reg.h:1724
lsm6dso32_fsm_outs16_t::p_z
uint8_t p_z
Definition lsm6dso32_reg.h:1725
lsm6dso32_fsm_outs16_t::p_v
uint8_t p_v
Definition lsm6dso32_reg.h:1723
lsm6dso32_fsm_outs16_t::n_y
uint8_t n_y
Definition lsm6dso32_reg.h:1726
lsm6dso32_fsm_outs16_t::p_y
uint8_t p_y
Definition lsm6dso32_reg.h:1727
lsm6dso32_fsm_outs16_t::p_x
uint8_t p_x
Definition lsm6dso32_reg.h:1729
lsm6dso32_fsm_outs16_t::n_v
uint8_t n_v
Definition lsm6dso32_reg.h:1722
lsm6dso32_fsm_outs16_t::n_x
uint8_t n_x
Definition lsm6dso32_reg.h:1728
lsm6dso32_fsm_outs1_t
Definition lsm6dso32_reg.h:1360
lsm6dso32_fsm_outs1_t::p_y
uint8_t p_y
Definition lsm6dso32_reg.h:1367
lsm6dso32_fsm_outs1_t::p_z
uint8_t p_z
Definition lsm6dso32_reg.h:1365
lsm6dso32_fsm_outs1_t::p_x
uint8_t p_x
Definition lsm6dso32_reg.h:1369
lsm6dso32_fsm_outs1_t::n_v
uint8_t n_v
Definition lsm6dso32_reg.h:1362
lsm6dso32_fsm_outs1_t::n_y
uint8_t n_y
Definition lsm6dso32_reg.h:1366
lsm6dso32_fsm_outs1_t::n_x
uint8_t n_x
Definition lsm6dso32_reg.h:1368
lsm6dso32_fsm_outs1_t::n_z
uint8_t n_z
Definition lsm6dso32_reg.h:1364
lsm6dso32_fsm_outs1_t::p_v
uint8_t p_v
Definition lsm6dso32_reg.h:1363
lsm6dso32_fsm_outs2_t
Definition lsm6dso32_reg.h:1384
lsm6dso32_fsm_outs2_t::n_y
uint8_t n_y
Definition lsm6dso32_reg.h:1390
lsm6dso32_fsm_outs2_t::p_v
uint8_t p_v
Definition lsm6dso32_reg.h:1387
lsm6dso32_fsm_outs2_t::p_x
uint8_t p_x
Definition lsm6dso32_reg.h:1393
lsm6dso32_fsm_outs2_t::p_y
uint8_t p_y
Definition lsm6dso32_reg.h:1391
lsm6dso32_fsm_outs2_t::n_v
uint8_t n_v
Definition lsm6dso32_reg.h:1386
lsm6dso32_fsm_outs2_t::n_z
uint8_t n_z
Definition lsm6dso32_reg.h:1388
lsm6dso32_fsm_outs2_t::p_z
uint8_t p_z
Definition lsm6dso32_reg.h:1389
lsm6dso32_fsm_outs2_t::n_x
uint8_t n_x
Definition lsm6dso32_reg.h:1392
lsm6dso32_fsm_outs3_t
Definition lsm6dso32_reg.h:1408
lsm6dso32_fsm_outs3_t::n_x
uint8_t n_x
Definition lsm6dso32_reg.h:1416
lsm6dso32_fsm_outs3_t::p_x
uint8_t p_x
Definition lsm6dso32_reg.h:1417
lsm6dso32_fsm_outs3_t::n_z
uint8_t n_z
Definition lsm6dso32_reg.h:1412
lsm6dso32_fsm_outs3_t::n_v
uint8_t n_v
Definition lsm6dso32_reg.h:1410
lsm6dso32_fsm_outs3_t::p_v
uint8_t p_v
Definition lsm6dso32_reg.h:1411
lsm6dso32_fsm_outs3_t::p_z
uint8_t p_z
Definition lsm6dso32_reg.h:1413
lsm6dso32_fsm_outs3_t::p_y
uint8_t p_y
Definition lsm6dso32_reg.h:1415
lsm6dso32_fsm_outs3_t::n_y
uint8_t n_y
Definition lsm6dso32_reg.h:1414
lsm6dso32_fsm_outs4_t
Definition lsm6dso32_reg.h:1432
lsm6dso32_fsm_outs4_t::p_x
uint8_t p_x
Definition lsm6dso32_reg.h:1441
lsm6dso32_fsm_outs4_t::n_v
uint8_t n_v
Definition lsm6dso32_reg.h:1434
lsm6dso32_fsm_outs4_t::n_z
uint8_t n_z
Definition lsm6dso32_reg.h:1436
lsm6dso32_fsm_outs4_t::p_v
uint8_t p_v
Definition lsm6dso32_reg.h:1435
lsm6dso32_fsm_outs4_t::n_x
uint8_t n_x
Definition lsm6dso32_reg.h:1440
lsm6dso32_fsm_outs4_t::n_y
uint8_t n_y
Definition lsm6dso32_reg.h:1438
lsm6dso32_fsm_outs4_t::p_z
uint8_t p_z
Definition lsm6dso32_reg.h:1437
lsm6dso32_fsm_outs4_t::p_y
uint8_t p_y
Definition lsm6dso32_reg.h:1439
lsm6dso32_fsm_outs5_t
Definition lsm6dso32_reg.h:1456
lsm6dso32_fsm_outs5_t::p_v
uint8_t p_v
Definition lsm6dso32_reg.h:1459
lsm6dso32_fsm_outs5_t::p_z
uint8_t p_z
Definition lsm6dso32_reg.h:1461
lsm6dso32_fsm_outs5_t::p_y
uint8_t p_y
Definition lsm6dso32_reg.h:1463
lsm6dso32_fsm_outs5_t::n_v
uint8_t n_v
Definition lsm6dso32_reg.h:1458
lsm6dso32_fsm_outs5_t::n_x
uint8_t n_x
Definition lsm6dso32_reg.h:1464
lsm6dso32_fsm_outs5_t::n_z
uint8_t n_z
Definition lsm6dso32_reg.h:1460
lsm6dso32_fsm_outs5_t::n_y
uint8_t n_y
Definition lsm6dso32_reg.h:1462
lsm6dso32_fsm_outs5_t::p_x
uint8_t p_x
Definition lsm6dso32_reg.h:1465
lsm6dso32_fsm_outs6_t
Definition lsm6dso32_reg.h:1480
lsm6dso32_fsm_outs6_t::n_y
uint8_t n_y
Definition lsm6dso32_reg.h:1486
lsm6dso32_fsm_outs6_t::n_v
uint8_t n_v
Definition lsm6dso32_reg.h:1482
lsm6dso32_fsm_outs6_t::n_x
uint8_t n_x
Definition lsm6dso32_reg.h:1488
lsm6dso32_fsm_outs6_t::p_y
uint8_t p_y
Definition lsm6dso32_reg.h:1487
lsm6dso32_fsm_outs6_t::p_z
uint8_t p_z
Definition lsm6dso32_reg.h:1485
lsm6dso32_fsm_outs6_t::n_z
uint8_t n_z
Definition lsm6dso32_reg.h:1484
lsm6dso32_fsm_outs6_t::p_v
uint8_t p_v
Definition lsm6dso32_reg.h:1483
lsm6dso32_fsm_outs6_t::p_x
uint8_t p_x
Definition lsm6dso32_reg.h:1489
lsm6dso32_fsm_outs7_t
Definition lsm6dso32_reg.h:1504
lsm6dso32_fsm_outs7_t::n_v
uint8_t n_v
Definition lsm6dso32_reg.h:1506
lsm6dso32_fsm_outs7_t::n_x
uint8_t n_x
Definition lsm6dso32_reg.h:1512
lsm6dso32_fsm_outs7_t::p_y
uint8_t p_y
Definition lsm6dso32_reg.h:1511
lsm6dso32_fsm_outs7_t::n_y
uint8_t n_y
Definition lsm6dso32_reg.h:1510
lsm6dso32_fsm_outs7_t::p_x
uint8_t p_x
Definition lsm6dso32_reg.h:1513
lsm6dso32_fsm_outs7_t::p_v
uint8_t p_v
Definition lsm6dso32_reg.h:1507
lsm6dso32_fsm_outs7_t::n_z
uint8_t n_z
Definition lsm6dso32_reg.h:1508
lsm6dso32_fsm_outs7_t::p_z
uint8_t p_z
Definition lsm6dso32_reg.h:1509
lsm6dso32_fsm_outs8_t
Definition lsm6dso32_reg.h:1528
lsm6dso32_fsm_outs8_t::n_z
uint8_t n_z
Definition lsm6dso32_reg.h:1532
lsm6dso32_fsm_outs8_t::p_v
uint8_t p_v
Definition lsm6dso32_reg.h:1531
lsm6dso32_fsm_outs8_t::p_y
uint8_t p_y
Definition lsm6dso32_reg.h:1535
lsm6dso32_fsm_outs8_t::p_x
uint8_t p_x
Definition lsm6dso32_reg.h:1537
lsm6dso32_fsm_outs8_t::n_x
uint8_t n_x
Definition lsm6dso32_reg.h:1536
lsm6dso32_fsm_outs8_t::p_z
uint8_t p_z
Definition lsm6dso32_reg.h:1533
lsm6dso32_fsm_outs8_t::n_y
uint8_t n_y
Definition lsm6dso32_reg.h:1534
lsm6dso32_fsm_outs8_t::n_v
uint8_t n_v
Definition lsm6dso32_reg.h:1530
lsm6dso32_fsm_outs9_t
Definition lsm6dso32_reg.h:1552
lsm6dso32_fsm_outs9_t::n_x
uint8_t n_x
Definition lsm6dso32_reg.h:1560
lsm6dso32_fsm_outs9_t::p_z
uint8_t p_z
Definition lsm6dso32_reg.h:1557
lsm6dso32_fsm_outs9_t::p_x
uint8_t p_x
Definition lsm6dso32_reg.h:1561
lsm6dso32_fsm_outs9_t::p_y
uint8_t p_y
Definition lsm6dso32_reg.h:1559
lsm6dso32_fsm_outs9_t::n_v
uint8_t n_v
Definition lsm6dso32_reg.h:1554
lsm6dso32_fsm_outs9_t::p_v
uint8_t p_v
Definition lsm6dso32_reg.h:1555
lsm6dso32_fsm_outs9_t::n_z
uint8_t n_z
Definition lsm6dso32_reg.h:1556
lsm6dso32_fsm_outs9_t::n_y
uint8_t n_y
Definition lsm6dso32_reg.h:1558
lsm6dso32_fsm_status_a_mainpage_t
Definition lsm6dso32_reg.h:688
lsm6dso32_fsm_status_a_mainpage_t::is_fsm7
uint8_t is_fsm7
Definition lsm6dso32_reg.h:696
lsm6dso32_fsm_status_a_mainpage_t::is_fsm6
uint8_t is_fsm6
Definition lsm6dso32_reg.h:695
lsm6dso32_fsm_status_a_mainpage_t::is_fsm5
uint8_t is_fsm5
Definition lsm6dso32_reg.h:694
lsm6dso32_fsm_status_a_mainpage_t::is_fsm1
uint8_t is_fsm1
Definition lsm6dso32_reg.h:690
lsm6dso32_fsm_status_a_mainpage_t::is_fsm8
uint8_t is_fsm8
Definition lsm6dso32_reg.h:697
lsm6dso32_fsm_status_a_mainpage_t::is_fsm2
uint8_t is_fsm2
Definition lsm6dso32_reg.h:691
lsm6dso32_fsm_status_a_mainpage_t::is_fsm4
uint8_t is_fsm4
Definition lsm6dso32_reg.h:693
lsm6dso32_fsm_status_a_mainpage_t::is_fsm3
uint8_t is_fsm3
Definition lsm6dso32_reg.h:692
lsm6dso32_fsm_status_a_t
Definition lsm6dso32_reg.h:1220
lsm6dso32_fsm_status_a_t::is_fsm1
uint8_t is_fsm1
Definition lsm6dso32_reg.h:1222
lsm6dso32_fsm_status_a_t::is_fsm3
uint8_t is_fsm3
Definition lsm6dso32_reg.h:1224
lsm6dso32_fsm_status_a_t::is_fsm4
uint8_t is_fsm4
Definition lsm6dso32_reg.h:1225
lsm6dso32_fsm_status_a_t::is_fsm6
uint8_t is_fsm6
Definition lsm6dso32_reg.h:1227
lsm6dso32_fsm_status_a_t::is_fsm8
uint8_t is_fsm8
Definition lsm6dso32_reg.h:1229
lsm6dso32_fsm_status_a_t::is_fsm2
uint8_t is_fsm2
Definition lsm6dso32_reg.h:1223
lsm6dso32_fsm_status_a_t::is_fsm5
uint8_t is_fsm5
Definition lsm6dso32_reg.h:1226
lsm6dso32_fsm_status_a_t::is_fsm7
uint8_t is_fsm7
Definition lsm6dso32_reg.h:1228
lsm6dso32_fsm_status_b_mainpage_t
Definition lsm6dso32_reg.h:712
lsm6dso32_fsm_status_b_mainpage_t::is_fsm16
uint8_t is_fsm16
Definition lsm6dso32_reg.h:721
lsm6dso32_fsm_status_b_mainpage_t::is_fsm9
uint8_t is_fsm9
Definition lsm6dso32_reg.h:714
lsm6dso32_fsm_status_b_mainpage_t::is_fsm11
uint8_t is_fsm11
Definition lsm6dso32_reg.h:716
lsm6dso32_fsm_status_b_mainpage_t::is_fsm14
uint8_t is_fsm14
Definition lsm6dso32_reg.h:719
lsm6dso32_fsm_status_b_mainpage_t::is_fsm12
uint8_t is_fsm12
Definition lsm6dso32_reg.h:717
lsm6dso32_fsm_status_b_mainpage_t::is_fsm15
uint8_t is_fsm15
Definition lsm6dso32_reg.h:720
lsm6dso32_fsm_status_b_mainpage_t::is_fsm10
uint8_t is_fsm10
Definition lsm6dso32_reg.h:715
lsm6dso32_fsm_status_b_mainpage_t::is_fsm13
uint8_t is_fsm13
Definition lsm6dso32_reg.h:718
lsm6dso32_fsm_status_b_t
Definition lsm6dso32_reg.h:1244
lsm6dso32_fsm_status_b_t::is_fsm14
uint8_t is_fsm14
Definition lsm6dso32_reg.h:1251
lsm6dso32_fsm_status_b_t::is_fsm9
uint8_t is_fsm9
Definition lsm6dso32_reg.h:1246
lsm6dso32_fsm_status_b_t::is_fsm13
uint8_t is_fsm13
Definition lsm6dso32_reg.h:1250
lsm6dso32_fsm_status_b_t::is_fsm11
uint8_t is_fsm11
Definition lsm6dso32_reg.h:1248
lsm6dso32_fsm_status_b_t::is_fsm15
uint8_t is_fsm15
Definition lsm6dso32_reg.h:1252
lsm6dso32_fsm_status_b_t::is_fsm12
uint8_t is_fsm12
Definition lsm6dso32_reg.h:1249
lsm6dso32_fsm_status_b_t::is_fsm16
uint8_t is_fsm16
Definition lsm6dso32_reg.h:1253
lsm6dso32_fsm_status_b_t::is_fsm10
uint8_t is_fsm10
Definition lsm6dso32_reg.h:1247
lsm6dso32_func_cfg_access_t
Definition lsm6dso32_reg.h:195
lsm6dso32_func_cfg_access_t::not_used_00
uint8_t not_used_00
Definition lsm6dso32_reg.h:197
lsm6dso32_func_cfg_access_t::reg_access
uint8_t reg_access
Definition lsm6dso32_reg.h:199
lsm6dso32_i3c_bus_avb_t
Definition lsm6dso32_reg.h:959
lsm6dso32_i3c_bus_avb_t::i3c_bus_avb_sel
uint8_t i3c_bus_avb_sel
Definition lsm6dso32_reg.h:963
lsm6dso32_i3c_bus_avb_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:962
lsm6dso32_i3c_bus_avb_t::pd_dis_int1
uint8_t pd_dis_int1
Definition lsm6dso32_reg.h:961
lsm6dso32_i3c_bus_avb_t::not_used_02
uint8_t not_used_02
Definition lsm6dso32_reg.h:964
lsm6dso32_int1_ctrl_t
Definition lsm6dso32_reg.h:303
lsm6dso32_int1_ctrl_t::int1_drdy_g
uint8_t int1_drdy_g
Definition lsm6dso32_reg.h:306
lsm6dso32_int1_ctrl_t::int1_fifo_ovr
uint8_t int1_fifo_ovr
Definition lsm6dso32_reg.h:309
lsm6dso32_int1_ctrl_t::int1_fifo_th
uint8_t int1_fifo_th
Definition lsm6dso32_reg.h:308
lsm6dso32_int1_ctrl_t::int1_fifo_full
uint8_t int1_fifo_full
Definition lsm6dso32_reg.h:310
lsm6dso32_int1_ctrl_t::den_drdy_flag
uint8_t den_drdy_flag
Definition lsm6dso32_reg.h:312
lsm6dso32_int1_ctrl_t::int1_drdy_xl
uint8_t int1_drdy_xl
Definition lsm6dso32_reg.h:305
lsm6dso32_int1_ctrl_t::int1_boot
uint8_t int1_boot
Definition lsm6dso32_reg.h:307
lsm6dso32_int1_ctrl_t::int1_cnt_bdr
uint8_t int1_cnt_bdr
Definition lsm6dso32_reg.h:311
lsm6dso32_int2_ctrl_t
Definition lsm6dso32_reg.h:327
lsm6dso32_int2_ctrl_t::int2_drdy_temp
uint8_t int2_drdy_temp
Definition lsm6dso32_reg.h:331
lsm6dso32_int2_ctrl_t::int2_fifo_th
uint8_t int2_fifo_th
Definition lsm6dso32_reg.h:332
lsm6dso32_int2_ctrl_t::int2_cnt_bdr
uint8_t int2_cnt_bdr
Definition lsm6dso32_reg.h:335
lsm6dso32_int2_ctrl_t::int2_fifo_ovr
uint8_t int2_fifo_ovr
Definition lsm6dso32_reg.h:333
lsm6dso32_int2_ctrl_t::int2_drdy_xl
uint8_t int2_drdy_xl
Definition lsm6dso32_reg.h:329
lsm6dso32_int2_ctrl_t::int2_fifo_full
uint8_t int2_fifo_full
Definition lsm6dso32_reg.h:334
lsm6dso32_int2_ctrl_t::int2_drdy_g
uint8_t int2_drdy_g
Definition lsm6dso32_reg.h:330
lsm6dso32_int2_ctrl_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:336
lsm6dso32_int_dur2_t
Definition lsm6dso32_reg.h:855
lsm6dso32_int_dur2_t::shock
uint8_t shock
Definition lsm6dso32_reg.h:857
lsm6dso32_int_dur2_t::dur
uint8_t dur
Definition lsm6dso32_reg.h:859
lsm6dso32_int_dur2_t::quiet
uint8_t quiet
Definition lsm6dso32_reg.h:858
lsm6dso32_internal_freq_fine_t
Definition lsm6dso32_reg.h:975
lsm6dso32_internal_freq_fine_t::freq_fine
uint8_t freq_fine
Definition lsm6dso32_reg.h:976
lsm6dso32_mag_cfg_a_t
Definition lsm6dso32_reg.h:1836
lsm6dso32_mag_cfg_a_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:1839
lsm6dso32_mag_cfg_a_t::mag_y_axis
uint8_t mag_y_axis
Definition lsm6dso32_reg.h:1840
lsm6dso32_mag_cfg_a_t::not_used_02
uint8_t not_used_02
Definition lsm6dso32_reg.h:1841
lsm6dso32_mag_cfg_a_t::mag_z_axis
uint8_t mag_z_axis
Definition lsm6dso32_reg.h:1838
lsm6dso32_mag_cfg_b_t
Definition lsm6dso32_reg.h:1852
lsm6dso32_mag_cfg_b_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:1855
lsm6dso32_mag_cfg_b_t::mag_x_axis
uint8_t mag_x_axis
Definition lsm6dso32_reg.h:1854
lsm6dso32_master_config_t
Definition lsm6dso32_reg.h:2322
lsm6dso32_master_config_t::rst_master_regs
uint8_t rst_master_regs
Definition lsm6dso32_reg.h:2330
lsm6dso32_master_config_t::master_on
uint8_t master_on
Definition lsm6dso32_reg.h:2325
lsm6dso32_master_config_t::write_once
uint8_t write_once
Definition lsm6dso32_reg.h:2329
lsm6dso32_master_config_t::pass_through_mode
uint8_t pass_through_mode
Definition lsm6dso32_reg.h:2327
lsm6dso32_master_config_t::start_config
uint8_t start_config
Definition lsm6dso32_reg.h:2328
lsm6dso32_master_config_t::aux_sens_on
uint8_t aux_sens_on
Definition lsm6dso32_reg.h:2324
lsm6dso32_master_config_t::shub_pu_en
uint8_t shub_pu_en
Definition lsm6dso32_reg.h:2326
lsm6dso32_md1_cfg_t
Definition lsm6dso32_reg.h:911
lsm6dso32_md1_cfg_t::int1_shub
uint8_t int1_shub
Definition lsm6dso32_reg.h:913
lsm6dso32_md1_cfg_t::int1_wu
uint8_t int1_wu
Definition lsm6dso32_reg.h:918
lsm6dso32_md1_cfg_t::int1_single_tap
uint8_t int1_single_tap
Definition lsm6dso32_reg.h:919
lsm6dso32_md1_cfg_t::int1_double_tap
uint8_t int1_double_tap
Definition lsm6dso32_reg.h:916
lsm6dso32_md1_cfg_t::int1_emb_func
uint8_t int1_emb_func
Definition lsm6dso32_reg.h:914
lsm6dso32_md1_cfg_t::int1_6d
uint8_t int1_6d
Definition lsm6dso32_reg.h:915
lsm6dso32_md1_cfg_t::int1_ff
uint8_t int1_ff
Definition lsm6dso32_reg.h:917
lsm6dso32_md1_cfg_t::int1_sleep_change
uint8_t int1_sleep_change
Definition lsm6dso32_reg.h:920
lsm6dso32_md2_cfg_t
Definition lsm6dso32_reg.h:935
lsm6dso32_md2_cfg_t::int2_double_tap
uint8_t int2_double_tap
Definition lsm6dso32_reg.h:940
lsm6dso32_md2_cfg_t::int2_sleep_change
uint8_t int2_sleep_change
Definition lsm6dso32_reg.h:944
lsm6dso32_md2_cfg_t::int2_timestamp
uint8_t int2_timestamp
Definition lsm6dso32_reg.h:937
lsm6dso32_md2_cfg_t::int2_wu
uint8_t int2_wu
Definition lsm6dso32_reg.h:942
lsm6dso32_md2_cfg_t::int2_6d
uint8_t int2_6d
Definition lsm6dso32_reg.h:939
lsm6dso32_md2_cfg_t::int2_ff
uint8_t int2_ff
Definition lsm6dso32_reg.h:941
lsm6dso32_md2_cfg_t::int2_single_tap
uint8_t int2_single_tap
Definition lsm6dso32_reg.h:943
lsm6dso32_md2_cfg_t::int2_emb_func
uint8_t int2_emb_func
Definition lsm6dso32_reg.h:938
lsm6dso32_page_address_t
Definition lsm6dso32_reg.h:1052
lsm6dso32_page_address_t::page_addr
uint8_t page_addr
Definition lsm6dso32_reg.h:1053
lsm6dso32_page_rw_t
Definition lsm6dso32_reg.h:1268
lsm6dso32_page_rw_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:1270
lsm6dso32_page_rw_t::emb_func_lir
uint8_t emb_func_lir
Definition lsm6dso32_reg.h:1272
lsm6dso32_page_rw_t::page_rw
uint8_t page_rw
Definition lsm6dso32_reg.h:1271
lsm6dso32_page_sel_t
Definition lsm6dso32_reg.h:1004
lsm6dso32_page_sel_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:1006
lsm6dso32_page_sel_t::page_sel
uint8_t page_sel
Definition lsm6dso32_reg.h:1007
lsm6dso32_page_value_t
Definition lsm6dso32_reg.h:1058
lsm6dso32_page_value_t::page_value
uint8_t page_value
Definition lsm6dso32_reg.h:1059
lsm6dso32_pedo_cmd_reg_t
Definition lsm6dso32_reg.h:1869
lsm6dso32_pedo_cmd_reg_t::not_used_02
uint8_t not_used_02
Definition lsm6dso32_reg.h:1875
lsm6dso32_pedo_cmd_reg_t::carry_count_en
uint8_t carry_count_en
Definition lsm6dso32_reg.h:1874
lsm6dso32_pedo_cmd_reg_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:1872
lsm6dso32_pedo_cmd_reg_t::ad_det_en
uint8_t ad_det_en
Definition lsm6dso32_reg.h:1871
lsm6dso32_pedo_cmd_reg_t::fp_rejection_en
uint8_t fp_rejection_en
Definition lsm6dso32_reg.h:1873
lsm6dso32_pin_ctrl_t
Definition lsm6dso32_reg.h:209
lsm6dso32_pin_ctrl_t::sdo_pu_en
uint8_t sdo_pu_en
Definition lsm6dso32_reg.h:212
lsm6dso32_pin_ctrl_t::not_used_02
uint8_t not_used_02
Definition lsm6dso32_reg.h:213
lsm6dso32_pin_ctrl_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:211
lsm6dso32_pin_int1_route_t
Definition lsm6dso32_reg.h:3090
lsm6dso32_pin_int1_route_t::emb_func_int1
lsm6dso32_emb_func_int1_t emb_func_int1
Definition lsm6dso32_reg.h:3093
lsm6dso32_pin_int1_route_t::int1_ctrl
lsm6dso32_int1_ctrl_t int1_ctrl
Definition lsm6dso32_reg.h:3091
lsm6dso32_pin_int1_route_t::md1_cfg
lsm6dso32_md1_cfg_t md1_cfg
Definition lsm6dso32_reg.h:3092
lsm6dso32_pin_int1_route_t::fsm_int1_a
lsm6dso32_fsm_int1_a_t fsm_int1_a
Definition lsm6dso32_reg.h:3094
lsm6dso32_pin_int1_route_t::fsm_int1_b
lsm6dso32_fsm_int1_b_t fsm_int1_b
Definition lsm6dso32_reg.h:3095
lsm6dso32_pin_int2_route_t
Definition lsm6dso32_reg.h:3103
lsm6dso32_pin_int2_route_t::int2_ctrl
lsm6dso32_int2_ctrl_t int2_ctrl
Definition lsm6dso32_reg.h:3104
lsm6dso32_pin_int2_route_t::emb_func_int2
lsm6dso32_emb_func_int2_t emb_func_int2
Definition lsm6dso32_reg.h:3106
lsm6dso32_pin_int2_route_t::fsm_int2_b
lsm6dso32_fsm_int2_b_t fsm_int2_b
Definition lsm6dso32_reg.h:3108
lsm6dso32_pin_int2_route_t::md2_cfg
lsm6dso32_md2_cfg_t md2_cfg
Definition lsm6dso32_reg.h:3105
lsm6dso32_pin_int2_route_t::fsm_int2_a
lsm6dso32_fsm_int2_a_t fsm_int2_a
Definition lsm6dso32_reg.h:3107
lsm6dso32_sensor_hub_10_t
Definition lsm6dso32_reg.h:2106
lsm6dso32_sensor_hub_10_t::bit5
uint8_t bit5
Definition lsm6dso32_reg.h:2113
lsm6dso32_sensor_hub_10_t::bit1
uint8_t bit1
Definition lsm6dso32_reg.h:2109
lsm6dso32_sensor_hub_10_t::bit4
uint8_t bit4
Definition lsm6dso32_reg.h:2112
lsm6dso32_sensor_hub_10_t::bit2
uint8_t bit2
Definition lsm6dso32_reg.h:2110
lsm6dso32_sensor_hub_10_t::bit0
uint8_t bit0
Definition lsm6dso32_reg.h:2108
lsm6dso32_sensor_hub_10_t::bit6
uint8_t bit6
Definition lsm6dso32_reg.h:2114
lsm6dso32_sensor_hub_10_t::bit7
uint8_t bit7
Definition lsm6dso32_reg.h:2115
lsm6dso32_sensor_hub_10_t::bit3
uint8_t bit3
Definition lsm6dso32_reg.h:2111
lsm6dso32_sensor_hub_11_t
Definition lsm6dso32_reg.h:2130
lsm6dso32_sensor_hub_11_t::bit0
uint8_t bit0
Definition lsm6dso32_reg.h:2132
lsm6dso32_sensor_hub_11_t::bit3
uint8_t bit3
Definition lsm6dso32_reg.h:2135
lsm6dso32_sensor_hub_11_t::bit4
uint8_t bit4
Definition lsm6dso32_reg.h:2136
lsm6dso32_sensor_hub_11_t::bit1
uint8_t bit1
Definition lsm6dso32_reg.h:2133
lsm6dso32_sensor_hub_11_t::bit7
uint8_t bit7
Definition lsm6dso32_reg.h:2139
lsm6dso32_sensor_hub_11_t::bit5
uint8_t bit5
Definition lsm6dso32_reg.h:2137
lsm6dso32_sensor_hub_11_t::bit6
uint8_t bit6
Definition lsm6dso32_reg.h:2138
lsm6dso32_sensor_hub_11_t::bit2
uint8_t bit2
Definition lsm6dso32_reg.h:2134
lsm6dso32_sensor_hub_12_t
Definition lsm6dso32_reg.h:2154
lsm6dso32_sensor_hub_12_t::bit4
uint8_t bit4
Definition lsm6dso32_reg.h:2160
lsm6dso32_sensor_hub_12_t::bit6
uint8_t bit6
Definition lsm6dso32_reg.h:2162
lsm6dso32_sensor_hub_12_t::bit2
uint8_t bit2
Definition lsm6dso32_reg.h:2158
lsm6dso32_sensor_hub_12_t::bit1
uint8_t bit1
Definition lsm6dso32_reg.h:2157
lsm6dso32_sensor_hub_12_t::bit5
uint8_t bit5
Definition lsm6dso32_reg.h:2161
lsm6dso32_sensor_hub_12_t::bit0
uint8_t bit0
Definition lsm6dso32_reg.h:2156
lsm6dso32_sensor_hub_12_t::bit7
uint8_t bit7
Definition lsm6dso32_reg.h:2163
lsm6dso32_sensor_hub_12_t::bit3
uint8_t bit3
Definition lsm6dso32_reg.h:2159
lsm6dso32_sensor_hub_13_t
Definition lsm6dso32_reg.h:2178
lsm6dso32_sensor_hub_13_t::bit3
uint8_t bit3
Definition lsm6dso32_reg.h:2183
lsm6dso32_sensor_hub_13_t::bit6
uint8_t bit6
Definition lsm6dso32_reg.h:2186
lsm6dso32_sensor_hub_13_t::bit2
uint8_t bit2
Definition lsm6dso32_reg.h:2182
lsm6dso32_sensor_hub_13_t::bit5
uint8_t bit5
Definition lsm6dso32_reg.h:2185
lsm6dso32_sensor_hub_13_t::bit7
uint8_t bit7
Definition lsm6dso32_reg.h:2187
lsm6dso32_sensor_hub_13_t::bit4
uint8_t bit4
Definition lsm6dso32_reg.h:2184
lsm6dso32_sensor_hub_13_t::bit1
uint8_t bit1
Definition lsm6dso32_reg.h:2181
lsm6dso32_sensor_hub_13_t::bit0
uint8_t bit0
Definition lsm6dso32_reg.h:2180
lsm6dso32_sensor_hub_14_t
Definition lsm6dso32_reg.h:2202
lsm6dso32_sensor_hub_14_t::bit5
uint8_t bit5
Definition lsm6dso32_reg.h:2209
lsm6dso32_sensor_hub_14_t::bit7
uint8_t bit7
Definition lsm6dso32_reg.h:2211
lsm6dso32_sensor_hub_14_t::bit2
uint8_t bit2
Definition lsm6dso32_reg.h:2206
lsm6dso32_sensor_hub_14_t::bit1
uint8_t bit1
Definition lsm6dso32_reg.h:2205
lsm6dso32_sensor_hub_14_t::bit4
uint8_t bit4
Definition lsm6dso32_reg.h:2208
lsm6dso32_sensor_hub_14_t::bit6
uint8_t bit6
Definition lsm6dso32_reg.h:2210
lsm6dso32_sensor_hub_14_t::bit3
uint8_t bit3
Definition lsm6dso32_reg.h:2207
lsm6dso32_sensor_hub_14_t::bit0
uint8_t bit0
Definition lsm6dso32_reg.h:2204
lsm6dso32_sensor_hub_15_t
Definition lsm6dso32_reg.h:2226
lsm6dso32_sensor_hub_15_t::bit5
uint8_t bit5
Definition lsm6dso32_reg.h:2233
lsm6dso32_sensor_hub_15_t::bit2
uint8_t bit2
Definition lsm6dso32_reg.h:2230
lsm6dso32_sensor_hub_15_t::bit3
uint8_t bit3
Definition lsm6dso32_reg.h:2231
lsm6dso32_sensor_hub_15_t::bit6
uint8_t bit6
Definition lsm6dso32_reg.h:2234
lsm6dso32_sensor_hub_15_t::bit4
uint8_t bit4
Definition lsm6dso32_reg.h:2232
lsm6dso32_sensor_hub_15_t::bit7
uint8_t bit7
Definition lsm6dso32_reg.h:2235
lsm6dso32_sensor_hub_15_t::bit1
uint8_t bit1
Definition lsm6dso32_reg.h:2229
lsm6dso32_sensor_hub_15_t::bit0
uint8_t bit0
Definition lsm6dso32_reg.h:2228
lsm6dso32_sensor_hub_16_t
Definition lsm6dso32_reg.h:2250
lsm6dso32_sensor_hub_16_t::bit5
uint8_t bit5
Definition lsm6dso32_reg.h:2257
lsm6dso32_sensor_hub_16_t::bit6
uint8_t bit6
Definition lsm6dso32_reg.h:2258
lsm6dso32_sensor_hub_16_t::bit0
uint8_t bit0
Definition lsm6dso32_reg.h:2252
lsm6dso32_sensor_hub_16_t::bit4
uint8_t bit4
Definition lsm6dso32_reg.h:2256
lsm6dso32_sensor_hub_16_t::bit7
uint8_t bit7
Definition lsm6dso32_reg.h:2259
lsm6dso32_sensor_hub_16_t::bit1
uint8_t bit1
Definition lsm6dso32_reg.h:2253
lsm6dso32_sensor_hub_16_t::bit3
uint8_t bit3
Definition lsm6dso32_reg.h:2255
lsm6dso32_sensor_hub_16_t::bit2
uint8_t bit2
Definition lsm6dso32_reg.h:2254
lsm6dso32_sensor_hub_17_t
Definition lsm6dso32_reg.h:2274
lsm6dso32_sensor_hub_17_t::bit4
uint8_t bit4
Definition lsm6dso32_reg.h:2280
lsm6dso32_sensor_hub_17_t::bit6
uint8_t bit6
Definition lsm6dso32_reg.h:2282
lsm6dso32_sensor_hub_17_t::bit0
uint8_t bit0
Definition lsm6dso32_reg.h:2276
lsm6dso32_sensor_hub_17_t::bit1
uint8_t bit1
Definition lsm6dso32_reg.h:2277
lsm6dso32_sensor_hub_17_t::bit3
uint8_t bit3
Definition lsm6dso32_reg.h:2279
lsm6dso32_sensor_hub_17_t::bit7
uint8_t bit7
Definition lsm6dso32_reg.h:2283
lsm6dso32_sensor_hub_17_t::bit5
uint8_t bit5
Definition lsm6dso32_reg.h:2281
lsm6dso32_sensor_hub_17_t::bit2
uint8_t bit2
Definition lsm6dso32_reg.h:2278
lsm6dso32_sensor_hub_18_t
Definition lsm6dso32_reg.h:2298
lsm6dso32_sensor_hub_18_t::bit0
uint8_t bit0
Definition lsm6dso32_reg.h:2300
lsm6dso32_sensor_hub_18_t::bit4
uint8_t bit4
Definition lsm6dso32_reg.h:2304
lsm6dso32_sensor_hub_18_t::bit1
uint8_t bit1
Definition lsm6dso32_reg.h:2301
lsm6dso32_sensor_hub_18_t::bit7
uint8_t bit7
Definition lsm6dso32_reg.h:2307
lsm6dso32_sensor_hub_18_t::bit6
uint8_t bit6
Definition lsm6dso32_reg.h:2306
lsm6dso32_sensor_hub_18_t::bit2
uint8_t bit2
Definition lsm6dso32_reg.h:2302
lsm6dso32_sensor_hub_18_t::bit3
uint8_t bit3
Definition lsm6dso32_reg.h:2303
lsm6dso32_sensor_hub_18_t::bit5
uint8_t bit5
Definition lsm6dso32_reg.h:2305
lsm6dso32_sensor_hub_1_t
Definition lsm6dso32_reg.h:1890
lsm6dso32_sensor_hub_1_t::bit5
uint8_t bit5
Definition lsm6dso32_reg.h:1897
lsm6dso32_sensor_hub_1_t::bit7
uint8_t bit7
Definition lsm6dso32_reg.h:1899
lsm6dso32_sensor_hub_1_t::bit1
uint8_t bit1
Definition lsm6dso32_reg.h:1893
lsm6dso32_sensor_hub_1_t::bit3
uint8_t bit3
Definition lsm6dso32_reg.h:1895
lsm6dso32_sensor_hub_1_t::bit0
uint8_t bit0
Definition lsm6dso32_reg.h:1892
lsm6dso32_sensor_hub_1_t::bit2
uint8_t bit2
Definition lsm6dso32_reg.h:1894
lsm6dso32_sensor_hub_1_t::bit6
uint8_t bit6
Definition lsm6dso32_reg.h:1898
lsm6dso32_sensor_hub_1_t::bit4
uint8_t bit4
Definition lsm6dso32_reg.h:1896
lsm6dso32_sensor_hub_2_t
Definition lsm6dso32_reg.h:1914
lsm6dso32_sensor_hub_2_t::bit3
uint8_t bit3
Definition lsm6dso32_reg.h:1919
lsm6dso32_sensor_hub_2_t::bit7
uint8_t bit7
Definition lsm6dso32_reg.h:1923
lsm6dso32_sensor_hub_2_t::bit2
uint8_t bit2
Definition lsm6dso32_reg.h:1918
lsm6dso32_sensor_hub_2_t::bit0
uint8_t bit0
Definition lsm6dso32_reg.h:1916
lsm6dso32_sensor_hub_2_t::bit5
uint8_t bit5
Definition lsm6dso32_reg.h:1921
lsm6dso32_sensor_hub_2_t::bit4
uint8_t bit4
Definition lsm6dso32_reg.h:1920
lsm6dso32_sensor_hub_2_t::bit1
uint8_t bit1
Definition lsm6dso32_reg.h:1917
lsm6dso32_sensor_hub_2_t::bit6
uint8_t bit6
Definition lsm6dso32_reg.h:1922
lsm6dso32_sensor_hub_3_t
Definition lsm6dso32_reg.h:1938
lsm6dso32_sensor_hub_3_t::bit2
uint8_t bit2
Definition lsm6dso32_reg.h:1942
lsm6dso32_sensor_hub_3_t::bit4
uint8_t bit4
Definition lsm6dso32_reg.h:1944
lsm6dso32_sensor_hub_3_t::bit5
uint8_t bit5
Definition lsm6dso32_reg.h:1945
lsm6dso32_sensor_hub_3_t::bit7
uint8_t bit7
Definition lsm6dso32_reg.h:1947
lsm6dso32_sensor_hub_3_t::bit0
uint8_t bit0
Definition lsm6dso32_reg.h:1940
lsm6dso32_sensor_hub_3_t::bit3
uint8_t bit3
Definition lsm6dso32_reg.h:1943
lsm6dso32_sensor_hub_3_t::bit6
uint8_t bit6
Definition lsm6dso32_reg.h:1946
lsm6dso32_sensor_hub_3_t::bit1
uint8_t bit1
Definition lsm6dso32_reg.h:1941
lsm6dso32_sensor_hub_4_t
Definition lsm6dso32_reg.h:1962
lsm6dso32_sensor_hub_4_t::bit1
uint8_t bit1
Definition lsm6dso32_reg.h:1965
lsm6dso32_sensor_hub_4_t::bit2
uint8_t bit2
Definition lsm6dso32_reg.h:1966
lsm6dso32_sensor_hub_4_t::bit4
uint8_t bit4
Definition lsm6dso32_reg.h:1968
lsm6dso32_sensor_hub_4_t::bit5
uint8_t bit5
Definition lsm6dso32_reg.h:1969
lsm6dso32_sensor_hub_4_t::bit6
uint8_t bit6
Definition lsm6dso32_reg.h:1970
lsm6dso32_sensor_hub_4_t::bit0
uint8_t bit0
Definition lsm6dso32_reg.h:1964
lsm6dso32_sensor_hub_4_t::bit7
uint8_t bit7
Definition lsm6dso32_reg.h:1971
lsm6dso32_sensor_hub_4_t::bit3
uint8_t bit3
Definition lsm6dso32_reg.h:1967
lsm6dso32_sensor_hub_5_t
Definition lsm6dso32_reg.h:1986
lsm6dso32_sensor_hub_5_t::bit6
uint8_t bit6
Definition lsm6dso32_reg.h:1994
lsm6dso32_sensor_hub_5_t::bit2
uint8_t bit2
Definition lsm6dso32_reg.h:1990
lsm6dso32_sensor_hub_5_t::bit5
uint8_t bit5
Definition lsm6dso32_reg.h:1993
lsm6dso32_sensor_hub_5_t::bit7
uint8_t bit7
Definition lsm6dso32_reg.h:1995
lsm6dso32_sensor_hub_5_t::bit3
uint8_t bit3
Definition lsm6dso32_reg.h:1991
lsm6dso32_sensor_hub_5_t::bit0
uint8_t bit0
Definition lsm6dso32_reg.h:1988
lsm6dso32_sensor_hub_5_t::bit4
uint8_t bit4
Definition lsm6dso32_reg.h:1992
lsm6dso32_sensor_hub_5_t::bit1
uint8_t bit1
Definition lsm6dso32_reg.h:1989
lsm6dso32_sensor_hub_6_t
Definition lsm6dso32_reg.h:2010
lsm6dso32_sensor_hub_6_t::bit3
uint8_t bit3
Definition lsm6dso32_reg.h:2015
lsm6dso32_sensor_hub_6_t::bit7
uint8_t bit7
Definition lsm6dso32_reg.h:2019
lsm6dso32_sensor_hub_6_t::bit1
uint8_t bit1
Definition lsm6dso32_reg.h:2013
lsm6dso32_sensor_hub_6_t::bit2
uint8_t bit2
Definition lsm6dso32_reg.h:2014
lsm6dso32_sensor_hub_6_t::bit4
uint8_t bit4
Definition lsm6dso32_reg.h:2016
lsm6dso32_sensor_hub_6_t::bit5
uint8_t bit5
Definition lsm6dso32_reg.h:2017
lsm6dso32_sensor_hub_6_t::bit0
uint8_t bit0
Definition lsm6dso32_reg.h:2012
lsm6dso32_sensor_hub_6_t::bit6
uint8_t bit6
Definition lsm6dso32_reg.h:2018
lsm6dso32_sensor_hub_7_t
Definition lsm6dso32_reg.h:2034
lsm6dso32_sensor_hub_7_t::bit0
uint8_t bit0
Definition lsm6dso32_reg.h:2036
lsm6dso32_sensor_hub_7_t::bit6
uint8_t bit6
Definition lsm6dso32_reg.h:2042
lsm6dso32_sensor_hub_7_t::bit5
uint8_t bit5
Definition lsm6dso32_reg.h:2041
lsm6dso32_sensor_hub_7_t::bit1
uint8_t bit1
Definition lsm6dso32_reg.h:2037
lsm6dso32_sensor_hub_7_t::bit3
uint8_t bit3
Definition lsm6dso32_reg.h:2039
lsm6dso32_sensor_hub_7_t::bit7
uint8_t bit7
Definition lsm6dso32_reg.h:2043
lsm6dso32_sensor_hub_7_t::bit2
uint8_t bit2
Definition lsm6dso32_reg.h:2038
lsm6dso32_sensor_hub_7_t::bit4
uint8_t bit4
Definition lsm6dso32_reg.h:2040
lsm6dso32_sensor_hub_8_t
Definition lsm6dso32_reg.h:2058
lsm6dso32_sensor_hub_8_t::bit5
uint8_t bit5
Definition lsm6dso32_reg.h:2065
lsm6dso32_sensor_hub_8_t::bit0
uint8_t bit0
Definition lsm6dso32_reg.h:2060
lsm6dso32_sensor_hub_8_t::bit7
uint8_t bit7
Definition lsm6dso32_reg.h:2067
lsm6dso32_sensor_hub_8_t::bit3
uint8_t bit3
Definition lsm6dso32_reg.h:2063
lsm6dso32_sensor_hub_8_t::bit2
uint8_t bit2
Definition lsm6dso32_reg.h:2062
lsm6dso32_sensor_hub_8_t::bit4
uint8_t bit4
Definition lsm6dso32_reg.h:2064
lsm6dso32_sensor_hub_8_t::bit1
uint8_t bit1
Definition lsm6dso32_reg.h:2061
lsm6dso32_sensor_hub_8_t::bit6
uint8_t bit6
Definition lsm6dso32_reg.h:2066
lsm6dso32_sensor_hub_9_t
Definition lsm6dso32_reg.h:2082
lsm6dso32_sensor_hub_9_t::bit4
uint8_t bit4
Definition lsm6dso32_reg.h:2088
lsm6dso32_sensor_hub_9_t::bit2
uint8_t bit2
Definition lsm6dso32_reg.h:2086
lsm6dso32_sensor_hub_9_t::bit1
uint8_t bit1
Definition lsm6dso32_reg.h:2085
lsm6dso32_sensor_hub_9_t::bit5
uint8_t bit5
Definition lsm6dso32_reg.h:2089
lsm6dso32_sensor_hub_9_t::bit6
uint8_t bit6
Definition lsm6dso32_reg.h:2090
lsm6dso32_sensor_hub_9_t::bit0
uint8_t bit0
Definition lsm6dso32_reg.h:2084
lsm6dso32_sensor_hub_9_t::bit3
uint8_t bit3
Definition lsm6dso32_reg.h:2087
lsm6dso32_sensor_hub_9_t::bit7
uint8_t bit7
Definition lsm6dso32_reg.h:2091
lsm6dso32_sh_cfg_read_t
Definition lsm6dso32_reg.h:3849
lsm6dso32_sh_cfg_read_t::slv_subadd
uint8_t slv_subadd
Definition lsm6dso32_reg.h:3851
lsm6dso32_sh_cfg_read_t::slv_len
uint8_t slv_len
Definition lsm6dso32_reg.h:3852
lsm6dso32_sh_cfg_read_t::slv_add
uint8_t slv_add
Definition lsm6dso32_reg.h:3850
lsm6dso32_sh_cfg_write_t
Definition lsm6dso32_reg.h:3840
lsm6dso32_sh_cfg_write_t::slv0_data
uint8_t slv0_data
Definition lsm6dso32_reg.h:3843
lsm6dso32_sh_cfg_write_t::slv0_add
uint8_t slv0_add
Definition lsm6dso32_reg.h:3841
lsm6dso32_sh_cfg_write_t::slv0_subadd
uint8_t slv0_subadd
Definition lsm6dso32_reg.h:3842
lsm6dso32_slv0_add_t
Definition lsm6dso32_reg.h:2344
lsm6dso32_slv0_add_t::slave0
uint8_t slave0
Definition lsm6dso32_reg.h:2347
lsm6dso32_slv0_add_t::rw_0
uint8_t rw_0
Definition lsm6dso32_reg.h:2346
lsm6dso32_slv0_config_t
Definition lsm6dso32_reg.h:2362
lsm6dso32_slv0_config_t::batch_ext_sens_0_en
uint8_t batch_ext_sens_0_en
Definition lsm6dso32_reg.h:2365
lsm6dso32_slv0_config_t::shub_odr
uint8_t shub_odr
Definition lsm6dso32_reg.h:2367
lsm6dso32_slv0_config_t::slave0_numop
uint8_t slave0_numop
Definition lsm6dso32_reg.h:2364
lsm6dso32_slv0_config_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:2366
lsm6dso32_slv0_subadd_t
Definition lsm6dso32_reg.h:2356
lsm6dso32_slv0_subadd_t::slave0_reg
uint8_t slave0_reg
Definition lsm6dso32_reg.h:2357
lsm6dso32_slv1_add_t
Definition lsm6dso32_reg.h:2378
lsm6dso32_slv1_add_t::r_1
uint8_t r_1
Definition lsm6dso32_reg.h:2380
lsm6dso32_slv1_add_t::slave1_add
uint8_t slave1_add
Definition lsm6dso32_reg.h:2381
lsm6dso32_slv1_config_t
Definition lsm6dso32_reg.h:2396
lsm6dso32_slv1_config_t::slave1_numop
uint8_t slave1_numop
Definition lsm6dso32_reg.h:2398
lsm6dso32_slv1_config_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:2400
lsm6dso32_slv1_config_t::batch_ext_sens_1_en
uint8_t batch_ext_sens_1_en
Definition lsm6dso32_reg.h:2399
lsm6dso32_slv1_subadd_t
Definition lsm6dso32_reg.h:2390
lsm6dso32_slv1_subadd_t::slave1_reg
uint8_t slave1_reg
Definition lsm6dso32_reg.h:2391
lsm6dso32_slv2_add_t
Definition lsm6dso32_reg.h:2410
lsm6dso32_slv2_add_t::r_2
uint8_t r_2
Definition lsm6dso32_reg.h:2412
lsm6dso32_slv2_add_t::slave2_add
uint8_t slave2_add
Definition lsm6dso32_reg.h:2413
lsm6dso32_slv2_config_t
Definition lsm6dso32_reg.h:2428
lsm6dso32_slv2_config_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:2432
lsm6dso32_slv2_config_t::batch_ext_sens_2_en
uint8_t batch_ext_sens_2_en
Definition lsm6dso32_reg.h:2431
lsm6dso32_slv2_config_t::slave2_numop
uint8_t slave2_numop
Definition lsm6dso32_reg.h:2430
lsm6dso32_slv2_subadd_t
Definition lsm6dso32_reg.h:2422
lsm6dso32_slv2_subadd_t::slave2_reg
uint8_t slave2_reg
Definition lsm6dso32_reg.h:2423
lsm6dso32_slv3_add_t
Definition lsm6dso32_reg.h:2442
lsm6dso32_slv3_add_t::slave3_add
uint8_t slave3_add
Definition lsm6dso32_reg.h:2445
lsm6dso32_slv3_add_t::r_3
uint8_t r_3
Definition lsm6dso32_reg.h:2444
lsm6dso32_slv3_config_t
Definition lsm6dso32_reg.h:2460
lsm6dso32_slv3_config_t::slave3_numop
uint8_t slave3_numop
Definition lsm6dso32_reg.h:2462
lsm6dso32_slv3_config_t::batch_ext_sens_3_en
uint8_t batch_ext_sens_3_en
Definition lsm6dso32_reg.h:2463
lsm6dso32_slv3_config_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:2464
lsm6dso32_slv3_subadd_t
Definition lsm6dso32_reg.h:2454
lsm6dso32_slv3_subadd_t::slave3_reg
uint8_t slave3_reg
Definition lsm6dso32_reg.h:2455
lsm6dso32_status_master_mainpage_t
Definition lsm6dso32_reg.h:736
lsm6dso32_status_master_mainpage_t::slave0_nack
uint8_t slave0_nack
Definition lsm6dso32_reg.h:740
lsm6dso32_status_master_mainpage_t::wr_once_done
uint8_t wr_once_done
Definition lsm6dso32_reg.h:744
lsm6dso32_status_master_mainpage_t::slave3_nack
uint8_t slave3_nack
Definition lsm6dso32_reg.h:743
lsm6dso32_status_master_mainpage_t::slave1_nack
uint8_t slave1_nack
Definition lsm6dso32_reg.h:741
lsm6dso32_status_master_mainpage_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:739
lsm6dso32_status_master_mainpage_t::sens_hub_endop
uint8_t sens_hub_endop
Definition lsm6dso32_reg.h:738
lsm6dso32_status_master_mainpage_t::slave2_nack
uint8_t slave2_nack
Definition lsm6dso32_reg.h:742
lsm6dso32_status_master_t
Definition lsm6dso32_reg.h:2480
lsm6dso32_status_master_t::slave1_nack
uint8_t slave1_nack
Definition lsm6dso32_reg.h:2485
lsm6dso32_status_master_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:2483
lsm6dso32_status_master_t::sens_hub_endop
uint8_t sens_hub_endop
Definition lsm6dso32_reg.h:2482
lsm6dso32_status_master_t::slave0_nack
uint8_t slave0_nack
Definition lsm6dso32_reg.h:2484
lsm6dso32_status_master_t::slave2_nack
uint8_t slave2_nack
Definition lsm6dso32_reg.h:2486
lsm6dso32_status_master_t::slave3_nack
uint8_t slave3_nack
Definition lsm6dso32_reg.h:2487
lsm6dso32_status_master_t::wr_once_done
uint8_t wr_once_done
Definition lsm6dso32_reg.h:2488
lsm6dso32_status_reg_t
Definition lsm6dso32_reg.h:638
lsm6dso32_status_reg_t::gda
uint8_t gda
Definition lsm6dso32_reg.h:641
lsm6dso32_status_reg_t::xlda
uint8_t xlda
Definition lsm6dso32_reg.h:640
lsm6dso32_status_reg_t::tda
uint8_t tda
Definition lsm6dso32_reg.h:642
lsm6dso32_status_reg_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:643
lsm6dso32_tap_cfg0_t
Definition lsm6dso32_reg.h:791
lsm6dso32_tap_cfg0_t::int_clr_on_read
uint8_t int_clr_on_read
Definition lsm6dso32_reg.h:799
lsm6dso32_tap_cfg0_t::slope_fds
uint8_t slope_fds
Definition lsm6dso32_reg.h:797
lsm6dso32_tap_cfg0_t::tap_z_en
uint8_t tap_z_en
Definition lsm6dso32_reg.h:794
lsm6dso32_tap_cfg0_t::tap_x_en
uint8_t tap_x_en
Definition lsm6dso32_reg.h:796
lsm6dso32_tap_cfg0_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:800
lsm6dso32_tap_cfg0_t::lir
uint8_t lir
Definition lsm6dso32_reg.h:793
lsm6dso32_tap_cfg0_t::tap_y_en
uint8_t tap_y_en
Definition lsm6dso32_reg.h:795
lsm6dso32_tap_cfg0_t::sleep_status_on_int
uint8_t sleep_status_on_int
Definition lsm6dso32_reg.h:798
lsm6dso32_tap_cfg1_t
Definition lsm6dso32_reg.h:815
lsm6dso32_tap_cfg1_t::tap_priority
uint8_t tap_priority
Definition lsm6dso32_reg.h:818
lsm6dso32_tap_cfg1_t::tap_ths_x
uint8_t tap_ths_x
Definition lsm6dso32_reg.h:817
lsm6dso32_tap_cfg2_t
Definition lsm6dso32_reg.h:827
lsm6dso32_tap_cfg2_t::interrupts_enable
uint8_t interrupts_enable
Definition lsm6dso32_reg.h:831
lsm6dso32_tap_cfg2_t::inact_en
uint8_t inact_en
Definition lsm6dso32_reg.h:830
lsm6dso32_tap_cfg2_t::tap_ths_y
uint8_t tap_ths_y
Definition lsm6dso32_reg.h:829
lsm6dso32_tap_src_t
Definition lsm6dso32_reg.h:590
lsm6dso32_tap_src_t::tap_sign
uint8_t tap_sign
Definition lsm6dso32_reg.h:595
lsm6dso32_tap_src_t::y_tap
uint8_t y_tap
Definition lsm6dso32_reg.h:593
lsm6dso32_tap_src_t::tap_ia
uint8_t tap_ia
Definition lsm6dso32_reg.h:598
lsm6dso32_tap_src_t::x_tap
uint8_t x_tap
Definition lsm6dso32_reg.h:594
lsm6dso32_tap_src_t::not_used_02
uint8_t not_used_02
Definition lsm6dso32_reg.h:599
lsm6dso32_tap_src_t::single_tap
uint8_t single_tap
Definition lsm6dso32_reg.h:597
lsm6dso32_tap_src_t::double_tap
uint8_t double_tap
Definition lsm6dso32_reg.h:596
lsm6dso32_tap_src_t::z_tap
uint8_t z_tap
Definition lsm6dso32_reg.h:592
lsm6dso32_tap_ths_6d_t
Definition lsm6dso32_reg.h:841
lsm6dso32_tap_ths_6d_t::d4d_en
uint8_t d4d_en
Definition lsm6dso32_reg.h:845
lsm6dso32_tap_ths_6d_t::sixd_ths
uint8_t sixd_ths
Definition lsm6dso32_reg.h:844
lsm6dso32_tap_ths_6d_t::tap_ths_z
uint8_t tap_ths_z
Definition lsm6dso32_reg.h:843
lsm6dso32_wake_up_dur_t
Definition lsm6dso32_reg.h:883
lsm6dso32_wake_up_dur_t::wake_ths_w
uint8_t wake_ths_w
Definition lsm6dso32_reg.h:886
lsm6dso32_wake_up_dur_t::ff_dur
uint8_t ff_dur
Definition lsm6dso32_reg.h:888
lsm6dso32_wake_up_dur_t::sleep_dur
uint8_t sleep_dur
Definition lsm6dso32_reg.h:885
lsm6dso32_wake_up_dur_t::wake_dur
uint8_t wake_dur
Definition lsm6dso32_reg.h:887
lsm6dso32_wake_up_src_t
Definition lsm6dso32_reg.h:566
lsm6dso32_wake_up_src_t::x_wu
uint8_t x_wu
Definition lsm6dso32_reg.h:570
lsm6dso32_wake_up_src_t::sleep_state
uint8_t sleep_state
Definition lsm6dso32_reg.h:572
lsm6dso32_wake_up_src_t::ff_ia
uint8_t ff_ia
Definition lsm6dso32_reg.h:573
lsm6dso32_wake_up_src_t::wu_ia
uint8_t wu_ia
Definition lsm6dso32_reg.h:571
lsm6dso32_wake_up_src_t::not_used_01
uint8_t not_used_01
Definition lsm6dso32_reg.h:575
lsm6dso32_wake_up_src_t::y_wu
uint8_t y_wu
Definition lsm6dso32_reg.h:569
lsm6dso32_wake_up_src_t::z_wu
uint8_t z_wu
Definition lsm6dso32_reg.h:568
lsm6dso32_wake_up_src_t::sleep_change_ia
uint8_t sleep_change_ia
Definition lsm6dso32_reg.h:574
lsm6dso32_wake_up_ths_t
Definition lsm6dso32_reg.h:869
lsm6dso32_wake_up_ths_t::wk_ths
uint8_t wk_ths
Definition lsm6dso32_reg.h:871
lsm6dso32_wake_up_ths_t::usr_off_on_wu
uint8_t usr_off_on_wu
Definition lsm6dso32_reg.h:872
lsm6dso32_wake_up_ths_t::single_double_tap
uint8_t single_double_tap
Definition lsm6dso32_reg.h:873
stmdev_ctx_t
Definition lis2mdl_reg.h:117
ucf_line_t
Definition lis2mdl_reg.h:149
lsm6dso32_reg_t
Definition lsm6dso32_reg.h:2514
lsm6dso32_reg_t::fsm_enable_a
lsm6dso32_fsm_enable_a_t fsm_enable_a
Definition lsm6dso32_reg.h:2571
lsm6dso32_reg_t::sensor_hub_2
lsm6dso32_sensor_hub_2_t sensor_hub_2
Definition lsm6dso32_reg.h:2598
lsm6dso32_reg_t::fsm_outs14
lsm6dso32_fsm_outs14_t fsm_outs14
Definition lsm6dso32_reg.h:2587
lsm6dso32_reg_t::int2_ctrl
lsm6dso32_int2_ctrl_t int2_ctrl
Definition lsm6dso32_reg.h:2524
lsm6dso32_reg_t::ctrl6_c
lsm6dso32_ctrl6_c_t ctrl6_c
Definition lsm6dso32_reg.h:2530
lsm6dso32_reg_t::fsm_int2_b
lsm6dso32_fsm_int2_b_t fsm_int2_b
Definition lsm6dso32_reg.h:2565
lsm6dso32_reg_t::counter_bdr_reg2
lsm6dso32_counter_bdr_reg2_t counter_bdr_reg2
Definition lsm6dso32_reg.h:2522
lsm6dso32_reg_t::emb_func_status
lsm6dso32_emb_func_status_t emb_func_status
Definition lsm6dso32_reg.h:2566
lsm6dso32_reg_t::d6d_src
lsm6dso32_d6d_src_t d6d_src
Definition lsm6dso32_reg.h:2538
lsm6dso32_reg_t::slv1_config
lsm6dso32_slv1_config_t slv1_config
Definition lsm6dso32_reg.h:2621
lsm6dso32_reg_t::status_reg
lsm6dso32_status_reg_t status_reg
Definition lsm6dso32_reg.h:2539
lsm6dso32_reg_t::ctrl2_g
lsm6dso32_ctrl2_g_t ctrl2_g
Definition lsm6dso32_reg.h:2526
lsm6dso32_reg_t::sensor_hub_5
lsm6dso32_sensor_hub_5_t sensor_hub_5
Definition lsm6dso32_reg.h:2601
lsm6dso32_reg_t::fsm_outs15
lsm6dso32_fsm_outs15_t fsm_outs15
Definition lsm6dso32_reg.h:2588
lsm6dso32_reg_t::wake_up_src
lsm6dso32_wake_up_src_t wake_up_src
Definition lsm6dso32_reg.h:2536
lsm6dso32_reg_t::slv1_add
lsm6dso32_slv1_add_t slv1_add
Definition lsm6dso32_reg.h:2619
lsm6dso32_reg_t::slv0_add
lsm6dso32_slv0_add_t slv0_add
Definition lsm6dso32_reg.h:2616
lsm6dso32_reg_t::emb_func_en_a
lsm6dso32_emb_func_en_a_t emb_func_en_a
Definition lsm6dso32_reg.h:2556
lsm6dso32_reg_t::sensor_hub_13
lsm6dso32_sensor_hub_13_t sensor_hub_13
Definition lsm6dso32_reg.h:2609
lsm6dso32_reg_t::pin_ctrl
lsm6dso32_pin_ctrl_t pin_ctrl
Definition lsm6dso32_reg.h:2516
lsm6dso32_reg_t::sensor_hub_6
lsm6dso32_sensor_hub_6_t sensor_hub_6
Definition lsm6dso32_reg.h:2602
lsm6dso32_reg_t::datawrite_src_mode_sub_slv0
lsm6dso32_datawrite_src_mode_sub_slv0_t datawrite_src_mode_sub_slv0
Definition lsm6dso32_reg.h:2628
lsm6dso32_reg_t::sensor_hub_4
lsm6dso32_sensor_hub_4_t sensor_hub_4
Definition lsm6dso32_reg.h:2600
lsm6dso32_reg_t::fifo_status1
lsm6dso32_fifo_status1_t fifo_status1
Definition lsm6dso32_reg.h:2540
lsm6dso32_reg_t::slv2_subadd
lsm6dso32_slv2_subadd_t slv2_subadd
Definition lsm6dso32_reg.h:2623
lsm6dso32_reg_t::fsm_outs1
lsm6dso32_fsm_outs1_t fsm_outs1
Definition lsm6dso32_reg.h:2574
lsm6dso32_reg_t::sensor_hub_18
lsm6dso32_sensor_hub_18_t sensor_hub_18
Definition lsm6dso32_reg.h:2614
lsm6dso32_reg_t::emb_func_odr_cfg_b
lsm6dso32_emb_func_odr_cfg_b_t emb_func_odr_cfg_b
Definition lsm6dso32_reg.h:2590
lsm6dso32_reg_t::page_address
lsm6dso32_page_address_t page_address
Definition lsm6dso32_reg.h:2558
lsm6dso32_reg_t::emb_func_en_b
lsm6dso32_emb_func_en_b_t emb_func_en_b
Definition lsm6dso32_reg.h:2557
lsm6dso32_reg_t::emb_func_init_b
lsm6dso32_emb_func_init_b_t emb_func_init_b
Definition lsm6dso32_reg.h:2593
lsm6dso32_reg_t::pedo_cmd_reg
lsm6dso32_pedo_cmd_reg_t pedo_cmd_reg
Definition lsm6dso32_reg.h:2596
lsm6dso32_reg_t::master_config
lsm6dso32_master_config_t master_config
Definition lsm6dso32_reg.h:2615
lsm6dso32_reg_t::emb_func_int1
lsm6dso32_emb_func_int1_t emb_func_int1
Definition lsm6dso32_reg.h:2560
lsm6dso32_reg_t::ctrl10_c
lsm6dso32_ctrl10_c_t ctrl10_c
Definition lsm6dso32_reg.h:2534
lsm6dso32_reg_t::tap_cfg1
lsm6dso32_tap_cfg1_t tap_cfg1
Definition lsm6dso32_reg.h:2543
lsm6dso32_reg_t::status_master
lsm6dso32_status_master_t status_master
Definition lsm6dso32_reg.h:2629
lsm6dso32_reg_t::sensor_hub_7
lsm6dso32_sensor_hub_7_t sensor_hub_7
Definition lsm6dso32_reg.h:2603
lsm6dso32_reg_t::fifo_ctrl4
lsm6dso32_fifo_ctrl4_t fifo_ctrl4
Definition lsm6dso32_reg.h:2520
lsm6dso32_reg_t::fsm_long_counter_clear
lsm6dso32_fsm_long_counter_clear_t fsm_long_counter_clear
Definition lsm6dso32_reg.h:2573
lsm6dso32_reg_t::fifo_ctrl3
lsm6dso32_fifo_ctrl3_t fifo_ctrl3
Definition lsm6dso32_reg.h:2519
lsm6dso32_reg_t::mag_cfg_b
lsm6dso32_mag_cfg_b_t mag_cfg_b
Definition lsm6dso32_reg.h:2595
lsm6dso32_reg_t::sensor_hub_14
lsm6dso32_sensor_hub_14_t sensor_hub_14
Definition lsm6dso32_reg.h:2610
lsm6dso32_reg_t::slv0_subadd
lsm6dso32_slv0_subadd_t slv0_subadd
Definition lsm6dso32_reg.h:2617
lsm6dso32_reg_t::page_value
lsm6dso32_page_value_t page_value
Definition lsm6dso32_reg.h:2559
lsm6dso32_reg_t::tap_cfg0
lsm6dso32_tap_cfg0_t tap_cfg0
Definition lsm6dso32_reg.h:2542
lsm6dso32_reg_t::emb_func_init_a
lsm6dso32_emb_func_init_a_t emb_func_init_a
Definition lsm6dso32_reg.h:2592
lsm6dso32_reg_t::slv1_subadd
lsm6dso32_slv1_subadd_t slv1_subadd
Definition lsm6dso32_reg.h:2620
lsm6dso32_reg_t::fifo_ctrl1
lsm6dso32_fifo_ctrl1_t fifo_ctrl1
Definition lsm6dso32_reg.h:2517
lsm6dso32_reg_t::fifo_status2
lsm6dso32_fifo_status2_t fifo_status2
Definition lsm6dso32_reg.h:2541
lsm6dso32_reg_t::emb_func_src
lsm6dso32_emb_func_src_t emb_func_src
Definition lsm6dso32_reg.h:2591
lsm6dso32_reg_t::fsm_outs7
lsm6dso32_fsm_outs7_t fsm_outs7
Definition lsm6dso32_reg.h:2580
lsm6dso32_reg_t::sensor_hub_3
lsm6dso32_sensor_hub_3_t sensor_hub_3
Definition lsm6dso32_reg.h:2599
lsm6dso32_reg_t::sensor_hub_8
lsm6dso32_sensor_hub_8_t sensor_hub_8
Definition lsm6dso32_reg.h:2604
lsm6dso32_reg_t::wake_up_ths
lsm6dso32_wake_up_ths_t wake_up_ths
Definition lsm6dso32_reg.h:2547
lsm6dso32_reg_t::fsm_outs4
lsm6dso32_fsm_outs4_t fsm_outs4
Definition lsm6dso32_reg.h:2577
lsm6dso32_reg_t::fsm_outs10
lsm6dso32_fsm_outs10_t fsm_outs10
Definition lsm6dso32_reg.h:2583
lsm6dso32_reg_t::ctrl4_c
lsm6dso32_ctrl4_c_t ctrl4_c
Definition lsm6dso32_reg.h:2528
lsm6dso32_reg_t::fsm_status_a
lsm6dso32_fsm_status_a_t fsm_status_a
Definition lsm6dso32_reg.h:2567
lsm6dso32_reg_t::fsm_int2_a
lsm6dso32_fsm_int2_a_t fsm_int2_a
Definition lsm6dso32_reg.h:2564
lsm6dso32_reg_t::ctrl8_xl
lsm6dso32_ctrl8_xl_t ctrl8_xl
Definition lsm6dso32_reg.h:2532
lsm6dso32_reg_t::tap_src
lsm6dso32_tap_src_t tap_src
Definition lsm6dso32_reg.h:2537
lsm6dso32_reg_t::fsm_int1_b
lsm6dso32_fsm_int1_b_t fsm_int1_b
Definition lsm6dso32_reg.h:2562
lsm6dso32_reg_t::ctrl5_c
lsm6dso32_ctrl5_c_t ctrl5_c
Definition lsm6dso32_reg.h:2529
lsm6dso32_reg_t::fsm_int1_a
lsm6dso32_fsm_int1_a_t fsm_int1_a
Definition lsm6dso32_reg.h:2561
lsm6dso32_reg_t::md1_cfg
lsm6dso32_md1_cfg_t md1_cfg
Definition lsm6dso32_reg.h:2550
lsm6dso32_reg_t::tap_cfg2
lsm6dso32_tap_cfg2_t tap_cfg2
Definition lsm6dso32_reg.h:2544
lsm6dso32_reg_t::i3c_bus_avb
lsm6dso32_i3c_bus_avb_t i3c_bus_avb
Definition lsm6dso32_reg.h:2552
lsm6dso32_reg_t::md2_cfg
lsm6dso32_md2_cfg_t md2_cfg
Definition lsm6dso32_reg.h:2551
lsm6dso32_reg_t::sensor_hub_15
lsm6dso32_sensor_hub_15_t sensor_hub_15
Definition lsm6dso32_reg.h:2611
lsm6dso32_reg_t::sensor_hub_9
lsm6dso32_sensor_hub_9_t sensor_hub_9
Definition lsm6dso32_reg.h:2605
lsm6dso32_reg_t::counter_bdr_reg1
lsm6dso32_counter_bdr_reg1_t counter_bdr_reg1
Definition lsm6dso32_reg.h:2521
lsm6dso32_reg_t::slv2_add
lsm6dso32_slv2_add_t slv2_add
Definition lsm6dso32_reg.h:2622
lsm6dso32_reg_t::slv2_config
lsm6dso32_slv2_config_t slv2_config
Definition lsm6dso32_reg.h:2624
lsm6dso32_reg_t::page_rw
lsm6dso32_page_rw_t page_rw
Definition lsm6dso32_reg.h:2569
lsm6dso32_reg_t::mag_cfg_a
lsm6dso32_mag_cfg_a_t mag_cfg_a
Definition lsm6dso32_reg.h:2594
lsm6dso32_reg_t::sensor_hub_12
lsm6dso32_sensor_hub_12_t sensor_hub_12
Definition lsm6dso32_reg.h:2608
lsm6dso32_reg_t::sensor_hub_16
lsm6dso32_sensor_hub_16_t sensor_hub_16
Definition lsm6dso32_reg.h:2612
lsm6dso32_reg_t::fsm_enable_b
lsm6dso32_fsm_enable_b_t fsm_enable_b
Definition lsm6dso32_reg.h:2572
lsm6dso32_reg_t::slv3_add
lsm6dso32_slv3_add_t slv3_add
Definition lsm6dso32_reg.h:2625
lsm6dso32_reg_t::wake_up_dur
lsm6dso32_wake_up_dur_t wake_up_dur
Definition lsm6dso32_reg.h:2548
lsm6dso32_reg_t::slv0_config
lsm6dso32_slv0_config_t slv0_config
Definition lsm6dso32_reg.h:2618
lsm6dso32_reg_t::slv3_subadd
lsm6dso32_slv3_subadd_t slv3_subadd
Definition lsm6dso32_reg.h:2626
lsm6dso32_reg_t::func_cfg_access
lsm6dso32_func_cfg_access_t func_cfg_access
Definition lsm6dso32_reg.h:2515
lsm6dso32_reg_t::emb_func_int2
lsm6dso32_emb_func_int2_t emb_func_int2
Definition lsm6dso32_reg.h:2563
lsm6dso32_reg_t::fsm_outs16
lsm6dso32_fsm_outs16_t fsm_outs16
Definition lsm6dso32_reg.h:2589
lsm6dso32_reg_t::fsm_outs6
lsm6dso32_fsm_outs6_t fsm_outs6
Definition lsm6dso32_reg.h:2579
lsm6dso32_reg_t::internal_freq_fine
lsm6dso32_internal_freq_fine_t internal_freq_fine
Definition lsm6dso32_reg.h:2553
lsm6dso32_reg_t::bitwise
bitwise_t bitwise
Definition lsm6dso32_reg.h:2630
lsm6dso32_reg_t::int_dur2
lsm6dso32_int_dur2_t int_dur2
Definition lsm6dso32_reg.h:2546
lsm6dso32_reg_t::page_sel
lsm6dso32_page_sel_t page_sel
Definition lsm6dso32_reg.h:2555
lsm6dso32_reg_t::fsm_outs12
lsm6dso32_fsm_outs12_t fsm_outs12
Definition lsm6dso32_reg.h:2585
lsm6dso32_reg_t::all_int_src
lsm6dso32_all_int_src_t all_int_src
Definition lsm6dso32_reg.h:2535
lsm6dso32_reg_t::fifo_data_out_tag
lsm6dso32_fifo_data_out_tag_t fifo_data_out_tag
Definition lsm6dso32_reg.h:2554
lsm6dso32_reg_t::sensor_hub_17
lsm6dso32_sensor_hub_17_t sensor_hub_17
Definition lsm6dso32_reg.h:2613
lsm6dso32_reg_t::ctrl7_g
lsm6dso32_ctrl7_g_t ctrl7_g
Definition lsm6dso32_reg.h:2531
lsm6dso32_reg_t::fsm_outs3
lsm6dso32_fsm_outs3_t fsm_outs3
Definition lsm6dso32_reg.h:2576
lsm6dso32_reg_t::sensor_hub_1
lsm6dso32_sensor_hub_1_t sensor_hub_1
Definition lsm6dso32_reg.h:2597
lsm6dso32_reg_t::emb_func_fifo_cfg
lsm6dso32_emb_func_fifo_cfg_t emb_func_fifo_cfg
Definition lsm6dso32_reg.h:2570
lsm6dso32_reg_t::fsm_outs11
lsm6dso32_fsm_outs11_t fsm_outs11
Definition lsm6dso32_reg.h:2584
lsm6dso32_reg_t::byte
uint8_t byte
Definition lsm6dso32_reg.h:2631
lsm6dso32_reg_t::tap_ths_6d
lsm6dso32_tap_ths_6d_t tap_ths_6d
Definition lsm6dso32_reg.h:2545
lsm6dso32_reg_t::slv3_config
lsm6dso32_slv3_config_t slv3_config
Definition lsm6dso32_reg.h:2627
lsm6dso32_reg_t::fsm_outs5
lsm6dso32_fsm_outs5_t fsm_outs5
Definition lsm6dso32_reg.h:2578
lsm6dso32_reg_t::fifo_ctrl2
lsm6dso32_fifo_ctrl2_t fifo_ctrl2
Definition lsm6dso32_reg.h:2518
lsm6dso32_reg_t::fsm_outs9
lsm6dso32_fsm_outs9_t fsm_outs9
Definition lsm6dso32_reg.h:2582
lsm6dso32_reg_t::fsm_outs2
lsm6dso32_fsm_outs2_t fsm_outs2
Definition lsm6dso32_reg.h:2575
lsm6dso32_reg_t::ctrl1_xl
lsm6dso32_ctrl1_xl_t ctrl1_xl
Definition lsm6dso32_reg.h:2525
lsm6dso32_reg_t::ctrl3_c
lsm6dso32_ctrl3_c_t ctrl3_c
Definition lsm6dso32_reg.h:2527
lsm6dso32_reg_t::fsm_outs13
lsm6dso32_fsm_outs13_t fsm_outs13
Definition lsm6dso32_reg.h:2586
lsm6dso32_reg_t::int1_ctrl
lsm6dso32_int1_ctrl_t int1_ctrl
Definition lsm6dso32_reg.h:2523
lsm6dso32_reg_t::sensor_hub_10
lsm6dso32_sensor_hub_10_t sensor_hub_10
Definition lsm6dso32_reg.h:2606
lsm6dso32_reg_t::sensor_hub_11
lsm6dso32_sensor_hub_11_t sensor_hub_11
Definition lsm6dso32_reg.h:2607
lsm6dso32_reg_t::fsm_outs8
lsm6dso32_fsm_outs8_t fsm_outs8
Definition lsm6dso32_reg.h:2581
lsm6dso32_reg_t::free_fall
lsm6dso32_free_fall_t free_fall
Definition lsm6dso32_reg.h:2549
lsm6dso32_reg_t::fsm_status_b
lsm6dso32_fsm_status_b_t fsm_status_b
Definition lsm6dso32_reg.h:2568
lsm6dso32_reg_t::ctrl9_xl
lsm6dso32_ctrl9_xl_t ctrl9_xl
Definition lsm6dso32_reg.h:2533