This section groups common useful functions. More...

Collaboration diagram for LSM6DSO32_common:

Functions
int32_t	lsm6dso32_odr_cal_reg_set (stmdev_ctx_t *ctx, uint8_t val)
	Difference in percentage of the effective ODR(and timestamp rate) with respect to the typical. Step: 0.15%. 8-bit format, 2's complement.[set].

int32_t	lsm6dso32_odr_cal_reg_get (stmdev_ctx_t ctx, uint8_t val)
	Difference in percentage of the effective ODR(and timestamp rate) with respect to the typical. Step: 0.15%. 8-bit format, 2's complement.[get].

int32_t	lsm6dso32_mem_bank_set (stmdev_ctx_t *ctx, lsm6dso32_reg_access_t val)
	Enable access to the embedded functions/sensor hub configuration registers.[set].

int32_t	lsm6dso32_mem_bank_get (stmdev_ctx_t ctx, lsm6dso32_reg_access_t val)
	Enable access to the embedded functions/sensor hub configuration registers.[get].

int32_t	lsm6dso32_ln_pg_write_byte (stmdev_ctx_t ctx, uint16_t address, uint8_t val)
	Write a line(byte) in a page.[set].

int32_t	lsm6dso32_ln_pg_write (stmdev_ctx_t ctx, uint16_t address, uint8_t buf, uint8_t len)
	Write buffer in a page.[set].

int32_t	lsm6dso32_ln_pg_read_byte (stmdev_ctx_t ctx, uint16_t address, uint8_t val)
	Read a line(byte) in a page.[get].

int32_t	lsm6dso32_data_ready_mode_set (stmdev_ctx_t *ctx, lsm6dso32_dataready_pulsed_t val)
	Data-ready pulsed / letched mode.[set].

int32_t	lsm6dso32_data_ready_mode_get (stmdev_ctx_t ctx, lsm6dso32_dataready_pulsed_t val)
	Data-ready pulsed / letched mode.[get].

int32_t	lsm6dso32_device_id_get (stmdev_ctx_t ctx, uint8_t buff)
	Device "Who am I".[get].

int32_t	lsm6dso32_reset_set (stmdev_ctx_t *ctx, uint8_t val)
	Software reset. Restore the default values in user registers[set].

int32_t	lsm6dso32_reset_get (stmdev_ctx_t ctx, uint8_t val)
	Software reset. Restore the default values in user registers.[get].

int32_t	lsm6dso32_auto_increment_set (stmdev_ctx_t *ctx, uint8_t val)
	Register address automatically incremented during a multiple byte access with a serial interface.[set].

int32_t	lsm6dso32_auto_increment_get (stmdev_ctx_t ctx, uint8_t val)
	Register address automatically incremented during a multiple byte access with a serial interface.[get].

int32_t	lsm6dso32_boot_set (stmdev_ctx_t *ctx, uint8_t val)
	Reboot memory content. Reload the calibration parameters.[set].

int32_t	lsm6dso32_boot_get (stmdev_ctx_t ctx, uint8_t val)
	Reboot memory content. Reload the calibration parameters.[get].

int32_t	lsm6dso32_xl_self_test_set (stmdev_ctx_t *ctx, lsm6dso32_st_xl_t val)
	Linear acceleration sensor self-test enable.[set].

int32_t	lsm6dso32_xl_self_test_get (stmdev_ctx_t ctx, lsm6dso32_st_xl_t val)
	Linear acceleration sensor self-test enable.[get].

int32_t	lsm6dso32_gy_self_test_set (stmdev_ctx_t *ctx, lsm6dso32_st_g_t val)
	Angular rate sensor self-test enable.[set].

int32_t	lsm6dso32_gy_self_test_get (stmdev_ctx_t ctx, lsm6dso32_st_g_t val)
	Angular rate sensor self-test enable.[get].

Detailed Description

This section groups common useful functions.

Function Documentation

◆ lsm6dso32_auto_increment_get()

int32_t lsm6dso32_auto_increment_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

Register address automatically incremented during a multiple byte access with a serial interface.[get].

Parameters

ctx	read / write interface definitions
val	change the values of if_inc in reg CTRL3_C

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 1953 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl3_c_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL3_C, (uint8_t *)&reg, 1);
  *val = reg.if_inc;
 
  return ret;
}

References lsm6dso32_ctrl3_c_t::if_inc, LSM6DSO32_CTRL3_C, and lsm6dso32_read_reg().

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◆ lsm6dso32_auto_increment_set()

int32_t lsm6dso32_auto_increment_set	(	stmdev_ctx_t *	ctx,
		uint8_t	val
	)

Register address automatically incremented during a multiple byte access with a serial interface.[set].

Parameters

ctx	read / write interface definitions
val	change the values of if_inc in reg CTRL3_C

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 1928 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl3_c_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL3_C, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.if_inc = val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_CTRL3_C, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References lsm6dso32_ctrl3_c_t::if_inc, LSM6DSO32_CTRL3_C, lsm6dso32_read_reg(), and lsm6dso32_write_reg().

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◆ lsm6dso32_boot_get()

int32_t lsm6dso32_boot_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

Reboot memory content. Reload the calibration parameters.[get].

Parameters

ctx	read / write interface definitions
val	change the values of boot in reg CTRL3_C

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 1996 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl3_c_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL3_C, (uint8_t *)&reg, 1);
  *val = reg.boot;
 
  return ret;
}

References lsm6dso32_ctrl3_c_t::boot, LSM6DSO32_CTRL3_C, and lsm6dso32_read_reg().

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◆ lsm6dso32_boot_set()

int32_t lsm6dso32_boot_set	(	stmdev_ctx_t *	ctx,
		uint8_t	val
	)

Reboot memory content. Reload the calibration parameters.[set].

Parameters

ctx	read / write interface definitions
val	change the values of boot in reg CTRL3_C

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 1972 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl3_c_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL3_C, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.boot = val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_CTRL3_C, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References lsm6dso32_ctrl3_c_t::boot, LSM6DSO32_CTRL3_C, lsm6dso32_read_reg(), and lsm6dso32_write_reg().

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◆ lsm6dso32_data_ready_mode_get()

int32_t lsm6dso32_data_ready_mode_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_dataready_pulsed_t *	val
	)

Data-ready pulsed / letched mode.[get].

Parameters

ctx	read / write interface definitions
val	Get the values of dataready_pulsed in reg COUNTER_BDR_REG1

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 1831 of file lsm6dso32_reg.c.

{
  lsm6dso32_counter_bdr_reg1_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_COUNTER_BDR_REG1,
                           (uint8_t *)&reg, 1);
 
  switch (reg.dataready_pulsed)
  {
    case LSM6DSO32_DRDY_LATCHED:
      *val = LSM6DSO32_DRDY_LATCHED;
      break;
 
    case LSM6DSO32_DRDY_PULSED:
      *val = LSM6DSO32_DRDY_PULSED;
      break;
 
    default:
      *val = LSM6DSO32_DRDY_LATCHED;
      break;
  }
 
  return ret;
}

References lsm6dso32_counter_bdr_reg1_t::dataready_pulsed, LSM6DSO32_COUNTER_BDR_REG1, LSM6DSO32_DRDY_LATCHED, LSM6DSO32_DRDY_PULSED, and lsm6dso32_read_reg().

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◆ lsm6dso32_data_ready_mode_set()

int32_t lsm6dso32_data_ready_mode_set	(	stmdev_ctx_t *	ctx,
		lsm6dso32_dataready_pulsed_t	val
	)

Data-ready pulsed / letched mode.[set].

Parameters

ctx	read / write interface definitions
val	change the values of dataready_pulsed in reg COUNTER_BDR_REG1

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 1802 of file lsm6dso32_reg.c.

{
  lsm6dso32_counter_bdr_reg1_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_COUNTER_BDR_REG1,
                           (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.dataready_pulsed = (uint8_t)val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_COUNTER_BDR_REG1,
                              (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References lsm6dso32_counter_bdr_reg1_t::dataready_pulsed, LSM6DSO32_COUNTER_BDR_REG1, lsm6dso32_read_reg(), and lsm6dso32_write_reg().

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◆ lsm6dso32_device_id_get()

int32_t lsm6dso32_device_id_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	buff
	)

Device "Who am I".[get].

Parameters

ctx	read / write interface definitions
buff	buffer that stores data read

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 1866 of file lsm6dso32_reg.c.

{
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_WHO_AM_I, buff, 1);
 
  return ret;
}

References lsm6dso32_read_reg(), and LSM6DSO32_WHO_AM_I.

Referenced by init_imuB(), and init_imup().

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◆ lsm6dso32_gy_self_test_get()

int32_t lsm6dso32_gy_self_test_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_st_g_t *	val
	)

Angular rate sensor self-test enable.[get].

Parameters

ctx	read / write interface definitions
val	Get the values of st_g in reg CTRL5_C

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 2103 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl5_c_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL5_C, (uint8_t *)&reg, 1);
 
  switch (reg.st_g)
  {
    case LSM6DSO32_GY_ST_DISABLE:
      *val = LSM6DSO32_GY_ST_DISABLE;
      break;
 
    case LSM6DSO32_GY_ST_POSITIVE:
      *val = LSM6DSO32_GY_ST_POSITIVE;
      break;
 
    case LSM6DSO32_GY_ST_NEGATIVE:
      *val = LSM6DSO32_GY_ST_NEGATIVE;
      break;
 
    default:
      *val = LSM6DSO32_GY_ST_DISABLE;
      break;
  }
 
  return ret;
}

References LSM6DSO32_CTRL5_C, LSM6DSO32_GY_ST_DISABLE, LSM6DSO32_GY_ST_NEGATIVE, LSM6DSO32_GY_ST_POSITIVE, lsm6dso32_read_reg(), and lsm6dso32_ctrl5_c_t::st_g.

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◆ lsm6dso32_gy_self_test_set()

int32_t lsm6dso32_gy_self_test_set	(	stmdev_ctx_t *	ctx,
		lsm6dso32_st_g_t	val
	)

Angular rate sensor self-test enable.[set].

Parameters

ctx	read / write interface definitions
val	change the values of st_g in reg CTRL5_C

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 2078 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl5_c_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL5_C, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.st_g = (uint8_t)val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_CTRL5_C, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References LSM6DSO32_CTRL5_C, lsm6dso32_read_reg(), lsm6dso32_write_reg(), and lsm6dso32_ctrl5_c_t::st_g.

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◆ lsm6dso32_ln_pg_read_byte()

int32_t lsm6dso32_ln_pg_read_byte	(	stmdev_ctx_t *	ctx,
		uint16_t	address,
		uint8_t *	val
	)

Read a line(byte) in a page.[get].

Parameters

ctx	read / write interface definitions
uint8_t	address: page line address
val	read value

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 1725 of file lsm6dso32_reg.c.

{
  lsm6dso32_page_rw_t page_rw;
  lsm6dso32_page_sel_t page_sel;
  lsm6dso32_page_address_t  page_address;
  int32_t ret;
 
  ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_EMBEDDED_FUNC_BANK);
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_PAGE_RW, (uint8_t *) &page_rw, 1);
  }
 
  if (ret == 0)
  {
    page_rw.page_rw = 0x01; /* page_read enable*/
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_PAGE_RW,
                              (uint8_t *) &page_rw, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_PAGE_SEL,
                             (uint8_t *) &page_sel, 1);
  }
 
  if (ret == 0)
  {
    page_sel.page_sel = ((uint8_t)(address >> 8) & 0x0FU);
    page_sel.not_used_01 = 1;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_PAGE_SEL,
                              (uint8_t *) &page_sel, 1);
  }
 
  if (ret == 0)
  {
    page_address.page_addr = (uint8_t)address & 0x00FFU;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_PAGE_ADDRESS,
                              (uint8_t *)&page_address, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_PAGE_VALUE, val, 2);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_PAGE_RW, (uint8_t *) &page_rw, 1);
  }
 
  if (ret == 0)
  {
    page_rw.page_rw = 0x00; /* page_read disable */
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_PAGE_RW,
                              (uint8_t *) &page_rw, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_USER_BANK);
  }
 
  return ret;
}

References LSM6DSO32_EMBEDDED_FUNC_BANK, lsm6dso32_mem_bank_set(), LSM6DSO32_PAGE_ADDRESS, LSM6DSO32_PAGE_RW, LSM6DSO32_PAGE_SEL, LSM6DSO32_PAGE_VALUE, lsm6dso32_read_reg(), LSM6DSO32_USER_BANK, lsm6dso32_write_reg(), lsm6dso32_page_sel_t::not_used_01, lsm6dso32_page_address_t::page_addr, lsm6dso32_page_rw_t::page_rw, and lsm6dso32_page_sel_t::page_sel.

Referenced by lsm6dso32_fsm_number_of_programs_get(), lsm6dso32_fsm_start_address_get(), lsm6dso32_long_cnt_int_value_get(), lsm6dso32_mag_offset_get(), lsm6dso32_mag_sensitivity_get(), lsm6dso32_mag_soft_iron_get(), lsm6dso32_mag_x_orient_get(), lsm6dso32_mag_x_orient_set(), lsm6dso32_mag_y_orient_get(), lsm6dso32_mag_y_orient_set(), lsm6dso32_mag_z_orient_get(), lsm6dso32_mag_z_orient_set(), lsm6dso32_pedo_debounce_steps_get(), lsm6dso32_pedo_int_mode_get(), lsm6dso32_pedo_int_mode_set(), lsm6dso32_pedo_sens_get(), lsm6dso32_pedo_sens_set(), and lsm6dso32_pedo_steps_period_get().

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◆ lsm6dso32_ln_pg_write()

int32_t lsm6dso32_ln_pg_write	(	stmdev_ctx_t *	ctx,
		uint16_t	address,
		uint8_t *	buf,
		uint8_t	len
	)

Write buffer in a page.[set].

Parameters

ctx	read / write interface definitions
uint8_t	address: page line address
uint8_t	*buf: buffer to write
uint8_t	len: buffer len

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 1619 of file lsm6dso32_reg.c.

{
  lsm6dso32_page_rw_t page_rw;
  lsm6dso32_page_sel_t page_sel;
  lsm6dso32_page_address_t  page_address;
  int32_t ret;
 
  uint8_t msb, lsb;
  uint8_t i ;
  msb = ((uint8_t)(address >> 8) & 0x0FU);
  lsb = (uint8_t)address & 0xFFU;
  ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_EMBEDDED_FUNC_BANK);
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_PAGE_RW, (uint8_t *) &page_rw, 1);
  }
 
  if (ret == 0)
  {
    page_rw.page_rw = 0x02; /* page_write enable*/
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_PAGE_RW,
                              (uint8_t *) &page_rw, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_PAGE_SEL,
                             (uint8_t *) &page_sel, 1);
  }
 
  if (ret == 0)
  {
    page_sel.page_sel = msb;
    page_sel.not_used_01 = 1;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_PAGE_SEL,
                              (uint8_t *) &page_sel, 1);
  }
 
  if (ret == 0)
  {
    page_address.page_addr = lsb;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_PAGE_ADDRESS,
                              (uint8_t *)&page_address, 1);
  }
 
  if (ret == 0)
  {
    for (i = 0; ((i < len) && (ret == 0)); i++)
    {
      ret = lsm6dso32_write_reg(ctx, LSM6DSO32_PAGE_VALUE, &buf[i], 1);
 
      /* Check if page wrap */
      if ((lsb == 0x00U) && (ret == 0))
      {
        lsb++;
        msb++;
        ret = lsm6dso32_read_reg(ctx, LSM6DSO32_PAGE_SEL,
                                 (uint8_t *)&page_sel, 1);
 
        if (ret == 0)
        {
          page_sel.page_sel = msb;
          page_sel.not_used_01 = 1;
          ret = lsm6dso32_write_reg(ctx, LSM6DSO32_PAGE_SEL,
                                    (uint8_t *)&page_sel, 1);
        }
      }
    }
 
    page_sel.page_sel = 0;
    page_sel.not_used_01 = 1;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_PAGE_SEL,
                              (uint8_t *) &page_sel, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_PAGE_RW, (uint8_t *) &page_rw, 1);
  }
 
  if (ret == 0)
  {
    page_rw.page_rw = 0x00; /* page_write disable */
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_PAGE_RW,
                              (uint8_t *) &page_rw, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_USER_BANK);
  }
 
  return ret;
}

References LSM6DSO32_EMBEDDED_FUNC_BANK, lsm6dso32_mem_bank_set(), LSM6DSO32_PAGE_ADDRESS, LSM6DSO32_PAGE_RW, LSM6DSO32_PAGE_SEL, LSM6DSO32_PAGE_VALUE, lsm6dso32_read_reg(), LSM6DSO32_USER_BANK, lsm6dso32_write_reg(), lsm6dso32_page_sel_t::not_used_01, lsm6dso32_page_address_t::page_addr, lsm6dso32_page_rw_t::page_rw, and lsm6dso32_page_sel_t::page_sel.

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◆ lsm6dso32_ln_pg_write_byte()

int32_t lsm6dso32_ln_pg_write_byte	(	stmdev_ctx_t *	ctx,
		uint16_t	address,
		uint8_t *	val
	)

Write a line(byte) in a page.[set].

Parameters

ctx	read / write interface definitions
uint8_t	address: page line address
val	value to write

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 1540 of file lsm6dso32_reg.c.

{
  lsm6dso32_page_rw_t page_rw;
  lsm6dso32_page_sel_t page_sel;
  lsm6dso32_page_address_t page_address;
  int32_t ret;
 
  ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_EMBEDDED_FUNC_BANK);
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_PAGE_RW, (uint8_t *) &page_rw, 1);
  }
 
  if (ret == 0)
  {
    page_rw.page_rw = 0x02; /* page_write enable */
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_PAGE_RW,
                              (uint8_t *) &page_rw, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_PAGE_SEL,
                             (uint8_t *) &page_sel, 1);
  }
 
  if (ret == 0)
  {
    page_sel.page_sel = ((uint8_t)(address >> 8) & 0x0FU);
    page_sel.not_used_01 = 1;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_PAGE_SEL,
                              (uint8_t *) &page_sel, 1);
  }
 
  if (ret == 0)
  {
    page_address.page_addr = (uint8_t)address & 0xFFU;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_PAGE_ADDRESS,
                              (uint8_t *)&page_address, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_PAGE_VALUE, val, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_PAGE_RW, (uint8_t *) &page_rw, 1);
  }
 
  if (ret == 0)
  {
    page_rw.page_rw = 0x00; /* page_write disable */
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_PAGE_RW,
                              (uint8_t *) &page_rw, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_USER_BANK);
  }
 
  return ret;
}

References LSM6DSO32_EMBEDDED_FUNC_BANK, lsm6dso32_mem_bank_set(), LSM6DSO32_PAGE_ADDRESS, LSM6DSO32_PAGE_RW, LSM6DSO32_PAGE_SEL, LSM6DSO32_PAGE_VALUE, lsm6dso32_read_reg(), LSM6DSO32_USER_BANK, lsm6dso32_write_reg(), lsm6dso32_page_sel_t::not_used_01, lsm6dso32_page_address_t::page_addr, lsm6dso32_page_rw_t::page_rw, and lsm6dso32_page_sel_t::page_sel.

Referenced by lsm6dso32_fsm_number_of_programs_set(), lsm6dso32_fsm_start_address_set(), lsm6dso32_long_cnt_int_value_set(), lsm6dso32_mag_offset_set(), lsm6dso32_mag_sensitivity_set(), lsm6dso32_mag_soft_iron_set(), lsm6dso32_mag_x_orient_set(), lsm6dso32_mag_y_orient_set(), lsm6dso32_mag_z_orient_set(), lsm6dso32_pedo_debounce_steps_set(), lsm6dso32_pedo_int_mode_set(), lsm6dso32_pedo_sens_set(), and lsm6dso32_pedo_steps_period_set().

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◆ lsm6dso32_mem_bank_get()

int32_t lsm6dso32_mem_bank_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_reg_access_t *	val
	)

Enable access to the embedded functions/sensor hub configuration registers.[get].

Parameters

ctx	read / write interface definitions
val	Get the values of reg_access in reg FUNC_CFG_ACCESS

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 1500 of file lsm6dso32_reg.c.

{
  lsm6dso32_func_cfg_access_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FUNC_CFG_ACCESS,
                           (uint8_t *)&reg, 1);
 
  switch (reg.reg_access)
  {
    case LSM6DSO32_USER_BANK:
      *val = LSM6DSO32_USER_BANK;
      break;
 
    case LSM6DSO32_SENSOR_HUB_BANK:
      *val = LSM6DSO32_SENSOR_HUB_BANK;
      break;
 
    case LSM6DSO32_EMBEDDED_FUNC_BANK:
      *val = LSM6DSO32_EMBEDDED_FUNC_BANK;
      break;
 
    default:
      *val = LSM6DSO32_USER_BANK;
      break;
  }
 
  return ret;
}

References LSM6DSO32_EMBEDDED_FUNC_BANK, LSM6DSO32_FUNC_CFG_ACCESS, lsm6dso32_read_reg(), LSM6DSO32_SENSOR_HUB_BANK, LSM6DSO32_USER_BANK, and lsm6dso32_func_cfg_access_t::reg_access.

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◆ lsm6dso32_mem_bank_set()

int32_t lsm6dso32_mem_bank_set	(	stmdev_ctx_t *	ctx,
		lsm6dso32_reg_access_t	val
	)

Enable access to the embedded functions/sensor hub configuration registers.[set].

Parameters

ctx	read / write interface definitions
val	change the values of reg_access in reg FUNC_CFG_ACCESS

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 1472 of file lsm6dso32_reg.c.

{
  lsm6dso32_func_cfg_access_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FUNC_CFG_ACCESS,
                           (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.reg_access = (uint8_t)val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_FUNC_CFG_ACCESS,
                              (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References LSM6DSO32_FUNC_CFG_ACCESS, lsm6dso32_read_reg(), lsm6dso32_write_reg(), and lsm6dso32_func_cfg_access_t::reg_access.

Referenced by lsm6dso32_all_sources_get(), lsm6dso32_compression_algo_init_get(), lsm6dso32_compression_algo_init_set(), lsm6dso32_compression_algo_set(), lsm6dso32_emb_fsm_en_get(), lsm6dso32_emb_fsm_en_set(), lsm6dso32_fifo_pedo_batch_get(), lsm6dso32_fifo_pedo_batch_set(), lsm6dso32_fsm_data_rate_get(), lsm6dso32_fsm_data_rate_set(), lsm6dso32_fsm_enable_get(), lsm6dso32_fsm_enable_set(), lsm6dso32_fsm_init_get(), lsm6dso32_fsm_init_set(), lsm6dso32_fsm_out_get(), lsm6dso32_int_notification_get(), lsm6dso32_int_notification_set(), lsm6dso32_ln_pg_read_byte(), lsm6dso32_ln_pg_write(), lsm6dso32_ln_pg_write_byte(), lsm6dso32_long_clr_get(), lsm6dso32_long_clr_set(), lsm6dso32_long_cnt_flag_data_ready_get(), lsm6dso32_long_cnt_get(), lsm6dso32_long_cnt_set(), lsm6dso32_motion_flag_data_ready_get(), lsm6dso32_motion_sens_get(), lsm6dso32_motion_sens_set(), lsm6dso32_number_of_steps_get(), lsm6dso32_pedo_sens_get(), lsm6dso32_pedo_sens_set(), lsm6dso32_pedo_step_detect_get(), lsm6dso32_pin_int1_route_get(), lsm6dso32_pin_int1_route_set(), lsm6dso32_pin_int2_route_get(), lsm6dso32_pin_int2_route_set(), lsm6dso32_sh_batch_slave_0_get(), lsm6dso32_sh_batch_slave_0_set(), lsm6dso32_sh_batch_slave_1_get(), lsm6dso32_sh_batch_slave_1_set(), lsm6dso32_sh_batch_slave_2_get(), lsm6dso32_sh_batch_slave_2_set(), lsm6dso32_sh_batch_slave_3_get(), lsm6dso32_sh_batch_slave_3_set(), lsm6dso32_sh_cfg_write(), lsm6dso32_sh_data_rate_get(), lsm6dso32_sh_data_rate_set(), lsm6dso32_sh_master_get(), lsm6dso32_sh_master_set(), lsm6dso32_sh_pass_through_get(), lsm6dso32_sh_pass_through_set(), lsm6dso32_sh_pin_mode_get(), lsm6dso32_sh_pin_mode_set(), lsm6dso32_sh_read_data_raw_get(), lsm6dso32_sh_reset_get(), lsm6dso32_sh_reset_set(), lsm6dso32_sh_slave_connected_get(), lsm6dso32_sh_slave_connected_set(), lsm6dso32_sh_slv0_cfg_read(), lsm6dso32_sh_slv1_cfg_read(), lsm6dso32_sh_slv2_cfg_read(), lsm6dso32_sh_slv3_cfg_read(), lsm6dso32_sh_status_get(), lsm6dso32_sh_syncro_mode_get(), lsm6dso32_sh_syncro_mode_set(), lsm6dso32_sh_write_mode_get(), lsm6dso32_sh_write_mode_set(), lsm6dso32_steps_reset(), lsm6dso32_tilt_flag_data_ready_get(), lsm6dso32_tilt_sens_get(), and lsm6dso32_tilt_sens_set().

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◆ lsm6dso32_odr_cal_reg_get()

int32_t lsm6dso32_odr_cal_reg_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

Difference in percentage of the effective ODR(and timestamp rate) with respect to the typical. Step: 0.15%. 8-bit format, 2's complement.[get].

Parameters

ctx	read / write interface definitions
val	change the values of freq_fine in reg INTERNAL_FREQ_FINE

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 1450 of file lsm6dso32_reg.c.

{
  lsm6dso32_internal_freq_fine_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_INTERNAL_FREQ_FINE,
                           (uint8_t *)&reg, 1);
  *val = reg.freq_fine;
 
  return ret;
}

References lsm6dso32_internal_freq_fine_t::freq_fine, LSM6DSO32_INTERNAL_FREQ_FINE, and lsm6dso32_read_reg().

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◆ lsm6dso32_odr_cal_reg_set()

int32_t lsm6dso32_odr_cal_reg_set	(	stmdev_ctx_t *	ctx,
		uint8_t	val
	)

Difference in percentage of the effective ODR(and timestamp rate) with respect to the typical. Step: 0.15%. 8-bit format, 2's complement.[set].

Parameters

ctx	read / write interface definitions
val	change the values of freq_fine in reg INTERNAL_FREQ_FINE

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 1422 of file lsm6dso32_reg.c.

{
  lsm6dso32_internal_freq_fine_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_INTERNAL_FREQ_FINE,
                           (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.freq_fine = val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_INTERNAL_FREQ_FINE,
                              (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References lsm6dso32_internal_freq_fine_t::freq_fine, LSM6DSO32_INTERNAL_FREQ_FINE, lsm6dso32_read_reg(), and lsm6dso32_write_reg().

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◆ lsm6dso32_reset_get()

int32_t lsm6dso32_reset_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

Software reset. Restore the default values in user registers.[get].

Parameters

ctx	read / write interface definitions
val	change the values of sw_reset in reg CTRL3_C

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 1908 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl3_c_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL3_C, (uint8_t *)&reg, 1);
  *val = reg.sw_reset;
 
  return ret;
}

References LSM6DSO32_CTRL3_C, lsm6dso32_read_reg(), and lsm6dso32_ctrl3_c_t::sw_reset.

Referenced by init_imuB(), and init_imup().

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◆ lsm6dso32_reset_set()

int32_t lsm6dso32_reset_set	(	stmdev_ctx_t *	ctx,
		uint8_t	val
	)

Software reset. Restore the default values in user registers[set].

Parameters

ctx	read / write interface definitions
val	change the values of sw_reset in reg CTRL3_C

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 1884 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl3_c_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL3_C, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.sw_reset = val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_CTRL3_C, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References LSM6DSO32_CTRL3_C, lsm6dso32_read_reg(), lsm6dso32_write_reg(), and lsm6dso32_ctrl3_c_t::sw_reset.

Referenced by init_imuB(), and init_imup().

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◆ lsm6dso32_xl_self_test_get()

int32_t lsm6dso32_xl_self_test_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_st_xl_t *	val
	)

Linear acceleration sensor self-test enable.[get].

Parameters

ctx	read / write interface definitions
val	Get the values of st_xl in reg CTRL5_C

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 2040 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl5_c_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL5_C, (uint8_t *)&reg, 1);
 
  switch (reg.st_xl)
  {
    case LSM6DSO32_XL_ST_DISABLE:
      *val = LSM6DSO32_XL_ST_DISABLE;
      break;
 
    case LSM6DSO32_XL_ST_POSITIVE:
      *val = LSM6DSO32_XL_ST_POSITIVE;
      break;
 
    case LSM6DSO32_XL_ST_NEGATIVE:
      *val = LSM6DSO32_XL_ST_NEGATIVE;
      break;
 
    default:
      *val = LSM6DSO32_XL_ST_DISABLE;
      break;
  }
 
  return ret;
}

References LSM6DSO32_CTRL5_C, lsm6dso32_read_reg(), LSM6DSO32_XL_ST_DISABLE, LSM6DSO32_XL_ST_NEGATIVE, LSM6DSO32_XL_ST_POSITIVE, and lsm6dso32_ctrl5_c_t::st_xl.

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◆ lsm6dso32_xl_self_test_set()

int32_t lsm6dso32_xl_self_test_set	(	stmdev_ctx_t *	ctx,
		lsm6dso32_st_xl_t	val
	)

Linear acceleration sensor self-test enable.[set].

Parameters

ctx	read / write interface definitions
val	change the values of st_xl in reg CTRL5_C

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 2015 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl5_c_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL5_C, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.st_xl = (uint8_t)val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_CTRL5_C, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References LSM6DSO32_CTRL5_C, lsm6dso32_read_reg(), lsm6dso32_write_reg(), and lsm6dso32_ctrl5_c_t::st_xl.

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Functions

Detailed Description

Function Documentation

◆ lsm6dso32_auto_increment_get()

◆ lsm6dso32_auto_increment_set()

◆ lsm6dso32_boot_get()

◆ lsm6dso32_boot_set()

◆ lsm6dso32_data_ready_mode_get()

◆ lsm6dso32_data_ready_mode_set()

◆ lsm6dso32_device_id_get()

◆ lsm6dso32_gy_self_test_get()

◆ lsm6dso32_gy_self_test_set()

◆ lsm6dso32_ln_pg_read_byte()

◆ lsm6dso32_ln_pg_write()

◆ lsm6dso32_ln_pg_write_byte()

◆ lsm6dso32_mem_bank_get()

◆ lsm6dso32_mem_bank_set()

◆ lsm6dso32_odr_cal_reg_get()

◆ lsm6dso32_odr_cal_reg_set()

◆ lsm6dso32_reset_get()

◆ lsm6dso32_reset_set()

◆ lsm6dso32_xl_self_test_get()

◆ lsm6dso32_xl_self_test_set()