Da Vinci Firmware 1
Firmware for the DaVinci-M rocket avionics board.
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Data Structures | Macros | Typedefs | Enumerations | Functions
lsm6dso32_reg.h File Reference

This file contains all the functions prototypes for the lsm6dso32_reg.c driver. More...

#include <stdint.h>
#include <stddef.h>
#include <math.h>
Include dependency graph for lsm6dso32_reg.h:
This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

Data Structures

struct  bitwise_t
 
struct  stmdev_ctx_t
 
struct  ucf_line_t
 
struct  lsm6dso32_func_cfg_access_t
 
struct  lsm6dso32_pin_ctrl_t
 
struct  lsm6dso32_fifo_ctrl1_t
 
struct  lsm6dso32_fifo_ctrl2_t
 
struct  lsm6dso32_fifo_ctrl3_t
 
struct  lsm6dso32_fifo_ctrl4_t
 
struct  lsm6dso32_counter_bdr_reg1_t
 
struct  lsm6dso32_counter_bdr_reg2_t
 
struct  lsm6dso32_int1_ctrl_t
 
struct  lsm6dso32_int2_ctrl_t
 
struct  lsm6dso32_ctrl1_xl_t
 
struct  lsm6dso32_ctrl2_g_t
 
struct  lsm6dso32_ctrl3_c_t
 
struct  lsm6dso32_ctrl4_c_t
 
struct  lsm6dso32_ctrl5_c_t
 
struct  lsm6dso32_ctrl6_c_t
 
struct  lsm6dso32_ctrl7_g_t
 
struct  lsm6dso32_ctrl8_xl_t
 
struct  lsm6dso32_ctrl9_xl_t
 
struct  lsm6dso32_ctrl10_c_t
 
struct  lsm6dso32_all_int_src_t
 
struct  lsm6dso32_wake_up_src_t
 
struct  lsm6dso32_tap_src_t
 
struct  lsm6dso32_d6d_src_t
 
struct  lsm6dso32_status_reg_t
 
struct  lsm6dso32_emb_func_status_mainpage_t
 
struct  lsm6dso32_fsm_status_a_mainpage_t
 
struct  lsm6dso32_fsm_status_b_mainpage_t
 
struct  lsm6dso32_status_master_mainpage_t
 
struct  lsm6dso32_fifo_status1_t
 
struct  lsm6dso32_fifo_status2_t
 
struct  lsm6dso32_tap_cfg0_t
 
struct  lsm6dso32_tap_cfg1_t
 
struct  lsm6dso32_tap_cfg2_t
 
struct  lsm6dso32_tap_ths_6d_t
 
struct  lsm6dso32_int_dur2_t
 
struct  lsm6dso32_wake_up_ths_t
 
struct  lsm6dso32_wake_up_dur_t
 
struct  lsm6dso32_free_fall_t
 
struct  lsm6dso32_md1_cfg_t
 
struct  lsm6dso32_md2_cfg_t
 
struct  lsm6dso32_i3c_bus_avb_t
 
struct  lsm6dso32_internal_freq_fine_t
 
struct  lsm6dso32_fifo_data_out_tag_t
 
struct  lsm6dso32_page_sel_t
 
struct  lsm6dso32_emb_func_en_a_t
 
struct  lsm6dso32_emb_func_en_b_t
 
struct  lsm6dso32_page_address_t
 
struct  lsm6dso32_page_value_t
 
struct  lsm6dso32_emb_func_int1_t
 
struct  lsm6dso32_fsm_int1_a_t
 
struct  lsm6dso32_fsm_int1_b_t
 
struct  lsm6dso32_emb_func_int2_t
 
struct  lsm6dso32_fsm_int2_a_t
 
struct  lsm6dso32_fsm_int2_b_t
 
struct  lsm6dso32_emb_func_status_t
 
struct  lsm6dso32_fsm_status_a_t
 
struct  lsm6dso32_fsm_status_b_t
 
struct  lsm6dso32_page_rw_t
 
struct  lsm6dso32_emb_func_fifo_cfg_t
 
struct  lsm6dso32_fsm_enable_a_t
 
struct  lsm6dso32_fsm_enable_b_t
 
struct  lsm6dso32_fsm_long_counter_clear_t
 
struct  lsm6dso32_fsm_outs1_t
 
struct  lsm6dso32_fsm_outs2_t
 
struct  lsm6dso32_fsm_outs3_t
 
struct  lsm6dso32_fsm_outs4_t
 
struct  lsm6dso32_fsm_outs5_t
 
struct  lsm6dso32_fsm_outs6_t
 
struct  lsm6dso32_fsm_outs7_t
 
struct  lsm6dso32_fsm_outs8_t
 
struct  lsm6dso32_fsm_outs9_t
 
struct  lsm6dso32_fsm_outs10_t
 
struct  lsm6dso32_fsm_outs11_t
 
struct  lsm6dso32_fsm_outs12_t
 
struct  lsm6dso32_fsm_outs13_t
 
struct  lsm6dso32_fsm_outs14_t
 
struct  lsm6dso32_fsm_outs15_t
 
struct  lsm6dso32_fsm_outs16_t
 
struct  lsm6dso32_emb_func_odr_cfg_b_t
 
struct  lsm6dso32_emb_func_src_t
 
struct  lsm6dso32_emb_func_init_a_t
 
struct  lsm6dso32_emb_func_init_b_t
 
struct  lsm6dso32_mag_cfg_a_t
 
struct  lsm6dso32_mag_cfg_b_t
 
struct  lsm6dso32_pedo_cmd_reg_t
 
struct  lsm6dso32_sensor_hub_1_t
 
struct  lsm6dso32_sensor_hub_2_t
 
struct  lsm6dso32_sensor_hub_3_t
 
struct  lsm6dso32_sensor_hub_4_t
 
struct  lsm6dso32_sensor_hub_5_t
 
struct  lsm6dso32_sensor_hub_6_t
 
struct  lsm6dso32_sensor_hub_7_t
 
struct  lsm6dso32_sensor_hub_8_t
 
struct  lsm6dso32_sensor_hub_9_t
 
struct  lsm6dso32_sensor_hub_10_t
 
struct  lsm6dso32_sensor_hub_11_t
 
struct  lsm6dso32_sensor_hub_12_t
 
struct  lsm6dso32_sensor_hub_13_t
 
struct  lsm6dso32_sensor_hub_14_t
 
struct  lsm6dso32_sensor_hub_15_t
 
struct  lsm6dso32_sensor_hub_16_t
 
struct  lsm6dso32_sensor_hub_17_t
 
struct  lsm6dso32_sensor_hub_18_t
 
struct  lsm6dso32_master_config_t
 
struct  lsm6dso32_slv0_add_t
 
struct  lsm6dso32_slv0_subadd_t
 
struct  lsm6dso32_slv0_config_t
 
struct  lsm6dso32_slv1_add_t
 
struct  lsm6dso32_slv1_subadd_t
 
struct  lsm6dso32_slv1_config_t
 
struct  lsm6dso32_slv2_add_t
 
struct  lsm6dso32_slv2_subadd_t
 
struct  lsm6dso32_slv2_config_t
 
struct  lsm6dso32_slv3_add_t
 
struct  lsm6dso32_slv3_subadd_t
 
struct  lsm6dso32_slv3_config_t
 
struct  lsm6dso32_datawrite_src_mode_sub_slv0_t
 
struct  lsm6dso32_status_master_t
 
union  lsm6dso32_reg_t
 
struct  lsm6dso32_all_sources_t
 
struct  lsm6dso32_pin_int1_route_t
 
struct  lsm6dso32_pin_int2_route_t
 
struct  lsm6dso32_emb_fsm_enable_t
 
struct  lsm6dso32_fsm_out_t
 
struct  lsm6dso32_emb_sh_read_t
 
struct  lsm6dso32_sh_cfg_write_t
 
struct  lsm6dso32_sh_cfg_read_t
 

Macros

#define DRV_LITTLE_ENDIAN   1234
 
#define DRV_BIG_ENDIAN   4321
 
#define DRV_BYTE_ORDER   DRV_LITTLE_ENDIAN
 
#define MEMS_SHARED_TYPES
 
#define PROPERTY_DISABLE   (0U)
 
#define PROPERTY_ENABLE   (1U)
 
#define MEMS_UCF_SHARED_TYPES
 
#define LSM6DSO32_I2C_ADD_L   0xD5
 
#define LSM6DSO32_I2C_ADD_H   0xD7
 
#define LSM6DSO32_ID   0x6C
 
#define LSM6DSO32_FUNC_CFG_ACCESS   0x01U
 
#define LSM6DSO32_PIN_CTRL   0x02U
 
#define LSM6DSO32_FIFO_CTRL1   0x07U
 
#define LSM6DSO32_FIFO_CTRL2   0x08U
 
#define LSM6DSO32_FIFO_CTRL3   0x09U
 
#define LSM6DSO32_FIFO_CTRL4   0x0AU
 
#define LSM6DSO32_COUNTER_BDR_REG1   0x0BU
 
#define LSM6DSO32_COUNTER_BDR_REG2   0x0CU
 
#define LSM6DSO32_INT1_CTRL   0x0DU
 
#define LSM6DSO32_INT2_CTRL   0x0EU
 
#define LSM6DSO32_WHO_AM_I   0x0FU
 
#define LSM6DSO32_CTRL1_XL   0x10U
 
#define LSM6DSO32_CTRL2_G   0x11U
 
#define LSM6DSO32_CTRL3_C   0x12U
 
#define LSM6DSO32_CTRL4_C   0x13U
 
#define LSM6DSO32_CTRL5_C   0x14U
 
#define LSM6DSO32_CTRL6_C   0x15U
 
#define LSM6DSO32_CTRL7_G   0x16U
 
#define LSM6DSO32_CTRL8_XL   0x17U
 
#define LSM6DSO32_CTRL9_XL   0x18U
 
#define LSM6DSO32_CTRL10_C   0x19U
 
#define LSM6DSO32_ALL_INT_SRC   0x1AU
 
#define LSM6DSO32_WAKE_UP_SRC   0x1BU
 
#define LSM6DSO32_TAP_SRC   0x1CU
 
#define LSM6DSO32_D6D_SRC   0x1DU
 
#define LSM6DSO32_STATUS_REG   0x1EU
 
#define LSM6DSO32_OUT_TEMP_L   0x20U
 
#define LSM6DSO32_OUT_TEMP_H   0x21U
 
#define LSM6DSO32_OUTX_L_G   0x22U
 
#define LSM6DSO32_OUTX_H_G   0x23U
 
#define LSM6DSO32_OUTY_L_G   0x24U
 
#define LSM6DSO32_OUTY_H_G   0x25U
 
#define LSM6DSO32_OUTZ_L_G   0x26U
 
#define LSM6DSO32_OUTZ_H_G   0x27U
 
#define LSM6DSO32_OUTX_L_A   0x28U
 
#define LSM6DSO32_OUTX_H_A   0x29U
 
#define LSM6DSO32_OUTY_L_A   0x2AU
 
#define LSM6DSO32_OUTY_H_A   0x2BU
 
#define LSM6DSO32_OUTZ_L_A   0x2CU
 
#define LSM6DSO32_OUTZ_H_A   0x2DU
 
#define LSM6DSO32_EMB_FUNC_STATUS_MAINPAGE   0x35U
 
#define LSM6DSO32_FSM_STATUS_A_MAINPAGE   0x36U
 
#define LSM6DSO32_FSM_STATUS_B_MAINPAGE   0x37U
 
#define LSM6DSO32_STATUS_MASTER_MAINPAGE   0x39U
 
#define LSM6DSO32_FIFO_STATUS1   0x3AU
 
#define LSM6DSO32_FIFO_STATUS2   0x3B
 
#define LSM6DSO32_TIMESTAMP0   0x40U
 
#define LSM6DSO32_TIMESTAMP1   0x41U
 
#define LSM6DSO32_TIMESTAMP2   0x42U
 
#define LSM6DSO32_TIMESTAMP3   0x43U
 
#define LSM6DSO32_TAP_CFG0   0x56U
 
#define LSM6DSO32_TAP_CFG1   0x57U
 
#define LSM6DSO32_TAP_CFG2   0x58U
 
#define LSM6DSO32_TAP_THS_6D   0x59U
 
#define LSM6DSO32_INT_DUR2   0x5AU
 
#define LSM6DSO32_WAKE_UP_THS   0x5BU
 
#define LSM6DSO32_WAKE_UP_DUR   0x5CU
 
#define LSM6DSO32_FREE_FALL   0x5DU
 
#define LSM6DSO32_MD1_CFG   0x5EU
 
#define LSM6DSO32_MD2_CFG   0x5FU
 
#define LSM6DSO32_I3C_BUS_AVB   0x62U
 
#define LSM6DSO32_INTERNAL_FREQ_FINE   0x63U
 
#define LSM6DSO32_X_OFS_USR   0x73U
 
#define LSM6DSO32_Y_OFS_USR   0x74U
 
#define LSM6DSO32_Z_OFS_USR   0x75U
 
#define LSM6DSO32_FIFO_DATA_OUT_TAG   0x78U
 
#define LSM6DSO32_FIFO_DATA_OUT_X_L   0x79U
 
#define LSM6DSO32_FIFO_DATA_OUT_X_H   0x7AU
 
#define LSM6DSO32_FIFO_DATA_OUT_Y_L   0x7BU
 
#define LSM6DSO32_FIFO_DATA_OUT_Y_H   0x7CU
 
#define LSM6DSO32_FIFO_DATA_OUT_Z_L   0x7DU
 
#define LSM6DSO32_FIFO_DATA_OUT_Z_H   0x7EU
 
#define LSM6DSO32_PAGE_SEL   0x02U
 
#define LSM6DSO32_EMB_FUNC_EN_A   0x04U
 
#define LSM6DSO32_EMB_FUNC_EN_B   0x05U
 
#define LSM6DSO32_PAGE_ADDRESS   0x08U
 
#define LSM6DSO32_PAGE_VALUE   0x09U
 
#define LSM6DSO32_EMB_FUNC_INT1   0x0AU
 
#define LSM6DSO32_FSM_INT1_A   0x0BU
 
#define LSM6DSO32_FSM_INT1_B   0x0CU
 
#define LSM6DSO32_EMB_FUNC_INT2   0x0EU
 
#define LSM6DSO32_FSM_INT2_A   0x0FU
 
#define LSM6DSO32_FSM_INT2_B   0x10U
 
#define LSM6DSO32_EMB_FUNC_STATUS   0x12U
 
#define LSM6DSO32_FSM_STATUS_A   0x13U
 
#define LSM6DSO32_FSM_STATUS_B   0x14U
 
#define LSM6DSO32_PAGE_RW   0x17U
 
#define LSM6DSO32_EMB_FUNC_FIFO_CFG   0x44U
 
#define LSM6DSO32_FSM_ENABLE_A   0x46U
 
#define LSM6DSO32_FSM_ENABLE_B   0x47U
 
#define LSM6DSO32_FSM_LONG_COUNTER_L   0x48U
 
#define LSM6DSO32_FSM_LONG_COUNTER_H   0x49U
 
#define LSM6DSO32_FSM_LONG_COUNTER_CLEAR   0x4AU
 
#define LSM6DSO32_FSM_OUTS1   0x4CU
 
#define LSM6DSO32_FSM_OUTS2   0x4DU
 
#define LSM6DSO32_FSM_OUTS3   0x4EU
 
#define LSM6DSO32_FSM_OUTS4   0x4FU
 
#define LSM6DSO32_FSM_OUTS5   0x50U
 
#define LSM6DSO32_FSM_OUTS6   0x51U
 
#define LSM6DSO32_FSM_OUTS7   0x52U
 
#define LSM6DSO32_FSM_OUTS8   0x53U
 
#define LSM6DSO32_FSM_OUTS9   0x54U
 
#define LSM6DSO32_FSM_OUTS10   0x55U
 
#define LSM6DSO32_FSM_OUTS11   0x56U
 
#define LSM6DSO32_FSM_OUTS12   0x57U
 
#define LSM6DSO32_FSM_OUTS13   0x58U
 
#define LSM6DSO32_FSM_OUTS14   0x59U
 
#define LSM6DSO32_FSM_OUTS15   0x5AU
 
#define LSM6DSO32_FSM_OUTS16   0x5BU
 
#define LSM6DSO32_EMB_FUNC_ODR_CFG_B   0x5FU
 
#define LSM6DSO32_STEP_COUNTER_L   0x62U
 
#define LSM6DSO32_STEP_COUNTER_H   0x63U
 
#define LSM6DSO32_EMB_FUNC_SRC   0x64U
 
#define LSM6DSO32_EMB_FUNC_INIT_A   0x66U
 
#define LSM6DSO32_EMB_FUNC_INIT_B   0x67U
 
#define LSM6DSO32_MAG_SENSITIVITY_L   0xBAU
 
#define LSM6DSO32_MAG_SENSITIVITY_H   0xBBU
 
#define LSM6DSO32_MAG_OFFX_L   0xC0U
 
#define LSM6DSO32_MAG_OFFX_H   0xC1U
 
#define LSM6DSO32_MAG_OFFY_L   0xC2U
 
#define LSM6DSO32_MAG_OFFY_H   0xC3U
 
#define LSM6DSO32_MAG_OFFZ_L   0xC4U
 
#define LSM6DSO32_MAG_OFFZ_H   0xC5U
 
#define LSM6DSO32_MAG_SI_XX_L   0xC6U
 
#define LSM6DSO32_MAG_SI_XX_H   0xC7U
 
#define LSM6DSO32_MAG_SI_XY_L   0xC8U
 
#define LSM6DSO32_MAG_SI_XY_H   0xC9U
 
#define LSM6DSO32_MAG_SI_XZ_L   0xCAU
 
#define LSM6DSO32_MAG_SI_XZ_H   0xCBU
 
#define LSM6DSO32_MAG_SI_YY_L   0xCCU
 
#define LSM6DSO32_MAG_SI_YY_H   0xCDU
 
#define LSM6DSO32_MAG_SI_YZ_L   0xCEU
 
#define LSM6DSO32_MAG_SI_YZ_H   0xCFU
 
#define LSM6DSO32_MAG_SI_ZZ_L   0xD0U
 
#define LSM6DSO32_MAG_SI_ZZ_H   0xD1U
 
#define LSM6DSO32_MAG_CFG_A   0xD4U
 
#define LSM6DSO32_MAG_CFG_B   0xD5U
 
#define LSM6DSO32_FSM_LC_TIMEOUT_L   0x17AU
 
#define LSM6DSO32_FSM_LC_TIMEOUT_H   0x17BU
 
#define LSM6DSO32_FSM_PROGRAMS   0x17CU
 
#define LSM6DSO32_FSM_START_ADD_L   0x17EU
 
#define LSM6DSO32_FSM_START_ADD_H   0x17FU
 
#define LSM6DSO32_PEDO_CMD_REG   0x183U
 
#define LSM6DSO32_PEDO_DEB_STEPS_CONF   0x184U
 
#define LSM6DSO32_PEDO_SC_DELTAT_L   0x1D0U
 
#define LSM6DSO32_PEDO_SC_DELTAT_H   0x1D1U
 
#define LSM6DSO32_SENSOR_HUB_1   0x02U
 
#define LSM6DSO32_SENSOR_HUB_2   0x03U
 
#define LSM6DSO32_SENSOR_HUB_3   0x04U
 
#define LSM6DSO32_SENSOR_HUB_4   0x05U
 
#define LSM6DSO32_SENSOR_HUB_5   0x06U
 
#define LSM6DSO32_SENSOR_HUB_6   0x07U
 
#define LSM6DSO32_SENSOR_HUB_7   0x08U
 
#define LSM6DSO32_SENSOR_HUB_8   0x09U
 
#define LSM6DSO32_SENSOR_HUB_9   0x0AU
 
#define LSM6DSO32_SENSOR_HUB_10   0x0BU
 
#define LSM6DSO32_SENSOR_HUB_11   0x0CU
 
#define LSM6DSO32_SENSOR_HUB_12   0x0DU
 
#define LSM6DSO32_SENSOR_HUB_13   0x0EU
 
#define LSM6DSO32_SENSOR_HUB_14   0x0FU
 
#define LSM6DSO32_SENSOR_HUB_15   0x10U
 
#define LSM6DSO32_SENSOR_HUB_16   0x11U
 
#define LSM6DSO32_SENSOR_HUB_17   0x12U
 
#define LSM6DSO32_SENSOR_HUB_18   0x13U
 
#define LSM6DSO32_MASTER_CONFIG   0x14U
 
#define LSM6DSO32_SLV0_ADD   0x15U
 
#define LSM6DSO32_SLV0_SUBADD   0x16U
 
#define LSM6DSO32_SLV0_CONFIG   0x17U
 
#define LSM6DSO32_SLV1_ADD   0x18U
 
#define LSM6DSO32_SLV1_SUBADD   0x19U
 
#define LSM6DSO32_SLV1_CONFIG   0x1AU
 
#define LSM6DSO32_SLV2_ADD   0x1BU
 
#define LSM6DSO32_SLV2_SUBADD   0x1CU
 
#define LSM6DSO32_SLV2_CONFIG   0x1DU
 
#define LSM6DSO32_SLV3_ADD   0x1EU
 
#define LSM6DSO32_SLV3_SUBADD   0x1FU
 
#define LSM6DSO32_SLV3_CONFIG   0x20U
 
#define LSM6DSO32_DATAWRITE_SLV0   0x21U
 
#define LSM6DSO32_STATUS_MASTER   0x22U
 
#define __weak   __attribute__((weak))
 

Typedefs

typedef int32_t(* stmdev_write_ptr) (void *, uint8_t, const uint8_t *, uint16_t)
 
typedef int32_t(* stmdev_read_ptr) (void *, uint8_t, uint8_t *, uint16_t)
 
typedef void(* stmdev_mdelay_ptr) (uint32_t millisec)
 

Enumerations

enum  lsm6dso32_fs_xl_t { LSM6DSO32_4g = 0x00 , LSM6DSO32_8g = 0x02 , LSM6DSO32_16g = 0x03 , LSM6DSO32_32g = 0x01 }
 
enum  lsm6dso32_odr_xl_t {
  LSM6DSO32_XL_ODR_OFF = 0x00 , LSM6DSO32_XL_ODR_6Hz5_LOW_PW = 0x1B , LSM6DSO32_XL_ODR_12Hz5_LOW_PW = 0x11 , LSM6DSO32_XL_ODR_26Hz_LOW_PW = 0x12 ,
  LSM6DSO32_XL_ODR_52Hz_LOW_PW = 0x13 , LSM6DSO32_XL_ODR_104Hz_NORMAL_MD = 0x14 , LSM6DSO32_XL_ODR_208Hz_NORMAL_MD = 0x15 , LSM6DSO32_XL_ODR_12Hz5_HIGH_PERF = 0x01 ,
  LSM6DSO32_XL_ODR_26Hz_HIGH_PERF = 0x02 , LSM6DSO32_XL_ODR_52Hz_HIGH_PERF = 0x03 , LSM6DSO32_XL_ODR_104Hz_HIGH_PERF = 0x04 , LSM6DSO32_XL_ODR_208Hz_HIGH_PERF = 0x05 ,
  LSM6DSO32_XL_ODR_417Hz_HIGH_PERF = 0x06 , LSM6DSO32_XL_ODR_833Hz_HIGH_PERF = 0x07 , LSM6DSO32_XL_ODR_1667Hz_HIGH_PERF = 0x08 , LSM6DSO32_XL_ODR_3333Hz_HIGH_PERF = 0x09 ,
  LSM6DSO32_XL_ODR_6667Hz_HIGH_PERF = 0x0A , LSM6DSO32_XL_ODR_6Hz5_ULTRA_LOW_PW = 0x2B , LSM6DSO32_XL_ODR_12Hz5_ULTRA_LOW_PW = 0x21 , LSM6DSO32_XL_ODR_26Hz_ULTRA_LOW_PW = 0x22 ,
  LSM6DSO32_XL_ODR_52Hz_ULTRA_LOW_PW = 0x23 , LSM6DSO32_XL_ODR_104Hz_ULTRA_LOW_PW = 0x24 , LSM6DSO32_XL_ODR_208Hz_ULTRA_LOW_PW = 0x25
}
 
enum  lsm6dso32_fs_g_t {
  LSM6DSO32_250dps = 0 , LSM6DSO32_125dps = 1 , LSM6DSO32_500dps = 2 , LSM6DSO32_1000dps = 4 ,
  LSM6DSO32_2000dps = 6
}
 
enum  lsm6dso32_odr_g_t {
  LSM6DSO32_GY_ODR_OFF = 0x00 , LSM6DSO32_GY_ODR_12Hz5_HIGH_PERF = 0x01 , LSM6DSO32_GY_ODR_26Hz_HIGH_PERF = 0x02 , LSM6DSO32_GY_ODR_52Hz_HIGH_PERF = 0x03 ,
  LSM6DSO32_GY_ODR_104Hz_HIGH_PERF = 0x04 , LSM6DSO32_GY_ODR_208Hz_HIGH_PERF = 0x05 , LSM6DSO32_GY_ODR_417Hz_HIGH_PERF = 0x06 , LSM6DSO32_GY_ODR_833Hz_HIGH_PERF = 0x07 ,
  LSM6DSO32_GY_ODR_1667Hz_HIGH_PERF = 0x08 , LSM6DSO32_GY_ODR_3333Hz_HIGH_PERF = 0x09 , LSM6DSO32_GY_ODR_6667Hz_HIGH_PERF = 0x0A , LSM6DSO32_GY_ODR_104Hz_NORMAL_MD = 0x14 ,
  LSM6DSO32_GY_ODR_208Hz_NORMAL_MD = 0x15 , LSM6DSO32_GY_ODR_12Hz5_LOW_PW = 0x11 , LSM6DSO32_GY_ODR_26Hz_LOW_PW = 0x12 , LSM6DSO32_GY_ODR_52Hz_LOW_PW = 0x13
}
 
enum  lsm6dso32_usr_off_w_t { LSM6DSO32_LSb_1mg = 0 , LSM6DSO32_LSb_16mg = 1 }
 
enum  lsm6dso32_rounding_t { LSM6DSO32_NO_ROUND = 0 , LSM6DSO32_ROUND_XL = 1 , LSM6DSO32_ROUND_GY = 2 , LSM6DSO32_ROUND_GY_XL = 3 }
 
enum  lsm6dso32_reg_access_t { LSM6DSO32_USER_BANK = 0 , LSM6DSO32_SENSOR_HUB_BANK = 1 , LSM6DSO32_EMBEDDED_FUNC_BANK = 2 }
 
enum  lsm6dso32_dataready_pulsed_t { LSM6DSO32_DRDY_LATCHED = 0 , LSM6DSO32_DRDY_PULSED = 1 }
 
enum  lsm6dso32_st_xl_t { LSM6DSO32_XL_ST_DISABLE = 0 , LSM6DSO32_XL_ST_POSITIVE = 1 , LSM6DSO32_XL_ST_NEGATIVE = 2 }
 
enum  lsm6dso32_st_g_t { LSM6DSO32_GY_ST_DISABLE = 0 , LSM6DSO32_GY_ST_POSITIVE = 1 , LSM6DSO32_GY_ST_NEGATIVE = 3 }
 
enum  lsm6dso32_ftype_t {
  LSM6DSO32_ULTRA_LIGHT = 0 , LSM6DSO32_VERY_LIGHT = 1 , LSM6DSO32_LIGHT = 2 , LSM6DSO32_MEDIUM = 3 ,
  LSM6DSO32_STRONG = 4 , LSM6DSO32_VERY_STRONG = 5 , LSM6DSO32_AGGRESSIVE = 6 , LSM6DSO32_XTREME = 7
}
 
enum  lsm6dso32_hp_slope_xl_en_t {
  LSM6DSO32_HP_PATH_DISABLE_ON_OUT = 0x00 , LSM6DSO32_SLOPE_ODR_DIV_4 = 0x10 , LSM6DSO32_HP_ODR_DIV_10 = 0x11 , LSM6DSO32_HP_ODR_DIV_20 = 0x12 ,
  LSM6DSO32_HP_ODR_DIV_45 = 0x13 , LSM6DSO32_HP_ODR_DIV_100 = 0x14 , LSM6DSO32_HP_ODR_DIV_200 = 0x15 , LSM6DSO32_HP_ODR_DIV_400 = 0x16 ,
  LSM6DSO32_HP_ODR_DIV_800 = 0x17 , LSM6DSO32_HP_REF_MD_ODR_DIV_10 = 0x31 , LSM6DSO32_HP_REF_MD_ODR_DIV_20 = 0x32 , LSM6DSO32_HP_REF_MD_ODR_DIV_45 = 0x33 ,
  LSM6DSO32_HP_REF_MD_ODR_DIV_100 = 0x34 , LSM6DSO32_HP_REF_MD_ODR_DIV_200 = 0x35 , LSM6DSO32_HP_REF_MD_ODR_DIV_400 = 0x36 , LSM6DSO32_HP_REF_MD_ODR_DIV_800 = 0x37 ,
  LSM6DSO32_LP_ODR_DIV_10 = 0x01 , LSM6DSO32_LP_ODR_DIV_20 = 0x02 , LSM6DSO32_LP_ODR_DIV_45 = 0x03 , LSM6DSO32_LP_ODR_DIV_100 = 0x04 ,
  LSM6DSO32_LP_ODR_DIV_200 = 0x05 , LSM6DSO32_LP_ODR_DIV_400 = 0x06 , LSM6DSO32_LP_ODR_DIV_800 = 0x07
}
 
enum  lsm6dso32_slope_fds_t { LSM6DSO32_USE_SLOPE = 0 , LSM6DSO32_USE_HPF = 1 }
 
enum  lsm6dso32_hpm_g_t {
  LSM6DSO32_HP_FILTER_NONE = 0x00 , LSM6DSO32_HP_FILTER_16mHz = 0x80 , LSM6DSO32_HP_FILTER_65mHz = 0x81 , LSM6DSO32_HP_FILTER_260mHz = 0x82 ,
  LSM6DSO32_HP_FILTER_1Hz04 = 0x83
}
 
enum  lsm6dso32_sdo_pu_en_t { LSM6DSO32_PULL_UP_DISC = 0 , LSM6DSO32_PULL_UP_CONNECT = 1 }
 
enum  lsm6dso32_sim_t { LSM6DSO32_SPI_4_WIRE = 0 , LSM6DSO32_SPI_3_WIRE = 1 }
 
enum  lsm6dso32_i2c_disable_t { LSM6DSO32_I2C_ENABLE = 0 , LSM6DSO32_I2C_DISABLE = 1 }
 
enum  lsm6dso32_i3c_disable_t {
  LSM6DSO32_I3C_DISABLE = 0x80 , LSM6DSO32_I3C_ENABLE_T_50us = 0x00 , LSM6DSO32_I3C_ENABLE_T_2us = 0x01 , LSM6DSO32_I3C_ENABLE_T_1ms = 0x02 ,
  LSM6DSO32_I3C_ENABLE_T_25ms = 0x03
}
 
enum  lsm6dso32_int1_pd_en_t { LSM6DSO32_PULL_DOWN_DISC = 0 , LSM6DSO32_PULL_DOWN_CONNECT = 1 }
 
enum  lsm6dso32_pp_od_t { LSM6DSO32_PUSH_PULL = 0 , LSM6DSO32_OPEN_DRAIN = 1 }
 
enum  lsm6dso32_h_lactive_t { LSM6DSO32_ACTIVE_HIGH = 0 , LSM6DSO32_ACTIVE_LOW = 1 }
 
enum  lsm6dso32_lir_t { LSM6DSO32_ALL_INT_PULSED = 0 , LSM6DSO32_BASE_LATCHED_EMB_PULSED = 1 , LSM6DSO32_BASE_PULSED_EMB_LATCHED = 2 , LSM6DSO32_ALL_INT_LATCHED = 3 }
 
enum  lsm6dso32_wake_ths_w_t { LSM6DSO32_LSb_FS_DIV_64 = 0 , LSM6DSO32_LSb_FS_DIV_256 = 1 }
 
enum  lsm6dso32_sleep_status_on_int_t { LSM6DSO32_DRIVE_SLEEP_CHG_EVENT = 0 , LSM6DSO32_DRIVE_SLEEP_STATUS = 1 }
 
enum  lsm6dso32_inact_en_t { LSM6DSO32_XL_AND_GY_NOT_AFFECTED = 0 , LSM6DSO32_XL_12Hz5_GY_NOT_AFFECTED = 1 , LSM6DSO32_XL_12Hz5_GY_SLEEP = 2 , LSM6DSO32_XL_12Hz5_GY_PD = 3 }
 
enum  lsm6dso32_tap_priority_t {
  LSM6DSO32_XYZ = 0 , LSM6DSO32_YXZ = 1 , LSM6DSO32_XZY = 2 , LSM6DSO32_ZYX = 3 ,
  LSM6DSO32_YZX = 5 , LSM6DSO32_ZXY = 6
}
 
enum  lsm6dso32_single_double_tap_t { LSM6DSO32_ONLY_SINGLE = 0 , LSM6DSO32_BOTH_SINGLE_DOUBLE = 1 }
 
enum  lsm6dso32_sixd_ths_t { LSM6DSO32_DEG_68 = 0 , LSM6DSO32_DEG_47 = 1 }
 
enum  lsm6dso32_ff_ths_t { LSM6DSO32_FF_TSH_312mg = 0 , LSM6DSO32_FF_TSH_438mg = 1 , LSM6DSO32_FF_TSH_500mg = 2 }
 
enum  lsm6dso32_uncoptr_rate_t {
  LSM6DSO32_CMP_DISABLE = 0x00 , LSM6DSO32_CMP_ALWAYS = 0x04 , LSM6DSO32_CMP_8_TO_1 = 0x05 , LSM6DSO32_CMP_16_TO_1 = 0x06 ,
  LSM6DSO32_CMP_32_TO_1 = 0x07
}
 
enum  lsm6dso32_bdr_xl_t {
  LSM6DSO32_XL_NOT_BATCHED = 0 , LSM6DSO32_XL_BATCHED_AT_12Hz5 = 1 , LSM6DSO32_XL_BATCHED_AT_26Hz = 2 , LSM6DSO32_XL_BATCHED_AT_52Hz = 3 ,
  LSM6DSO32_XL_BATCHED_AT_104Hz = 4 , LSM6DSO32_XL_BATCHED_AT_208Hz = 5 , LSM6DSO32_XL_BATCHED_AT_417Hz = 6 , LSM6DSO32_XL_BATCHED_AT_833Hz = 7 ,
  LSM6DSO32_XL_BATCHED_AT_1667Hz = 8 , LSM6DSO32_XL_BATCHED_AT_3333Hz = 9 , LSM6DSO32_XL_BATCHED_AT_6667Hz = 10 , LSM6DSO32_XL_BATCHED_AT_6Hz5 = 11
}
 
enum  lsm6dso32_bdr_gy_t {
  LSM6DSO32_GY_NOT_BATCHED = 0 , LSM6DSO32_GY_BATCHED_AT_12Hz5 = 1 , LSM6DSO32_GY_BATCHED_AT_26Hz = 2 , LSM6DSO32_GY_BATCHED_AT_52Hz = 3 ,
  LSM6DSO32_GY_BATCHED_AT_104Hz = 4 , LSM6DSO32_GY_BATCHED_AT_208Hz = 5 , LSM6DSO32_GY_BATCHED_AT_417Hz = 6 , LSM6DSO32_GY_BATCHED_AT_833Hz = 7 ,
  LSM6DSO32_GY_BATCHED_AT_1667Hz = 8 , LSM6DSO32_GY_BATCHED_AT_3333Hz = 9 , LSM6DSO32_GY_BATCHED_AT_6667Hz = 10 , LSM6DSO32_GY_BATCHED_AT_6Hz5 = 11
}
 
enum  lsm6dso32_fifo_mode_t {
  LSM6DSO32_BYPASS_MODE = 0 , LSM6DSO32_FIFO_MODE = 1 , LSM6DSO32_STREAM_TO_FIFO_MODE = 3 , LSM6DSO32_BYPASS_TO_STREAM_MODE = 4 ,
  LSM6DSO32_STREAM_MODE = 6 , LSM6DSO32_BYPASS_TO_FIFO_MODE = 7
}
 
enum  lsm6dso32_odr_t_batch_t { LSM6DSO32_TEMP_NOT_BATCHED = 0 , LSM6DSO32_TEMP_BATCHED_AT_1Hz6 = 1 , LSM6DSO32_TEMP_BATCHED_AT_12Hz5 = 2 , LSM6DSO32_TEMP_BATCHED_AT_52Hz = 3 }
 
enum  lsm6dso32_odr_ts_batch_t { LSM6DSO32_NO_DECIMATION = 0 , LSM6DSO32_DEC_1 = 1 , LSM6DSO32_DEC_8 = 2 , LSM6DSO32_DEC_32 = 3 }
 
enum  lsm6dso32_trig_counter_bdr_t { LSM6DSO32_XL_BATCH_EVENT = 0 , LSM6DSO32_GYRO_BATCH_EVENT = 1 }
 
enum  lsm6dso32_fifo_tag_t {
  LSM6DSO32_GYRO_NC_TAG = 1 , LSM6DSO32_XL_NC_TAG , LSM6DSO32_TEMPERATURE_TAG , LSM6DSO32_TIMESTAMP_TAG ,
  LSM6DSO32_CFG_CHANGE_TAG , LSM6DSO32_XL_NC_T_2_TAG , LSM6DSO32_XL_NC_T_1_TAG , LSM6DSO32_XL_2XC_TAG ,
  LSM6DSO32_XL_3XC_TAG , LSM6DSO32_GYRO_NC_T_2_TAG , LSM6DSO32_GYRO_NC_T_1_TAG , LSM6DSO32_GYRO_2XC_TAG ,
  LSM6DSO32_GYRO_3XC_TAG , LSM6DSO32_SENSORHUB_SLAVE0_TAG , LSM6DSO32_SENSORHUB_SLAVE1_TAG , LSM6DSO32_SENSORHUB_SLAVE2_TAG ,
  LSM6DSO32_SENSORHUB_SLAVE3_TAG , LSM6DSO32_STEP_COUNTER_TAG , LSM6DSO32_SENSORHUB_NACK_TAG = 0x19
}
 
enum  lsm6dso32_den_mode_t {
  LSM6DSO32_DEN_DISABLE = 0 , LSM6DSO32_LEVEL_FIFO = 6 , LSM6DSO32_LEVEL_LETCHED = 3 , LSM6DSO32_LEVEL_TRIGGER = 2 ,
  LSM6DSO32_EDGE_TRIGGER = 4
}
 
enum  lsm6dso32_den_lh_t { LSM6DSO32_DEN_ACT_LOW = 0 , LSM6DSO32_DEN_ACT_HIGH = 1 }
 
enum  lsm6dso32_den_xl_g_t { LSM6DSO32_STAMP_IN_GY_DATA = 0 , LSM6DSO32_STAMP_IN_XL_DATA = 1 , LSM6DSO32_STAMP_IN_GY_XL_DATA = 2 }
 
enum  lsm6dso32_pedo_md_t {
  LSM6DSO32_PEDO_DISABLE = 0x00 , LSM6DSO32_PEDO_BASE_MODE = 0x01 , LSM6DSO32_PEDO_ADV_MODE = 0x03 , LSM6DSO32_FALSE_STEP_REJ = 0x13 ,
  LSM6DSO32_FALSE_STEP_REJ_ADV_MODE = 0x33
}
 
enum  lsm6dso32_carry_count_en_t { LSM6DSO32_EVERY_STEP = 0 , LSM6DSO32_COUNT_OVERFLOW = 1 }
 
enum  lsm6dso32_mag_z_axis_t {
  LSM6DSO32_Z_EQ_Y = 0 , LSM6DSO32_Z_EQ_MIN_Y = 1 , LSM6DSO32_Z_EQ_X = 2 , LSM6DSO32_Z_EQ_MIN_X = 3 ,
  LSM6DSO32_Z_EQ_MIN_Z = 4 , LSM6DSO32_Z_EQ_Z = 5
}
 
enum  lsm6dso32_mag_y_axis_t {
  LSM6DSO32_Y_EQ_Y = 0 , LSM6DSO32_Y_EQ_MIN_Y = 1 , LSM6DSO32_Y_EQ_X = 2 , LSM6DSO32_Y_EQ_MIN_X = 3 ,
  LSM6DSO32_Y_EQ_MIN_Z = 4 , LSM6DSO32_Y_EQ_Z = 5
}
 
enum  lsm6dso32_mag_x_axis_t {
  LSM6DSO32_X_EQ_Y = 0 , LSM6DSO32_X_EQ_MIN_Y = 1 , LSM6DSO32_X_EQ_X = 2 , LSM6DSO32_X_EQ_MIN_X = 3 ,
  LSM6DSO32_X_EQ_MIN_Z = 4 , LSM6DSO32_X_EQ_Z = 5
}
 
enum  lsm6dso32_fsm_lc_clr_t { LSM6DSO32_LC_NORMAL = 0 , LSM6DSO32_LC_CLEAR = 1 , LSM6DSO32_LC_CLEAR_DONE = 2 }
 
enum  lsm6dso32_fsm_odr_t { LSM6DSO32_ODR_FSM_12Hz5 = 0 , LSM6DSO32_ODR_FSM_26Hz = 1 , LSM6DSO32_ODR_FSM_52Hz = 2 , LSM6DSO32_ODR_FSM_104Hz = 3 }
 
enum  lsm6dso32_aux_sens_on_t { LSM6DSO32_SLV_0 = 0 , LSM6DSO32_SLV_0_1 = 1 , LSM6DSO32_SLV_0_1_2 = 2 , LSM6DSO32_SLV_0_1_2_3 = 3 }
 
enum  lsm6dso32_shub_pu_en_t { LSM6DSO32_EXT_PULL_UP = 0 , LSM6DSO32_INTERNAL_PULL_UP = 1 }
 
enum  lsm6dso32_start_config_t { LSM6DSO32_EXT_ON_INT2_PIN = 1 , LSM6DSO32_XL_GY_DRDY = 0 }
 
enum  lsm6dso32_write_once_t { LSM6DSO32_EACH_SH_CYCLE = 0 , LSM6DSO32_ONLY_FIRST_CYCLE = 1 }
 
enum  lsm6dso32_shub_odr_t { LSM6DSO32_SH_ODR_104Hz = 0 , LSM6DSO32_SH_ODR_52Hz = 1 , LSM6DSO32_SH_ODR_26Hz = 2 , LSM6DSO32_SH_ODR_13Hz = 3 }
 

Functions

int32_t lsm6dso32_read_reg (stmdev_ctx_t *ctx, uint8_t reg, uint8_t *data, uint16_t len)
 Read generic device register.
 
int32_t lsm6dso32_write_reg (stmdev_ctx_t *ctx, uint8_t reg, uint8_t *data, uint16_t len)
 Write generic device register.
 
float_t lsm6dso32_from_fs4_to_mg (int16_t lsb)
 
float_t lsm6dso32_from_fs8_to_mg (int16_t lsb)
 
float_t lsm6dso32_from_fs16_to_mg (int16_t lsb)
 
float_t lsm6dso32_from_fs32_to_mg (int16_t lsb)
 
float_t lsm6dso32_from_fs125_to_mdps (int16_t lsb)
 
float_t lsm6dso32_from_fs250_to_mdps (int16_t lsb)
 
float_t lsm6dso32_from_fs500_to_mdps (int16_t lsb)
 
float_t lsm6dso32_from_fs1000_to_mdps (int16_t lsb)
 
float_t lsm6dso32_from_fs2000_to_mdps (int16_t lsb)
 
float_t lsm6dso32_from_lsb_to_celsius (int16_t lsb)
 
float_t lsm6dso32_from_lsb_to_nsec (int16_t lsb)
 
int32_t lsm6dso32_xl_full_scale_set (stmdev_ctx_t *ctx, lsm6dso32_fs_xl_t val)
 Accelerometer full-scale selection.[set].
 
int32_t lsm6dso32_xl_full_scale_get (stmdev_ctx_t *ctx, lsm6dso32_fs_xl_t *val)
 Accelerometer full-scale selection.[get].
 
int32_t lsm6dso32_xl_data_rate_set (stmdev_ctx_t *ctx, lsm6dso32_odr_xl_t val)
 Accelerometer UI data rate and power mode selection.[set].
 
int32_t lsm6dso32_xl_data_rate_get (stmdev_ctx_t *ctx, lsm6dso32_odr_xl_t *val)
 Accelerometer UI data rate selection.[get].
 
int32_t lsm6dso32_gy_full_scale_set (stmdev_ctx_t *ctx, lsm6dso32_fs_g_t val)
 Gyroscope UI chain full-scale selection.[set].
 
int32_t lsm6dso32_gy_full_scale_get (stmdev_ctx_t *ctx, lsm6dso32_fs_g_t *val)
 Gyroscope UI chain full-scale selection.[get].
 
int32_t lsm6dso32_gy_data_rate_set (stmdev_ctx_t *ctx, lsm6dso32_odr_g_t val)
 Gyroscope UI data rate selection.[set].
 
int32_t lsm6dso32_gy_data_rate_get (stmdev_ctx_t *ctx, lsm6dso32_odr_g_t *val)
 Gyroscope UI data rate selection.[get].
 
int32_t lsm6dso32_block_data_update_set (stmdev_ctx_t *ctx, uint8_t val)
 Block data update.[set].
 
int32_t lsm6dso32_block_data_update_get (stmdev_ctx_t *ctx, uint8_t *val)
 Block data update.[get].
 
int32_t lsm6dso32_xl_offset_weight_set (stmdev_ctx_t *ctx, lsm6dso32_usr_off_w_t val)
 Weight of XL user offset bits of registers X_OFS_USR (73h), Y_OFS_USR (74h), Z_OFS_USR (75h).[set].
 
int32_t lsm6dso32_xl_offset_weight_get (stmdev_ctx_t *ctx, lsm6dso32_usr_off_w_t *val)
 Weight of XL user offset bits of registers X_OFS_USR (73h), Y_OFS_USR (74h), Z_OFS_USR (75h).[get].
 
int32_t lsm6dso32_all_sources_get (stmdev_ctx_t *ctx, lsm6dso32_all_sources_t *val)
 Read all the interrupt flag of the device.[get].
 
int32_t lsm6dso32_status_reg_get (stmdev_ctx_t *ctx, lsm6dso32_status_reg_t *val)
 The STATUS_REG register is read by the primary interface.[get].
 
int32_t lsm6dso32_xl_flag_data_ready_get (stmdev_ctx_t *ctx, uint8_t *val)
 Accelerometer new data available.[get].
 
int32_t lsm6dso32_gy_flag_data_ready_get (stmdev_ctx_t *ctx, uint8_t *val)
 Gyroscope new data available.[get].
 
int32_t lsm6dso32_temp_flag_data_ready_get (stmdev_ctx_t *ctx, uint8_t *val)
 Temperature new data available.[get].
 
int32_t lsm6dso32_xl_usr_offset_x_set (stmdev_ctx_t *ctx, uint8_t *buff)
 Accelerometer X-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_W in CTRL6_C (15h). The value must be in the range [-127 127].[set].
 
int32_t lsm6dso32_xl_usr_offset_x_get (stmdev_ctx_t *ctx, uint8_t *buff)
 Accelerometer X-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_W in CTRL6_C (15h). The value must be in the range [-127 127].[get].
 
int32_t lsm6dso32_xl_usr_offset_y_set (stmdev_ctx_t *ctx, uint8_t *buff)
 Accelerometer Y-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_W in CTRL6_C (15h). The value must be in the range [-127 127].[set].
 
int32_t lsm6dso32_xl_usr_offset_y_get (stmdev_ctx_t *ctx, uint8_t *buff)
 Accelerometer Y-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_W in CTRL6_C (15h). The value must be in the range [-127 127].[get].
 
int32_t lsm6dso32_xl_usr_offset_z_set (stmdev_ctx_t *ctx, uint8_t *buff)
 Accelerometer Z-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_W in CTRL6_C (15h). The value must be in the range [-127 127].[set].
 
int32_t lsm6dso32_xl_usr_offset_z_get (stmdev_ctx_t *ctx, uint8_t *buff)
 Accelerometer Z-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_W in CTRL6_C (15h). The value must be in the range [-127 127].[get].
 
int32_t lsm6dso32_xl_usr_offset_set (stmdev_ctx_t *ctx, uint8_t val)
 Enables user offset on out.[set].
 
int32_t lsm6dso32_xl_usr_offset_get (stmdev_ctx_t *ctx, uint8_t *val)
 User offset on out flag.[get].
 
int32_t lsm6dso32_timestamp_set (stmdev_ctx_t *ctx, uint8_t val)
 Enables timestamp counter.[set].
 
int32_t lsm6dso32_timestamp_get (stmdev_ctx_t *ctx, uint8_t *val)
 Enables timestamp counter.[get].
 
int32_t lsm6dso32_timestamp_raw_get (stmdev_ctx_t *ctx, uint32_t *val)
 Timestamp first data output register (r). The value is expressed as a 32-bit word and the bit resolution is 25 μs.[get].
 
int32_t lsm6dso32_rounding_mode_set (stmdev_ctx_t *ctx, lsm6dso32_rounding_t val)
 Circular burst-mode (rounding) read of the output registers.[set].
 
int32_t lsm6dso32_rounding_mode_get (stmdev_ctx_t *ctx, lsm6dso32_rounding_t *val)
 Gyroscope UI chain full-scale selection.[get].
 
int32_t lsm6dso32_temperature_raw_get (stmdev_ctx_t *ctx, int16_t *val)
 Temperature data output register (r). L and H registers together express a 16-bit word in two’s complement.[get].
 
int32_t lsm6dso32_angular_rate_raw_get (stmdev_ctx_t *ctx, int16_t *val)
 Angular rate sensor. The value is expressed as a 16-bit word in two’s complement.[get].
 
int32_t lsm6dso32_acceleration_raw_get (stmdev_ctx_t *ctx, int16_t *val)
 Linear acceleration output register. The value is expressed as a 16-bit word in two’s complement.[get].
 
int32_t lsm6dso32_fifo_out_raw_get (stmdev_ctx_t *ctx, uint8_t *buff)
 FIFO data output [get].
 
int32_t lsm6dso32_number_of_steps_get (stmdev_ctx_t *ctx, uint16_t *val)
 Step counter output register.[get].
 
int32_t lsm6dso32_steps_reset (stmdev_ctx_t *ctx)
 Reset step counter register.[get].
 
int32_t lsm6dso32_odr_cal_reg_set (stmdev_ctx_t *ctx, uint8_t val)
 Difference in percentage of the effective ODR(and timestamp rate) with respect to the typical. Step: 0.15%. 8-bit format, 2's complement.[set].
 
int32_t lsm6dso32_odr_cal_reg_get (stmdev_ctx_t *ctx, uint8_t *val)
 Difference in percentage of the effective ODR(and timestamp rate) with respect to the typical. Step: 0.15%. 8-bit format, 2's complement.[get].
 
int32_t lsm6dso32_mem_bank_set (stmdev_ctx_t *ctx, lsm6dso32_reg_access_t val)
 Enable access to the embedded functions/sensor hub configuration registers.[set].
 
int32_t lsm6dso32_mem_bank_get (stmdev_ctx_t *ctx, lsm6dso32_reg_access_t *val)
 Enable access to the embedded functions/sensor hub configuration registers.[get].
 
int32_t lsm6dso32_ln_pg_write_byte (stmdev_ctx_t *ctx, uint16_t address, uint8_t *val)
 Write a line(byte) in a page.[set].
 
int32_t lsm6dso32_ln_pg_read_byte (stmdev_ctx_t *ctx, uint16_t address, uint8_t *val)
 Read a line(byte) in a page.[get].
 
int32_t lsm6dso32_ln_pg_write (stmdev_ctx_t *ctx, uint16_t address, uint8_t *buf, uint8_t len)
 Write buffer in a page.[set].
 
int32_t lsm6dso32_ln_pg_read (stmdev_ctx_t *ctx, uint16_t address, uint8_t *val)
 
int32_t lsm6dso32_data_ready_mode_set (stmdev_ctx_t *ctx, lsm6dso32_dataready_pulsed_t val)
 Data-ready pulsed / letched mode.[set].
 
int32_t lsm6dso32_data_ready_mode_get (stmdev_ctx_t *ctx, lsm6dso32_dataready_pulsed_t *val)
 Data-ready pulsed / letched mode.[get].
 
int32_t lsm6dso32_device_id_get (stmdev_ctx_t *ctx, uint8_t *buff)
 Device "Who am I".[get].
 
int32_t lsm6dso32_reset_set (stmdev_ctx_t *ctx, uint8_t val)
 Software reset. Restore the default values in user registers[set].
 
int32_t lsm6dso32_reset_get (stmdev_ctx_t *ctx, uint8_t *val)
 Software reset. Restore the default values in user registers.[get].
 
int32_t lsm6dso32_auto_increment_set (stmdev_ctx_t *ctx, uint8_t val)
 Register address automatically incremented during a multiple byte access with a serial interface.[set].
 
int32_t lsm6dso32_auto_increment_get (stmdev_ctx_t *ctx, uint8_t *val)
 Register address automatically incremented during a multiple byte access with a serial interface.[get].
 
int32_t lsm6dso32_boot_set (stmdev_ctx_t *ctx, uint8_t val)
 Reboot memory content. Reload the calibration parameters.[set].
 
int32_t lsm6dso32_boot_get (stmdev_ctx_t *ctx, uint8_t *val)
 Reboot memory content. Reload the calibration parameters.[get].
 
int32_t lsm6dso32_xl_self_test_set (stmdev_ctx_t *ctx, lsm6dso32_st_xl_t val)
 Linear acceleration sensor self-test enable.[set].
 
int32_t lsm6dso32_xl_self_test_get (stmdev_ctx_t *ctx, lsm6dso32_st_xl_t *val)
 Linear acceleration sensor self-test enable.[get].
 
int32_t lsm6dso32_gy_self_test_set (stmdev_ctx_t *ctx, lsm6dso32_st_g_t val)
 Angular rate sensor self-test enable.[set].
 
int32_t lsm6dso32_gy_self_test_get (stmdev_ctx_t *ctx, lsm6dso32_st_g_t *val)
 Angular rate sensor self-test enable.[get].
 
int32_t lsm6dso32_xl_filter_lp2_set (stmdev_ctx_t *ctx, uint8_t val)
 Accelerometer output from LPF2 filtering stage selection.[set].
 
int32_t lsm6dso32_xl_filter_lp2_get (stmdev_ctx_t *ctx, uint8_t *val)
 Accelerometer output from LPF2 filtering stage selection.[get].
 
int32_t lsm6dso32_gy_filter_lp1_set (stmdev_ctx_t *ctx, uint8_t val)
 Enables gyroscope digital LPF1 if auxiliary SPI is disabled; the bandwidth can be selected through FTYPE [2:0] in CTRL6_C (15h).[set].
 
int32_t lsm6dso32_gy_filter_lp1_get (stmdev_ctx_t *ctx, uint8_t *val)
 Enables gyroscope digital LPF1 if auxiliary SPI is disabled; the bandwidth can be selected through FTYPE [2:0] in CTRL6_C (15h).[get].
 
int32_t lsm6dso32_filter_settling_mask_set (stmdev_ctx_t *ctx, uint8_t val)
 Mask DRDY on pin (both XL & Gyro) until filter settling ends (XL and Gyro independently masked).[set].
 
int32_t lsm6dso32_filter_settling_mask_get (stmdev_ctx_t *ctx, uint8_t *val)
 Mask DRDY on pin (both XL & Gyro) until filter settling ends (XL and Gyro independently masked).[get].
 
int32_t lsm6dso32_gy_lp1_bandwidth_set (stmdev_ctx_t *ctx, lsm6dso32_ftype_t val)
 Gyroscope lp1 bandwidth.[set].
 
int32_t lsm6dso32_gy_lp1_bandwidth_get (stmdev_ctx_t *ctx, lsm6dso32_ftype_t *val)
 Gyroscope lp1 bandwidth.[get].
 
int32_t lsm6dso32_xl_lp2_on_6d_set (stmdev_ctx_t *ctx, uint8_t val)
 Low pass filter 2 on 6D function selection.[set].
 
int32_t lsm6dso32_xl_lp2_on_6d_get (stmdev_ctx_t *ctx, uint8_t *val)
 Low pass filter 2 on 6D function selection.[get].
 
int32_t lsm6dso32_xl_hp_path_on_out_set (stmdev_ctx_t *ctx, lsm6dso32_hp_slope_xl_en_t val)
 Accelerometer slope filter / high-pass filter selection on output.[set].
 
int32_t lsm6dso32_xl_hp_path_on_out_get (stmdev_ctx_t *ctx, lsm6dso32_hp_slope_xl_en_t *val)
 Accelerometer slope filter / high-pass filter selection on output.[get].
 
int32_t lsm6dso32_xl_fast_settling_set (stmdev_ctx_t *ctx, uint8_t val)
 Enables accelerometer LPF2 and HPF fast-settling mode. The filter sets the second samples after writing this bit. Active only during device exit from power-down mode.[set].
 
int32_t lsm6dso32_xl_fast_settling_get (stmdev_ctx_t *ctx, uint8_t *val)
 Enables accelerometer LPF2 and HPF fast-settling mode. The filter sets the second samples after writing this bit. Active only during device exit from power-down mode.[get].
 
int32_t lsm6dso32_xl_hp_path_internal_set (stmdev_ctx_t *ctx, lsm6dso32_slope_fds_t val)
 HPF or SLOPE filter selection on wake-up and Activity/Inactivity functions.[set].
 
int32_t lsm6dso32_xl_hp_path_internal_get (stmdev_ctx_t *ctx, lsm6dso32_slope_fds_t *val)
 HPF or SLOPE filter selection on wake-up and Activity/Inactivity functions.[get].
 
int32_t lsm6dso32_gy_hp_path_internal_set (stmdev_ctx_t *ctx, lsm6dso32_hpm_g_t val)
 Enables gyroscope digital high-pass filter. The filter is enabled only if the gyro is in HP mode.[set].
 
int32_t lsm6dso32_gy_hp_path_internal_get (stmdev_ctx_t *ctx, lsm6dso32_hpm_g_t *val)
 Enables gyroscope digital high-pass filter. The filter is enabled only if the gyro is in HP mode.[get].
 
int32_t lsm6dso32_sdo_sa0_mode_set (stmdev_ctx_t *ctx, lsm6dso32_sdo_pu_en_t val)
 Connect/Disconnect SDO/SA0 internal pull-up.[set].
 
int32_t lsm6dso32_sdo_sa0_mode_get (stmdev_ctx_t *ctx, lsm6dso32_sdo_pu_en_t *val)
 Connect/Disconnect SDO/SA0 internal pull-up.[get].
 
int32_t lsm6dso32_spi_mode_set (stmdev_ctx_t *ctx, lsm6dso32_sim_t val)
 SPI Serial Interface Mode selection.[set].
 
int32_t lsm6dso32_spi_mode_get (stmdev_ctx_t *ctx, lsm6dso32_sim_t *val)
 SPI Serial Interface Mode selection.[get].
 
int32_t lsm6dso32_i2c_interface_set (stmdev_ctx_t *ctx, lsm6dso32_i2c_disable_t val)
 Disable / Enable I2C interface.[set].
 
int32_t lsm6dso32_i2c_interface_get (stmdev_ctx_t *ctx, lsm6dso32_i2c_disable_t *val)
 Disable / Enable I2C interface.[get].
 
int32_t lsm6dso32_i3c_disable_set (stmdev_ctx_t *ctx, lsm6dso32_i3c_disable_t val)
 I3C Enable/Disable communication protocol[.set].
 
int32_t lsm6dso32_i3c_disable_get (stmdev_ctx_t *ctx, lsm6dso32_i3c_disable_t *val)
 I3C Enable/Disable communication protocol.[get].
 
int32_t lsm6dso32_int1_mode_set (stmdev_ctx_t *ctx, lsm6dso32_int1_pd_en_t val)
 Connect/Disconnect INT1 internal pull-down.[set].
 
int32_t lsm6dso32_int1_mode_get (stmdev_ctx_t *ctx, lsm6dso32_int1_pd_en_t *val)
 Connect/Disconnect INT1 internal pull-down.[get].
 
int32_t lsm6dso32_pin_int1_route_set (stmdev_ctx_t *ctx, lsm6dso32_pin_int1_route_t *val)
 Select the signal that need to route on int1 pad.[set].
 
int32_t lsm6dso32_pin_int1_route_get (stmdev_ctx_t *ctx, lsm6dso32_pin_int1_route_t *val)
 Select the signal that need to route on int1 pad.[get].
 
int32_t lsm6dso32_pin_int2_route_set (stmdev_ctx_t *ctx, lsm6dso32_pin_int2_route_t *val)
 Select the signal that need to route on int2 pad.[set].
 
int32_t lsm6dso32_pin_int2_route_get (stmdev_ctx_t *ctx, lsm6dso32_pin_int2_route_t *val)
 Select the signal that need to route on int2 pad.[get].
 
int32_t lsm6dso32_pin_mode_set (stmdev_ctx_t *ctx, lsm6dso32_pp_od_t val)
 Push-pull/open drain selection on interrupt pads.[set].
 
int32_t lsm6dso32_pin_mode_get (stmdev_ctx_t *ctx, lsm6dso32_pp_od_t *val)
 Push-pull/open drain selection on interrupt pads.[get].
 
int32_t lsm6dso32_pin_polarity_set (stmdev_ctx_t *ctx, lsm6dso32_h_lactive_t val)
 Interrupt active-high/low.[set].
 
int32_t lsm6dso32_pin_polarity_get (stmdev_ctx_t *ctx, lsm6dso32_h_lactive_t *val)
 Interrupt active-high/low.[get].
 
int32_t lsm6dso32_all_on_int1_set (stmdev_ctx_t *ctx, uint8_t val)
 All interrupt signals become available on INT1 pin.[set].
 
int32_t lsm6dso32_all_on_int1_get (stmdev_ctx_t *ctx, uint8_t *val)
 All interrupt signals become available on INT1 pin.[get].
 
int32_t lsm6dso32_int_notification_set (stmdev_ctx_t *ctx, lsm6dso32_lir_t val)
 Interrupt notification mode.[set].
 
int32_t lsm6dso32_int_notification_get (stmdev_ctx_t *ctx, lsm6dso32_lir_t *val)
 Interrupt notification mode.[get].
 
int32_t lsm6dso32_wkup_ths_weight_set (stmdev_ctx_t *ctx, lsm6dso32_wake_ths_w_t val)
 Weight of 1 LSB of wakeup threshold.[set] 0: 1 LSB =FS_XL / 64 1: 1 LSB = FS_XL / 256.
 
int32_t lsm6dso32_wkup_ths_weight_get (stmdev_ctx_t *ctx, lsm6dso32_wake_ths_w_t *val)
 Weight of 1 LSB of wakeup threshold.[get] 0: 1 LSB =FS_XL / 64 1: 1 LSB = FS_XL / 256.
 
int32_t lsm6dso32_wkup_threshold_set (stmdev_ctx_t *ctx, uint8_t val)
 Threshold for wakeup: 1 LSB weight depends on WAKE_THS_W in WAKE_UP_DUR.[set].
 
int32_t lsm6dso32_wkup_threshold_get (stmdev_ctx_t *ctx, uint8_t *val)
 Threshold for wakeup: 1 LSB weight depends on WAKE_THS_W in WAKE_UP_DUR.[get].
 
int32_t lsm6dso32_xl_usr_offset_on_wkup_set (stmdev_ctx_t *ctx, uint8_t val)
 Wake up duration event.[set] 1LSb = 1 / ODR.
 
int32_t lsm6dso32_xl_usr_offset_on_wkup_get (stmdev_ctx_t *ctx, uint8_t *val)
 Wake up duration event.[get] 1LSb = 1 / ODR.
 
int32_t lsm6dso32_wkup_dur_set (stmdev_ctx_t *ctx, uint8_t val)
 Wake up duration event.[set] 1LSb = 1 / ODR.
 
int32_t lsm6dso32_wkup_dur_get (stmdev_ctx_t *ctx, uint8_t *val)
 Wake up duration event.[get] 1LSb = 1 / ODR.
 
int32_t lsm6dso32_gy_sleep_mode_set (stmdev_ctx_t *ctx, uint8_t val)
 Enables gyroscope Sleep mode.[set].
 
int32_t lsm6dso32_gy_sleep_mode_get (stmdev_ctx_t *ctx, uint8_t *val)
 Enables gyroscope Sleep mode.[get].
 
int32_t lsm6dso32_act_pin_notification_set (stmdev_ctx_t *ctx, lsm6dso32_sleep_status_on_int_t val)
 Drives the sleep status instead of sleep change on INT pins (only if INT1_SLEEP_CHANGE or INT2_SLEEP_CHANGE bits are enabled).[set].
 
int32_t lsm6dso32_act_pin_notification_get (stmdev_ctx_t *ctx, lsm6dso32_sleep_status_on_int_t *val)
 Drives the sleep status instead of sleep change on INT pins (only if INT1_SLEEP_CHANGE or INT2_SLEEP_CHANGE bits are enabled).[get].
 
int32_t lsm6dso32_act_mode_set (stmdev_ctx_t *ctx, lsm6dso32_inact_en_t val)
 Enable inactivity function.[set].
 
int32_t lsm6dso32_act_mode_get (stmdev_ctx_t *ctx, lsm6dso32_inact_en_t *val)
 Enable inactivity function.[get].
 
int32_t lsm6dso32_act_sleep_dur_set (stmdev_ctx_t *ctx, uint8_t val)
 Duration to go in sleep mode.[set] 1 LSb = 512 / ODR.
 
int32_t lsm6dso32_act_sleep_dur_get (stmdev_ctx_t *ctx, uint8_t *val)
 Duration to go in sleep mode.[get] 1 LSb = 512 / ODR.
 
int32_t lsm6dso32_tap_detection_on_z_set (stmdev_ctx_t *ctx, uint8_t val)
 Enable Z direction in tap recognition.[set].
 
int32_t lsm6dso32_tap_detection_on_z_get (stmdev_ctx_t *ctx, uint8_t *val)
 Enable Z direction in tap recognition.[get].
 
int32_t lsm6dso32_tap_detection_on_y_set (stmdev_ctx_t *ctx, uint8_t val)
 Enable Y direction in tap recognition.[set].
 
int32_t lsm6dso32_tap_detection_on_y_get (stmdev_ctx_t *ctx, uint8_t *val)
 Enable Y direction in tap recognition.[get].
 
int32_t lsm6dso32_tap_detection_on_x_set (stmdev_ctx_t *ctx, uint8_t val)
 Enable X direction in tap recognition.[set].
 
int32_t lsm6dso32_tap_detection_on_x_get (stmdev_ctx_t *ctx, uint8_t *val)
 Enable X direction in tap recognition.[get].
 
int32_t lsm6dso32_tap_threshold_x_set (stmdev_ctx_t *ctx, uint8_t val)
 X-axis tap recognition threshold.[set].
 
int32_t lsm6dso32_tap_threshold_x_get (stmdev_ctx_t *ctx, uint8_t *val)
 X-axis tap recognition threshold.[get].
 
int32_t lsm6dso32_tap_axis_priority_set (stmdev_ctx_t *ctx, lsm6dso32_tap_priority_t val)
 Selection of axis priority for TAP detection.[set].
 
int32_t lsm6dso32_tap_axis_priority_get (stmdev_ctx_t *ctx, lsm6dso32_tap_priority_t *val)
 Selection of axis priority for TAP detection.[get].
 
int32_t lsm6dso32_tap_threshold_y_set (stmdev_ctx_t *ctx, uint8_t val)
 Y-axis tap recognition threshold.[set].
 
int32_t lsm6dso32_tap_threshold_y_get (stmdev_ctx_t *ctx, uint8_t *val)
 Y-axis tap recognition threshold.[get].
 
int32_t lsm6dso32_tap_threshold_z_set (stmdev_ctx_t *ctx, uint8_t val)
 Z-axis recognition threshold.[set].
 
int32_t lsm6dso32_tap_threshold_z_get (stmdev_ctx_t *ctx, uint8_t *val)
 Z-axis recognition threshold.[get].
 
int32_t lsm6dso32_tap_shock_set (stmdev_ctx_t *ctx, uint8_t val)
 Maximum duration is the maximum time of an over threshold signal detection to be recognized as a tap event. The default value of these bits is 00b which corresponds to 4*ODR_XL time. If the SHOCK[1:0] bits are set to a different value, 1LSB corresponds to 8*ODR_XL time.[set].
 
int32_t lsm6dso32_tap_shock_get (stmdev_ctx_t *ctx, uint8_t *val)
 Maximum duration is the maximum time of an over threshold signal detection to be recognized as a tap event. The default value of these bits is 00b which corresponds to 4*ODR_XL time. If the SHOCK[1:0] bits are set to a different value, 1LSB corresponds to 8*ODR_XL time.[get].
 
int32_t lsm6dso32_tap_quiet_set (stmdev_ctx_t *ctx, uint8_t val)
 Quiet time is the time after the first detected tap in which there must not be any over threshold event. The default value of these bits is 00b which corresponds to 2*ODR_XL time. If the QUIET[1:0] bits are set to a different value, 1LSB corresponds to 4*ODR_XL time.[set].
 
int32_t lsm6dso32_tap_quiet_get (stmdev_ctx_t *ctx, uint8_t *val)
 Quiet time is the time after the first detected tap in which there must not be any over threshold event. The default value of these bits is 00b which corresponds to 2*ODR_XL time. If the QUIET[1:0] bits are set to a different value, 1LSB corresponds to 4*ODR_XL time.[get].
 
int32_t lsm6dso32_tap_dur_set (stmdev_ctx_t *ctx, uint8_t val)
 When double tap recognition is enabled, this register expresses the maximum time between two consecutive detected taps to determine a double tap event. The default value of these bits is 0000b which corresponds to 16*ODR_XL time. If the DUR[3:0] bits are set to a different value, 1LSB corresponds to 32*ODR_XL time.[set].
 
int32_t lsm6dso32_tap_dur_get (stmdev_ctx_t *ctx, uint8_t *val)
 When double tap recognition is enabled, this register expresses the maximum time between two consecutive detected taps to determine a double tap event. The default value of these bits is 0000b which corresponds to 16*ODR_XL time. If the DUR[3:0] bits are set to a different value, 1LSB corresponds to 32*ODR_XL time.[get].
 
int32_t lsm6dso32_tap_mode_set (stmdev_ctx_t *ctx, lsm6dso32_single_double_tap_t val)
 Single/double-tap event enable.[set].
 
int32_t lsm6dso32_tap_mode_get (stmdev_ctx_t *ctx, lsm6dso32_single_double_tap_t *val)
 Single/double-tap event enable.[get].
 
int32_t lsm6dso32_6d_threshold_set (stmdev_ctx_t *ctx, lsm6dso32_sixd_ths_t val)
 Threshold for 4D/6D function.[set].
 
int32_t lsm6dso32_6d_threshold_get (stmdev_ctx_t *ctx, lsm6dso32_sixd_ths_t *val)
 Threshold for 4D/6D function.[get].
 
int32_t lsm6dso32_4d_mode_set (stmdev_ctx_t *ctx, uint8_t val)
 4D orientation detection enable.[set]
 
int32_t lsm6dso32_4d_mode_get (stmdev_ctx_t *ctx, uint8_t *val)
 4D orientation detection enable.[get]
 
int32_t lsm6dso32_ff_threshold_set (stmdev_ctx_t *ctx, lsm6dso32_ff_ths_t val)
 Free fall threshold setting.[set].
 
int32_t lsm6dso32_ff_threshold_get (stmdev_ctx_t *ctx, lsm6dso32_ff_ths_t *val)
 Free fall threshold setting.[get].
 
int32_t lsm6dso32_ff_dur_set (stmdev_ctx_t *ctx, uint8_t val)
 Free-fall duration event.[set] 1LSb = 1 / ODR.
 
int32_t lsm6dso32_ff_dur_get (stmdev_ctx_t *ctx, uint8_t *val)
 Free-fall duration event.[get] 1LSb = 1 / ODR.
 
int32_t lsm6dso32_fifo_watermark_set (stmdev_ctx_t *ctx, uint16_t val)
 FIFO watermark level selection.[set].
 
int32_t lsm6dso32_fifo_watermark_get (stmdev_ctx_t *ctx, uint16_t *val)
 FIFO watermark level selection.[get].
 
int32_t lsm6dso32_compression_algo_init_set (stmdev_ctx_t *ctx, uint8_t val)
 FIFO compression feature initialization request [set].
 
int32_t lsm6dso32_compression_algo_init_get (stmdev_ctx_t *ctx, uint8_t *val)
 FIFO compression feature initialization request [get].
 
int32_t lsm6dso32_compression_algo_set (stmdev_ctx_t *ctx, lsm6dso32_uncoptr_rate_t val)
 Enable and configure compression algo.[set].
 
int32_t lsm6dso32_compression_algo_get (stmdev_ctx_t *ctx, lsm6dso32_uncoptr_rate_t *val)
 Enable and configure compression algo.[get].
 
int32_t lsm6dso32_fifo_virtual_sens_odr_chg_set (stmdev_ctx_t *ctx, uint8_t val)
 Enables ODR CHANGE virtual sensor to be batched in FIFO.[set].
 
int32_t lsm6dso32_fifo_virtual_sens_odr_chg_get (stmdev_ctx_t *ctx, uint8_t *val)
 Enables ODR CHANGE virtual sensor to be batched in FIFO.[get].
 
int32_t lsm6dso32_compression_algo_real_time_set (stmdev_ctx_t *ctx, uint8_t val)
 Enables/Disables compression algorithm runtime.[set].
 
int32_t lsm6dso32_compression_algo_real_time_get (stmdev_ctx_t *ctx, uint8_t *val)
 Enables/Disables compression algorithm runtime.[get].
 
int32_t lsm6dso32_fifo_stop_on_wtm_set (stmdev_ctx_t *ctx, uint8_t val)
 Sensing chain FIFO stop values memorization at threshold level.[set].
 
int32_t lsm6dso32_fifo_stop_on_wtm_get (stmdev_ctx_t *ctx, uint8_t *val)
 Sensing chain FIFO stop values memorization at threshold level.[get].
 
int32_t lsm6dso32_fifo_xl_batch_set (stmdev_ctx_t *ctx, lsm6dso32_bdr_xl_t val)
 Selects Batching Data Rate (writing frequency in FIFO) for accelerometer data.[set].
 
int32_t lsm6dso32_fifo_xl_batch_get (stmdev_ctx_t *ctx, lsm6dso32_bdr_xl_t *val)
 Selects Batching Data Rate (writing frequency in FIFO) for accelerometer data.[get].
 
int32_t lsm6dso32_fifo_gy_batch_set (stmdev_ctx_t *ctx, lsm6dso32_bdr_gy_t val)
 Selects Batching Data Rate (writing frequency in FIFO) for gyroscope data.[set].
 
int32_t lsm6dso32_fifo_gy_batch_get (stmdev_ctx_t *ctx, lsm6dso32_bdr_gy_t *val)
 Selects Batching Data Rate (writing frequency in FIFO) for gyroscope data.[get].
 
int32_t lsm6dso32_fifo_mode_set (stmdev_ctx_t *ctx, lsm6dso32_fifo_mode_t val)
 FIFO mode selection.[set].
 
int32_t lsm6dso32_fifo_mode_get (stmdev_ctx_t *ctx, lsm6dso32_fifo_mode_t *val)
 FIFO mode selection.[get].
 
int32_t lsm6dso32_fifo_temp_batch_set (stmdev_ctx_t *ctx, lsm6dso32_odr_t_batch_t val)
 Selects Batching Data Rate (writing frequency in FIFO) for temperature data.[set].
 
int32_t lsm6dso32_fifo_temp_batch_get (stmdev_ctx_t *ctx, lsm6dso32_odr_t_batch_t *val)
 Selects Batching Data Rate (writing frequency in FIFO) for temperature data.[get].
 
int32_t lsm6dso32_fifo_timestamp_decimation_set (stmdev_ctx_t *ctx, lsm6dso32_odr_ts_batch_t val)
 Selects decimation for timestamp batching in FIFO. Writing rate will be the maximum rate between XL and GYRO BDR divided by decimation decoder.[set].
 
int32_t lsm6dso32_fifo_timestamp_decimation_get (stmdev_ctx_t *ctx, lsm6dso32_odr_ts_batch_t *val)
 Selects decimation for timestamp batching in FIFO. Writing rate will be the maximum rate between XL and GYRO BDR divided by decimation decoder.[get].
 
int32_t lsm6dso32_fifo_cnt_event_batch_set (stmdev_ctx_t *ctx, lsm6dso32_trig_counter_bdr_t val)
 Selects the trigger for the internal counter of batching events between XL and gyro.[set].
 
int32_t lsm6dso32_fifo_cnt_event_batch_get (stmdev_ctx_t *ctx, lsm6dso32_trig_counter_bdr_t *val)
 Selects the trigger for the internal counter of batching events between XL and gyro.[get].
 
int32_t lsm6dso32_rst_batch_counter_set (stmdev_ctx_t *ctx, uint8_t val)
 Resets the internal counter of batching vents for a single sensor. This bit is automatically reset to zero if it was set to ‘1’.[set].
 
int32_t lsm6dso32_rst_batch_counter_get (stmdev_ctx_t *ctx, uint8_t *val)
 Resets the internal counter of batching events for a single sensor. This bit is automatically reset to zero if it was set to ‘1’.[get].
 
int32_t lsm6dso32_batch_counter_threshold_set (stmdev_ctx_t *ctx, uint16_t val)
 Batch data rate counter.[set].
 
int32_t lsm6dso32_batch_counter_threshold_get (stmdev_ctx_t *ctx, uint16_t *val)
 Batch data rate counter.[get].
 
int32_t lsm6dso32_fifo_data_level_get (stmdev_ctx_t *ctx, uint16_t *val)
 Number of unread sensor data(TAG + 6 bytes) stored in FIFO.[get].
 
int32_t lsm6dso32_fifo_status_get (stmdev_ctx_t *ctx, lsm6dso32_fifo_status2_t *val)
 FIFO status.[get].
 
int32_t lsm6dso32_fifo_full_flag_get (stmdev_ctx_t *ctx, uint8_t *val)
 Smart FIFO full status.[get].
 
int32_t lsm6dso32_fifo_ovr_flag_get (stmdev_ctx_t *ctx, uint8_t *val)
 FIFO overrun status.[get].
 
int32_t lsm6dso32_fifo_wtm_flag_get (stmdev_ctx_t *ctx, uint8_t *val)
 FIFO watermark status.[get].
 
int32_t lsm6dso32_fifo_sensor_tag_get (stmdev_ctx_t *ctx, lsm6dso32_fifo_tag_t *val)
 Identifies the sensor in FIFO_DATA_OUT.[get].
 
int32_t lsm6dso32_fifo_pedo_batch_set (stmdev_ctx_t *ctx, uint8_t val)
 : Enable FIFO batching of pedometer embedded function values.[set]
 
int32_t lsm6dso32_fifo_pedo_batch_get (stmdev_ctx_t *ctx, uint8_t *val)
 Enable FIFO batching of pedometer embedded function values.[get].
 
int32_t lsm6dso32_sh_batch_slave_0_set (stmdev_ctx_t *ctx, uint8_t val)
 Enable FIFO batching data of first slave.[set].
 
int32_t lsm6dso32_sh_batch_slave_0_get (stmdev_ctx_t *ctx, uint8_t *val)
 Enable FIFO batching data of first slave.[get].
 
int32_t lsm6dso32_sh_batch_slave_1_set (stmdev_ctx_t *ctx, uint8_t val)
 Enable FIFO batching data of second slave.[set].
 
int32_t lsm6dso32_sh_batch_slave_1_get (stmdev_ctx_t *ctx, uint8_t *val)
 Enable FIFO batching data of second slave.[get].
 
int32_t lsm6dso32_sh_batch_slave_2_set (stmdev_ctx_t *ctx, uint8_t val)
 Enable FIFO batching data of third slave.[set].
 
int32_t lsm6dso32_sh_batch_slave_2_get (stmdev_ctx_t *ctx, uint8_t *val)
 Enable FIFO batching data of third slave.[get].
 
int32_t lsm6dso32_sh_batch_slave_3_set (stmdev_ctx_t *ctx, uint8_t val)
 Enable FIFO batching data of fourth slave.[set].
 
int32_t lsm6dso32_sh_batch_slave_3_get (stmdev_ctx_t *ctx, uint8_t *val)
 Enable FIFO batching data of fourth slave.[get].
 
int32_t lsm6dso32_den_mode_set (stmdev_ctx_t *ctx, lsm6dso32_den_mode_t val)
 DEN functionality marking mode.[set].
 
int32_t lsm6dso32_den_mode_get (stmdev_ctx_t *ctx, lsm6dso32_den_mode_t *val)
 DEN functionality marking mode.[get].
 
int32_t lsm6dso32_den_polarity_set (stmdev_ctx_t *ctx, lsm6dso32_den_lh_t val)
 DEN active level configuration.[set].
 
int32_t lsm6dso32_den_polarity_get (stmdev_ctx_t *ctx, lsm6dso32_den_lh_t *val)
 DEN active level configuration.[get].
 
int32_t lsm6dso32_den_enable_set (stmdev_ctx_t *ctx, lsm6dso32_den_xl_g_t val)
 DEN enable.[set].
 
int32_t lsm6dso32_den_enable_get (stmdev_ctx_t *ctx, lsm6dso32_den_xl_g_t *val)
 DEN enable.[get].
 
int32_t lsm6dso32_den_mark_axis_x_set (stmdev_ctx_t *ctx, uint8_t val)
 DEN value stored in LSB of X-axis.[set].
 
int32_t lsm6dso32_den_mark_axis_x_get (stmdev_ctx_t *ctx, uint8_t *val)
 DEN value stored in LSB of X-axis.[get].
 
int32_t lsm6dso32_den_mark_axis_y_set (stmdev_ctx_t *ctx, uint8_t val)
 DEN value stored in LSB of Y-axis.[set].
 
int32_t lsm6dso32_den_mark_axis_y_get (stmdev_ctx_t *ctx, uint8_t *val)
 DEN value stored in LSB of Y-axis.[get].
 
int32_t lsm6dso32_den_mark_axis_z_set (stmdev_ctx_t *ctx, uint8_t val)
 DEN value stored in LSB of Z-axis.[set].
 
int32_t lsm6dso32_den_mark_axis_z_get (stmdev_ctx_t *ctx, uint8_t *val)
 DEN value stored in LSB of Z-axis.[get].
 
int32_t lsm6dso32_pedo_sens_set (stmdev_ctx_t *ctx, lsm6dso32_pedo_md_t val)
 Enable pedometer algorithm.[set].
 
int32_t lsm6dso32_pedo_sens_get (stmdev_ctx_t *ctx, lsm6dso32_pedo_md_t *val)
 Enable pedometer algorithm.[get].
 
int32_t lsm6dso32_pedo_step_detect_get (stmdev_ctx_t *ctx, uint8_t *val)
 Interrupt status bit for step detection.[get].
 
int32_t lsm6dso32_pedo_debounce_steps_set (stmdev_ctx_t *ctx, uint8_t *buff)
 Pedometer debounce configuration register (r/w).[set].
 
int32_t lsm6dso32_pedo_debounce_steps_get (stmdev_ctx_t *ctx, uint8_t *buff)
 Pedometer debounce configuration register (r/w).[get].
 
int32_t lsm6dso32_pedo_steps_period_set (stmdev_ctx_t *ctx, uint16_t val)
 Time period register for step detection on delta time (r/w).[set].
 
int32_t lsm6dso32_pedo_steps_period_get (stmdev_ctx_t *ctx, uint16_t *val)
 Time period register for step detection on delta time (r/w).[get].
 
int32_t lsm6dso32_pedo_int_mode_set (stmdev_ctx_t *ctx, lsm6dso32_carry_count_en_t val)
 Set when user wants to generate interrupt on count overflow event/every step.[set].
 
int32_t lsm6dso32_pedo_int_mode_get (stmdev_ctx_t *ctx, lsm6dso32_carry_count_en_t *val)
 Set when user wants to generate interrupt on count overflow event/every step.[get].
 
int32_t lsm6dso32_motion_sens_set (stmdev_ctx_t *ctx, uint8_t val)
 Enable significant motion detection function.[set].
 
int32_t lsm6dso32_motion_sens_get (stmdev_ctx_t *ctx, uint8_t *val)
 Enable significant motion detection function.[get].
 
int32_t lsm6dso32_motion_flag_data_ready_get (stmdev_ctx_t *ctx, uint8_t *val)
 Interrupt status bit for significant motion detection.[get].
 
int32_t lsm6dso32_tilt_sens_set (stmdev_ctx_t *ctx, uint8_t val)
 Enable tilt calculation.[set].
 
int32_t lsm6dso32_tilt_sens_get (stmdev_ctx_t *ctx, uint8_t *val)
 Enable tilt calculation.[get].
 
int32_t lsm6dso32_tilt_flag_data_ready_get (stmdev_ctx_t *ctx, uint8_t *val)
 Interrupt status bit for tilt detection.[get].
 
int32_t lsm6dso32_mag_sensitivity_set (stmdev_ctx_t *ctx, uint16_t val)
 External magnetometer sensitivity value register.[set].
 
int32_t lsm6dso32_mag_sensitivity_get (stmdev_ctx_t *ctx, uint16_t *val)
 External magnetometer sensitivity value register.[get].
 
int32_t lsm6dso32_mag_offset_set (stmdev_ctx_t *ctx, int16_t *val)
 Offset for hard-iron compensation register (r/w).[set].
 
int32_t lsm6dso32_mag_offset_get (stmdev_ctx_t *ctx, int16_t *val)
 Offset for hard-iron compensation register (r/w).[get].
 
int32_t lsm6dso32_mag_soft_iron_set (stmdev_ctx_t *ctx, int16_t *val)
 Soft-iron (3x3 symmetric) matrix correction register (r/w). The value is expressed as half-precision floating-point format: SEEEEEFFFFFFFFFF S: 1 sign bit; E: 5 exponent bits; F: 10 fraction bits).[set].
 
int32_t lsm6dso32_mag_soft_iron_get (stmdev_ctx_t *ctx, int16_t *val)
 Soft-iron (3x3 symmetric) matrix correction register (r/w). The value is expressed as half-precision floating-point format: SEEEEEFFFFFFFFFF S: 1 sign bit; E: 5 exponent bits; F: 10 fraction bits.[get].
 
int32_t lsm6dso32_mag_z_orient_set (stmdev_ctx_t *ctx, lsm6dso32_mag_z_axis_t val)
 Magnetometer Z-axis coordinates rotation (to be aligned to accelerometer/gyroscope axes orientation).[set].
 
int32_t lsm6dso32_mag_z_orient_get (stmdev_ctx_t *ctx, lsm6dso32_mag_z_axis_t *val)
 Magnetometer Z-axis coordinates rotation (to be aligned to accelerometer/gyroscope axes orientation).[get].
 
int32_t lsm6dso32_mag_y_orient_set (stmdev_ctx_t *ctx, lsm6dso32_mag_y_axis_t val)
 Magnetometer Y-axis coordinates rotation (to be aligned to accelerometer/gyroscope axes orientation).[set].
 
int32_t lsm6dso32_mag_y_orient_get (stmdev_ctx_t *ctx, lsm6dso32_mag_y_axis_t *val)
 Magnetometer Y-axis coordinates rotation (to be aligned to accelerometer/gyroscope axes orientation).[get].
 
int32_t lsm6dso32_mag_x_orient_set (stmdev_ctx_t *ctx, lsm6dso32_mag_x_axis_t val)
 Magnetometer X-axis coordinates rotation (to be aligned to accelerometer/gyroscope axes orientation).[set].
 
int32_t lsm6dso32_mag_x_orient_get (stmdev_ctx_t *ctx, lsm6dso32_mag_x_axis_t *val)
 Magnetometer X-axis coordinates rotation (to be aligned to accelerometer/gyroscope axes orientation).[get].
 
int32_t lsm6dso32_long_cnt_flag_data_ready_get (stmdev_ctx_t *ctx, uint8_t *val)
 Interrupt status bit for FSM long counter timeout interrupt event.[get].
 
int32_t lsm6dso32_emb_fsm_en_set (stmdev_ctx_t *ctx, uint8_t val)
 Final State Machine global enable.[set].
 
int32_t lsm6dso32_emb_fsm_en_get (stmdev_ctx_t *ctx, uint8_t *val)
 Final State Machine global enable.[get].
 
int32_t lsm6dso32_fsm_enable_set (stmdev_ctx_t *ctx, lsm6dso32_emb_fsm_enable_t *val)
 Final State Machine enable.[set].
 
int32_t lsm6dso32_fsm_enable_get (stmdev_ctx_t *ctx, lsm6dso32_emb_fsm_enable_t *val)
 Final State Machine enable.[get].
 
int32_t lsm6dso32_long_cnt_set (stmdev_ctx_t *ctx, uint16_t val)
 FSM long counter status register. Long counter value is an unsigned integer value (16-bit format).[set].
 
int32_t lsm6dso32_long_cnt_get (stmdev_ctx_t *ctx, uint16_t *val)
 FSM long counter status register. Long counter value is an unsigned integer value (16-bit format).[get].
 
int32_t lsm6dso32_long_clr_set (stmdev_ctx_t *ctx, lsm6dso32_fsm_lc_clr_t val)
 Clear FSM long counter value.[set].
 
int32_t lsm6dso32_long_clr_get (stmdev_ctx_t *ctx, lsm6dso32_fsm_lc_clr_t *val)
 Clear FSM long counter value.[get].
 
int32_t lsm6dso32_fsm_out_get (stmdev_ctx_t *ctx, lsm6dso32_fsm_out_t *val)
 FSM output registers[get].
 
int32_t lsm6dso32_fsm_data_rate_set (stmdev_ctx_t *ctx, lsm6dso32_fsm_odr_t val)
 Finite State Machine ODR configuration.[set].
 
int32_t lsm6dso32_fsm_data_rate_get (stmdev_ctx_t *ctx, lsm6dso32_fsm_odr_t *val)
 Finite State Machine ODR configuration.[get].
 
int32_t lsm6dso32_fsm_init_set (stmdev_ctx_t *ctx, uint8_t val)
 FSM initialization request.[set].
 
int32_t lsm6dso32_fsm_init_get (stmdev_ctx_t *ctx, uint8_t *val)
 FSM initialization request.[get].
 
int32_t lsm6dso32_long_cnt_int_value_set (stmdev_ctx_t *ctx, uint16_t val)
 FSM long counter timeout register (r/w). The long counter timeout value is an unsigned integer value (16-bit format). When the long counter value reached this value, the FSM generates an interrupt.[set].
 
int32_t lsm6dso32_long_cnt_int_value_get (stmdev_ctx_t *ctx, uint16_t *val)
 FSM long counter timeout register (r/w). The long counter timeout value is an unsigned integer value (16-bit format). When the long counter value reached this value, the FSM generates an interrupt.[get].
 
int32_t lsm6dso32_fsm_number_of_programs_set (stmdev_ctx_t *ctx, uint8_t *buff)
 FSM number of programs register.[set].
 
int32_t lsm6dso32_fsm_number_of_programs_get (stmdev_ctx_t *ctx, uint8_t *buff)
 FSM number of programs register.[get].
 
int32_t lsm6dso32_fsm_start_address_set (stmdev_ctx_t *ctx, uint16_t val)
 FSM start address register (r/w). First available address is 0x033C.[set].
 
int32_t lsm6dso32_fsm_start_address_get (stmdev_ctx_t *ctx, uint16_t *val)
 FSM start address register (r/w). First available address is 0x033C.[get].
 
int32_t lsm6dso32_sh_read_data_raw_get (stmdev_ctx_t *ctx, lsm6dso32_emb_sh_read_t *val)
 Sensor hub output registers.[get].
 
int32_t lsm6dso32_sh_slave_connected_set (stmdev_ctx_t *ctx, lsm6dso32_aux_sens_on_t val)
 Number of external sensors to be read by the sensor hub.[set].
 
int32_t lsm6dso32_sh_slave_connected_get (stmdev_ctx_t *ctx, lsm6dso32_aux_sens_on_t *val)
 Number of external sensors to be read by the sensor hub.[get].
 
int32_t lsm6dso32_sh_master_set (stmdev_ctx_t *ctx, uint8_t val)
 Sensor hub I2C master enable.[set].
 
int32_t lsm6dso32_sh_master_get (stmdev_ctx_t *ctx, uint8_t *val)
 Sensor hub I2C master enable.[get].
 
int32_t lsm6dso32_sh_pin_mode_set (stmdev_ctx_t *ctx, lsm6dso32_shub_pu_en_t val)
 Master I2C pull-up enable.[set].
 
int32_t lsm6dso32_sh_pin_mode_get (stmdev_ctx_t *ctx, lsm6dso32_shub_pu_en_t *val)
 Master I2C pull-up enable.[get].
 
int32_t lsm6dso32_sh_pass_through_set (stmdev_ctx_t *ctx, uint8_t val)
 I2C interface pass-through.[set].
 
int32_t lsm6dso32_sh_pass_through_get (stmdev_ctx_t *ctx, uint8_t *val)
 I2C interface pass-through.[get].
 
int32_t lsm6dso32_sh_syncro_mode_set (stmdev_ctx_t *ctx, lsm6dso32_start_config_t val)
 Sensor hub trigger signal selection.[set].
 
int32_t lsm6dso32_sh_syncro_mode_get (stmdev_ctx_t *ctx, lsm6dso32_start_config_t *val)
 Sensor hub trigger signal selection.[get].
 
int32_t lsm6dso32_sh_write_mode_set (stmdev_ctx_t *ctx, lsm6dso32_write_once_t val)
 Slave 0 write operation is performed only at the first sensor hub cycle.[set].
 
int32_t lsm6dso32_sh_write_mode_get (stmdev_ctx_t *ctx, lsm6dso32_write_once_t *val)
 Slave 0 write operation is performed only at the first sensor hub cycle.[get].
 
int32_t lsm6dso32_sh_reset_set (stmdev_ctx_t *ctx)
 Reset Master logic and output registers.[set].
 
int32_t lsm6dso32_sh_reset_get (stmdev_ctx_t *ctx, uint8_t *val)
 Reset Master logic and output registers.[get].
 
int32_t lsm6dso32_sh_data_rate_set (stmdev_ctx_t *ctx, lsm6dso32_shub_odr_t val)
 Rate at which the master communicates.[set].
 
int32_t lsm6dso32_sh_data_rate_get (stmdev_ctx_t *ctx, lsm6dso32_shub_odr_t *val)
 Rate at which the master communicates.[get].
 
int32_t lsm6dso32_sh_cfg_write (stmdev_ctx_t *ctx, lsm6dso32_sh_cfg_write_t *val)
 Configure slave 0 for perform a write.[set].
 
int32_t lsm6dso32_sh_slv0_cfg_read (stmdev_ctx_t *ctx, lsm6dso32_sh_cfg_read_t *val)
 Configure slave 0 for perform a read.[set].
 
int32_t lsm6dso32_sh_slv1_cfg_read (stmdev_ctx_t *ctx, lsm6dso32_sh_cfg_read_t *val)
 Configure slave 0 for perform a write/read.[set].
 
int32_t lsm6dso32_sh_slv2_cfg_read (stmdev_ctx_t *ctx, lsm6dso32_sh_cfg_read_t *val)
 Configure slave 0 for perform a write/read.[set].
 
int32_t lsm6dso32_sh_slv3_cfg_read (stmdev_ctx_t *ctx, lsm6dso32_sh_cfg_read_t *val)
 Configure slave 0 for perform a write/read.[set].
 
int32_t lsm6dso32_sh_status_get (stmdev_ctx_t *ctx, lsm6dso32_status_master_t *val)
 Sensor hub source register.[get].
 

Detailed Description

This file contains all the functions prototypes for the lsm6dso32_reg.c driver.

Author
Sensors Software Solution Team
Attention

© Copyright (c) 2021 STMicroelectronics. All rights reserved.

This software component is licensed by ST under BSD 3-Clause license, the "License"; You may not use this file except in compliance with the License. You may obtain a copy of the License at: opensource.org/licenses/BSD-3-Clause

Definition in file lsm6dso32_reg.h.

Macro Definition Documentation

◆ __weak

#define __weak   __attribute__((weak))

Definition at line 2640 of file lsm6dso32_reg.h.

◆ LSM6DSO32_ALL_INT_SRC

#define LSM6DSO32_ALL_INT_SRC   0x1AU

Definition at line 540 of file lsm6dso32_reg.h.

◆ LSM6DSO32_COUNTER_BDR_REG1

#define LSM6DSO32_COUNTER_BDR_REG1   0x0BU

Definition at line 277 of file lsm6dso32_reg.h.

◆ LSM6DSO32_COUNTER_BDR_REG2

#define LSM6DSO32_COUNTER_BDR_REG2   0x0CU

Definition at line 295 of file lsm6dso32_reg.h.

◆ LSM6DSO32_CTRL10_C

#define LSM6DSO32_CTRL10_C   0x19U

Definition at line 526 of file lsm6dso32_reg.h.

◆ LSM6DSO32_CTRL1_XL

#define LSM6DSO32_CTRL1_XL   0x10U

Definition at line 350 of file lsm6dso32_reg.h.

◆ LSM6DSO32_CTRL2_G

#define LSM6DSO32_CTRL2_G   0x11U

Definition at line 366 of file lsm6dso32_reg.h.

◆ LSM6DSO32_CTRL3_C

#define LSM6DSO32_CTRL3_C   0x12U

Definition at line 380 of file lsm6dso32_reg.h.

◆ LSM6DSO32_CTRL4_C

#define LSM6DSO32_CTRL4_C   0x13U

Definition at line 404 of file lsm6dso32_reg.h.

◆ LSM6DSO32_CTRL5_C

#define LSM6DSO32_CTRL5_C   0x14U

Definition at line 428 of file lsm6dso32_reg.h.

◆ LSM6DSO32_CTRL6_C

#define LSM6DSO32_CTRL6_C   0x15U

Definition at line 446 of file lsm6dso32_reg.h.

◆ LSM6DSO32_CTRL7_G

#define LSM6DSO32_CTRL7_G   0x16U

Definition at line 464 of file lsm6dso32_reg.h.

◆ LSM6DSO32_CTRL8_XL

#define LSM6DSO32_CTRL8_XL   0x17U

Definition at line 484 of file lsm6dso32_reg.h.

◆ LSM6DSO32_CTRL9_XL

#define LSM6DSO32_CTRL9_XL   0x18U

Definition at line 504 of file lsm6dso32_reg.h.

◆ LSM6DSO32_D6D_SRC

#define LSM6DSO32_D6D_SRC   0x1DU

Definition at line 612 of file lsm6dso32_reg.h.

◆ LSM6DSO32_DATAWRITE_SLV0

#define LSM6DSO32_DATAWRITE_SLV0   0x21U

Definition at line 2472 of file lsm6dso32_reg.h.

◆ LSM6DSO32_EMB_FUNC_EN_A

#define LSM6DSO32_EMB_FUNC_EN_A   0x04U

Definition at line 1014 of file lsm6dso32_reg.h.

◆ LSM6DSO32_EMB_FUNC_EN_B

#define LSM6DSO32_EMB_FUNC_EN_B   0x05U

Definition at line 1032 of file lsm6dso32_reg.h.

◆ LSM6DSO32_EMB_FUNC_FIFO_CFG

#define LSM6DSO32_EMB_FUNC_FIFO_CFG   0x44U

Definition at line 1280 of file lsm6dso32_reg.h.

◆ LSM6DSO32_EMB_FUNC_INIT_A

#define LSM6DSO32_EMB_FUNC_INIT_A   0x66U

Definition at line 1780 of file lsm6dso32_reg.h.

◆ LSM6DSO32_EMB_FUNC_INIT_B

#define LSM6DSO32_EMB_FUNC_INIT_B   0x67U

Definition at line 1798 of file lsm6dso32_reg.h.

◆ LSM6DSO32_EMB_FUNC_INT1

#define LSM6DSO32_EMB_FUNC_INT1   0x0AU

Definition at line 1062 of file lsm6dso32_reg.h.

◆ LSM6DSO32_EMB_FUNC_INT2

#define LSM6DSO32_EMB_FUNC_INT2   0x0EU

Definition at line 1130 of file lsm6dso32_reg.h.

◆ LSM6DSO32_EMB_FUNC_ODR_CFG_B

#define LSM6DSO32_EMB_FUNC_ODR_CFG_B   0x5FU

Definition at line 1742 of file lsm6dso32_reg.h.

◆ LSM6DSO32_EMB_FUNC_SRC

#define LSM6DSO32_EMB_FUNC_SRC   0x64U

Definition at line 1758 of file lsm6dso32_reg.h.

◆ LSM6DSO32_EMB_FUNC_STATUS

#define LSM6DSO32_EMB_FUNC_STATUS   0x12U

Definition at line 1198 of file lsm6dso32_reg.h.

◆ LSM6DSO32_EMB_FUNC_STATUS_MAINPAGE

#define LSM6DSO32_EMB_FUNC_STATUS_MAINPAGE   0x35U

Definition at line 666 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FIFO_CTRL1

#define LSM6DSO32_FIFO_CTRL1   0x07U

Definition at line 221 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FIFO_CTRL2

#define LSM6DSO32_FIFO_CTRL2   0x08U

Definition at line 227 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FIFO_CTRL3

#define LSM6DSO32_FIFO_CTRL3   0x09U

Definition at line 249 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FIFO_CTRL4

#define LSM6DSO32_FIFO_CTRL4   0x0AU

Definition at line 261 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FIFO_DATA_OUT_TAG

#define LSM6DSO32_FIFO_DATA_OUT_TAG   0x78U

Definition at line 982 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FIFO_DATA_OUT_X_H

#define LSM6DSO32_FIFO_DATA_OUT_X_H   0x7AU

Definition at line 997 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FIFO_DATA_OUT_X_L

#define LSM6DSO32_FIFO_DATA_OUT_X_L   0x79U

Definition at line 996 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FIFO_DATA_OUT_Y_H

#define LSM6DSO32_FIFO_DATA_OUT_Y_H   0x7CU

Definition at line 999 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FIFO_DATA_OUT_Y_L

#define LSM6DSO32_FIFO_DATA_OUT_Y_L   0x7BU

Definition at line 998 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FIFO_DATA_OUT_Z_H

#define LSM6DSO32_FIFO_DATA_OUT_Z_H   0x7EU

Definition at line 1001 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FIFO_DATA_OUT_Z_L

#define LSM6DSO32_FIFO_DATA_OUT_Z_L   0x7DU

Definition at line 1000 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FIFO_STATUS1

#define LSM6DSO32_FIFO_STATUS1   0x3AU

Definition at line 756 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FIFO_STATUS2

#define LSM6DSO32_FIFO_STATUS2   0x3B

Definition at line 762 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FREE_FALL

#define LSM6DSO32_FREE_FALL   0x5DU

Definition at line 897 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_ENABLE_A

#define LSM6DSO32_FSM_ENABLE_A   0x46U

Definition at line 1294 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_ENABLE_B

#define LSM6DSO32_FSM_ENABLE_B   0x47U

Definition at line 1318 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_INT1_A

#define LSM6DSO32_FSM_INT1_A   0x0BU

Definition at line 1082 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_INT1_B

#define LSM6DSO32_FSM_INT1_B   0x0CU

Definition at line 1106 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_INT2_A

#define LSM6DSO32_FSM_INT2_A   0x0FU

Definition at line 1150 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_INT2_B

#define LSM6DSO32_FSM_INT2_B   0x10U

Definition at line 1174 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_LC_TIMEOUT_H

#define LSM6DSO32_FSM_LC_TIMEOUT_H   0x17BU

Definition at line 1863 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_LC_TIMEOUT_L

#define LSM6DSO32_FSM_LC_TIMEOUT_L   0x17AU

Definition at line 1862 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_LONG_COUNTER_CLEAR

#define LSM6DSO32_FSM_LONG_COUNTER_CLEAR   0x4AU

Definition at line 1344 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_LONG_COUNTER_H

#define LSM6DSO32_FSM_LONG_COUNTER_H   0x49U

Definition at line 1343 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_LONG_COUNTER_L

#define LSM6DSO32_FSM_LONG_COUNTER_L   0x48U

Definition at line 1342 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_OUTS1

#define LSM6DSO32_FSM_OUTS1   0x4CU

Definition at line 1358 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_OUTS10

#define LSM6DSO32_FSM_OUTS10   0x55U

Definition at line 1574 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_OUTS11

#define LSM6DSO32_FSM_OUTS11   0x56U

Definition at line 1598 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_OUTS12

#define LSM6DSO32_FSM_OUTS12   0x57U

Definition at line 1622 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_OUTS13

#define LSM6DSO32_FSM_OUTS13   0x58U

Definition at line 1646 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_OUTS14

#define LSM6DSO32_FSM_OUTS14   0x59U

Definition at line 1670 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_OUTS15

#define LSM6DSO32_FSM_OUTS15   0x5AU

Definition at line 1694 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_OUTS16

#define LSM6DSO32_FSM_OUTS16   0x5BU

Definition at line 1718 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_OUTS2

#define LSM6DSO32_FSM_OUTS2   0x4DU

Definition at line 1382 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_OUTS3

#define LSM6DSO32_FSM_OUTS3   0x4EU

Definition at line 1406 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_OUTS4

#define LSM6DSO32_FSM_OUTS4   0x4FU

Definition at line 1430 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_OUTS5

#define LSM6DSO32_FSM_OUTS5   0x50U

Definition at line 1454 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_OUTS6

#define LSM6DSO32_FSM_OUTS6   0x51U

Definition at line 1478 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_OUTS7

#define LSM6DSO32_FSM_OUTS7   0x52U

Definition at line 1502 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_OUTS8

#define LSM6DSO32_FSM_OUTS8   0x53U

Definition at line 1526 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_OUTS9

#define LSM6DSO32_FSM_OUTS9   0x54U

Definition at line 1550 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_PROGRAMS

#define LSM6DSO32_FSM_PROGRAMS   0x17CU

Definition at line 1864 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_START_ADD_H

#define LSM6DSO32_FSM_START_ADD_H   0x17FU

Definition at line 1866 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_START_ADD_L

#define LSM6DSO32_FSM_START_ADD_L   0x17EU

Definition at line 1865 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_STATUS_A

#define LSM6DSO32_FSM_STATUS_A   0x13U

Definition at line 1218 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_STATUS_A_MAINPAGE

#define LSM6DSO32_FSM_STATUS_A_MAINPAGE   0x36U

Definition at line 686 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_STATUS_B

#define LSM6DSO32_FSM_STATUS_B   0x14U

Definition at line 1242 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FSM_STATUS_B_MAINPAGE

#define LSM6DSO32_FSM_STATUS_B_MAINPAGE   0x37U

Definition at line 710 of file lsm6dso32_reg.h.

◆ LSM6DSO32_FUNC_CFG_ACCESS

#define LSM6DSO32_FUNC_CFG_ACCESS   0x01U

Definition at line 193 of file lsm6dso32_reg.h.

◆ LSM6DSO32_I3C_BUS_AVB

#define LSM6DSO32_I3C_BUS_AVB   0x62U

Definition at line 957 of file lsm6dso32_reg.h.

◆ LSM6DSO32_INT1_CTRL

#define LSM6DSO32_INT1_CTRL   0x0DU

Definition at line 301 of file lsm6dso32_reg.h.

◆ LSM6DSO32_INT2_CTRL

#define LSM6DSO32_INT2_CTRL   0x0EU

Definition at line 325 of file lsm6dso32_reg.h.

◆ LSM6DSO32_INT_DUR2

#define LSM6DSO32_INT_DUR2   0x5AU

Definition at line 853 of file lsm6dso32_reg.h.

◆ LSM6DSO32_INTERNAL_FREQ_FINE

#define LSM6DSO32_INTERNAL_FREQ_FINE   0x63U

Definition at line 973 of file lsm6dso32_reg.h.

◆ LSM6DSO32_MAG_CFG_A

#define LSM6DSO32_MAG_CFG_A   0xD4U

Definition at line 1834 of file lsm6dso32_reg.h.

◆ LSM6DSO32_MAG_CFG_B

#define LSM6DSO32_MAG_CFG_B   0xD5U

Definition at line 1850 of file lsm6dso32_reg.h.

◆ LSM6DSO32_MAG_OFFX_H

#define LSM6DSO32_MAG_OFFX_H   0xC1U

Definition at line 1817 of file lsm6dso32_reg.h.

◆ LSM6DSO32_MAG_OFFX_L

#define LSM6DSO32_MAG_OFFX_L   0xC0U

Definition at line 1816 of file lsm6dso32_reg.h.

◆ LSM6DSO32_MAG_OFFY_H

#define LSM6DSO32_MAG_OFFY_H   0xC3U

Definition at line 1819 of file lsm6dso32_reg.h.

◆ LSM6DSO32_MAG_OFFY_L

#define LSM6DSO32_MAG_OFFY_L   0xC2U

Definition at line 1818 of file lsm6dso32_reg.h.

◆ LSM6DSO32_MAG_OFFZ_H

#define LSM6DSO32_MAG_OFFZ_H   0xC5U

Definition at line 1821 of file lsm6dso32_reg.h.

◆ LSM6DSO32_MAG_OFFZ_L

#define LSM6DSO32_MAG_OFFZ_L   0xC4U

Definition at line 1820 of file lsm6dso32_reg.h.

◆ LSM6DSO32_MAG_SENSITIVITY_H

#define LSM6DSO32_MAG_SENSITIVITY_H   0xBBU

Definition at line 1815 of file lsm6dso32_reg.h.

◆ LSM6DSO32_MAG_SENSITIVITY_L

#define LSM6DSO32_MAG_SENSITIVITY_L   0xBAU

Definition at line 1814 of file lsm6dso32_reg.h.

◆ LSM6DSO32_MAG_SI_XX_H

#define LSM6DSO32_MAG_SI_XX_H   0xC7U

Definition at line 1823 of file lsm6dso32_reg.h.

◆ LSM6DSO32_MAG_SI_XX_L

#define LSM6DSO32_MAG_SI_XX_L   0xC6U

Definition at line 1822 of file lsm6dso32_reg.h.

◆ LSM6DSO32_MAG_SI_XY_H

#define LSM6DSO32_MAG_SI_XY_H   0xC9U

Definition at line 1825 of file lsm6dso32_reg.h.

◆ LSM6DSO32_MAG_SI_XY_L

#define LSM6DSO32_MAG_SI_XY_L   0xC8U

Definition at line 1824 of file lsm6dso32_reg.h.

◆ LSM6DSO32_MAG_SI_XZ_H

#define LSM6DSO32_MAG_SI_XZ_H   0xCBU

Definition at line 1827 of file lsm6dso32_reg.h.

◆ LSM6DSO32_MAG_SI_XZ_L

#define LSM6DSO32_MAG_SI_XZ_L   0xCAU

Definition at line 1826 of file lsm6dso32_reg.h.

◆ LSM6DSO32_MAG_SI_YY_H

#define LSM6DSO32_MAG_SI_YY_H   0xCDU

Definition at line 1829 of file lsm6dso32_reg.h.

◆ LSM6DSO32_MAG_SI_YY_L

#define LSM6DSO32_MAG_SI_YY_L   0xCCU

Definition at line 1828 of file lsm6dso32_reg.h.

◆ LSM6DSO32_MAG_SI_YZ_H

#define LSM6DSO32_MAG_SI_YZ_H   0xCFU

Definition at line 1831 of file lsm6dso32_reg.h.

◆ LSM6DSO32_MAG_SI_YZ_L

#define LSM6DSO32_MAG_SI_YZ_L   0xCEU

Definition at line 1830 of file lsm6dso32_reg.h.

◆ LSM6DSO32_MAG_SI_ZZ_H

#define LSM6DSO32_MAG_SI_ZZ_H   0xD1U

Definition at line 1833 of file lsm6dso32_reg.h.

◆ LSM6DSO32_MAG_SI_ZZ_L

#define LSM6DSO32_MAG_SI_ZZ_L   0xD0U

Definition at line 1832 of file lsm6dso32_reg.h.

◆ LSM6DSO32_MASTER_CONFIG

#define LSM6DSO32_MASTER_CONFIG   0x14U

Definition at line 2320 of file lsm6dso32_reg.h.

◆ LSM6DSO32_MD1_CFG

#define LSM6DSO32_MD1_CFG   0x5EU

Definition at line 909 of file lsm6dso32_reg.h.

◆ LSM6DSO32_MD2_CFG

#define LSM6DSO32_MD2_CFG   0x5FU

Definition at line 933 of file lsm6dso32_reg.h.

◆ LSM6DSO32_OUT_TEMP_H

#define LSM6DSO32_OUT_TEMP_H   0x21U

Definition at line 653 of file lsm6dso32_reg.h.

◆ LSM6DSO32_OUT_TEMP_L

#define LSM6DSO32_OUT_TEMP_L   0x20U

Definition at line 652 of file lsm6dso32_reg.h.

◆ LSM6DSO32_OUTX_H_A

#define LSM6DSO32_OUTX_H_A   0x29U

Definition at line 661 of file lsm6dso32_reg.h.

◆ LSM6DSO32_OUTX_H_G

#define LSM6DSO32_OUTX_H_G   0x23U

Definition at line 655 of file lsm6dso32_reg.h.

◆ LSM6DSO32_OUTX_L_A

#define LSM6DSO32_OUTX_L_A   0x28U

Definition at line 660 of file lsm6dso32_reg.h.

◆ LSM6DSO32_OUTX_L_G

#define LSM6DSO32_OUTX_L_G   0x22U

Definition at line 654 of file lsm6dso32_reg.h.

◆ LSM6DSO32_OUTY_H_A

#define LSM6DSO32_OUTY_H_A   0x2BU

Definition at line 663 of file lsm6dso32_reg.h.

◆ LSM6DSO32_OUTY_H_G

#define LSM6DSO32_OUTY_H_G   0x25U

Definition at line 657 of file lsm6dso32_reg.h.

◆ LSM6DSO32_OUTY_L_A

#define LSM6DSO32_OUTY_L_A   0x2AU

Definition at line 662 of file lsm6dso32_reg.h.

◆ LSM6DSO32_OUTY_L_G

#define LSM6DSO32_OUTY_L_G   0x24U

Definition at line 656 of file lsm6dso32_reg.h.

◆ LSM6DSO32_OUTZ_H_A

#define LSM6DSO32_OUTZ_H_A   0x2DU

Definition at line 665 of file lsm6dso32_reg.h.

◆ LSM6DSO32_OUTZ_H_G

#define LSM6DSO32_OUTZ_H_G   0x27U

Definition at line 659 of file lsm6dso32_reg.h.

◆ LSM6DSO32_OUTZ_L_A

#define LSM6DSO32_OUTZ_L_A   0x2CU

Definition at line 664 of file lsm6dso32_reg.h.

◆ LSM6DSO32_OUTZ_L_G

#define LSM6DSO32_OUTZ_L_G   0x26U

Definition at line 658 of file lsm6dso32_reg.h.

◆ LSM6DSO32_PAGE_ADDRESS

#define LSM6DSO32_PAGE_ADDRESS   0x08U

Definition at line 1050 of file lsm6dso32_reg.h.

◆ LSM6DSO32_PAGE_RW

#define LSM6DSO32_PAGE_RW   0x17U

Definition at line 1266 of file lsm6dso32_reg.h.

◆ LSM6DSO32_PAGE_SEL

#define LSM6DSO32_PAGE_SEL   0x02U

Definition at line 1002 of file lsm6dso32_reg.h.

◆ LSM6DSO32_PAGE_VALUE

#define LSM6DSO32_PAGE_VALUE   0x09U

Definition at line 1056 of file lsm6dso32_reg.h.

◆ LSM6DSO32_PEDO_CMD_REG

#define LSM6DSO32_PEDO_CMD_REG   0x183U

Definition at line 1867 of file lsm6dso32_reg.h.

◆ LSM6DSO32_PEDO_DEB_STEPS_CONF

#define LSM6DSO32_PEDO_DEB_STEPS_CONF   0x184U

Definition at line 1885 of file lsm6dso32_reg.h.

◆ LSM6DSO32_PEDO_SC_DELTAT_H

#define LSM6DSO32_PEDO_SC_DELTAT_H   0x1D1U

Definition at line 1887 of file lsm6dso32_reg.h.

◆ LSM6DSO32_PEDO_SC_DELTAT_L

#define LSM6DSO32_PEDO_SC_DELTAT_L   0x1D0U

Definition at line 1886 of file lsm6dso32_reg.h.

◆ LSM6DSO32_PIN_CTRL

#define LSM6DSO32_PIN_CTRL   0x02U

Definition at line 207 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SENSOR_HUB_1

#define LSM6DSO32_SENSOR_HUB_1   0x02U

Definition at line 1888 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SENSOR_HUB_10

#define LSM6DSO32_SENSOR_HUB_10   0x0BU

Definition at line 2104 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SENSOR_HUB_11

#define LSM6DSO32_SENSOR_HUB_11   0x0CU

Definition at line 2128 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SENSOR_HUB_12

#define LSM6DSO32_SENSOR_HUB_12   0x0DU

Definition at line 2152 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SENSOR_HUB_13

#define LSM6DSO32_SENSOR_HUB_13   0x0EU

Definition at line 2176 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SENSOR_HUB_14

#define LSM6DSO32_SENSOR_HUB_14   0x0FU

Definition at line 2200 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SENSOR_HUB_15

#define LSM6DSO32_SENSOR_HUB_15   0x10U

Definition at line 2224 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SENSOR_HUB_16

#define LSM6DSO32_SENSOR_HUB_16   0x11U

Definition at line 2248 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SENSOR_HUB_17

#define LSM6DSO32_SENSOR_HUB_17   0x12U

Definition at line 2272 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SENSOR_HUB_18

#define LSM6DSO32_SENSOR_HUB_18   0x13U

Definition at line 2296 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SENSOR_HUB_2

#define LSM6DSO32_SENSOR_HUB_2   0x03U

Definition at line 1912 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SENSOR_HUB_3

#define LSM6DSO32_SENSOR_HUB_3   0x04U

Definition at line 1936 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SENSOR_HUB_4

#define LSM6DSO32_SENSOR_HUB_4   0x05U

Definition at line 1960 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SENSOR_HUB_5

#define LSM6DSO32_SENSOR_HUB_5   0x06U

Definition at line 1984 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SENSOR_HUB_6

#define LSM6DSO32_SENSOR_HUB_6   0x07U

Definition at line 2008 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SENSOR_HUB_7

#define LSM6DSO32_SENSOR_HUB_7   0x08U

Definition at line 2032 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SENSOR_HUB_8

#define LSM6DSO32_SENSOR_HUB_8   0x09U

Definition at line 2056 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SENSOR_HUB_9

#define LSM6DSO32_SENSOR_HUB_9   0x0AU

Definition at line 2080 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SLV0_ADD

#define LSM6DSO32_SLV0_ADD   0x15U

Definition at line 2342 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SLV0_CONFIG

#define LSM6DSO32_SLV0_CONFIG   0x17U

Definition at line 2360 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SLV0_SUBADD

#define LSM6DSO32_SLV0_SUBADD   0x16U

Definition at line 2354 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SLV1_ADD

#define LSM6DSO32_SLV1_ADD   0x18U

Definition at line 2376 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SLV1_CONFIG

#define LSM6DSO32_SLV1_CONFIG   0x1AU

Definition at line 2394 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SLV1_SUBADD

#define LSM6DSO32_SLV1_SUBADD   0x19U

Definition at line 2388 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SLV2_ADD

#define LSM6DSO32_SLV2_ADD   0x1BU

Definition at line 2408 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SLV2_CONFIG

#define LSM6DSO32_SLV2_CONFIG   0x1DU

Definition at line 2426 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SLV2_SUBADD

#define LSM6DSO32_SLV2_SUBADD   0x1CU

Definition at line 2420 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SLV3_ADD

#define LSM6DSO32_SLV3_ADD   0x1EU

Definition at line 2440 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SLV3_CONFIG

#define LSM6DSO32_SLV3_CONFIG   0x20U

Definition at line 2458 of file lsm6dso32_reg.h.

◆ LSM6DSO32_SLV3_SUBADD

#define LSM6DSO32_SLV3_SUBADD   0x1FU

Definition at line 2452 of file lsm6dso32_reg.h.

◆ LSM6DSO32_STATUS_MASTER

#define LSM6DSO32_STATUS_MASTER   0x22U

Definition at line 2478 of file lsm6dso32_reg.h.

◆ LSM6DSO32_STATUS_MASTER_MAINPAGE

#define LSM6DSO32_STATUS_MASTER_MAINPAGE   0x39U

Definition at line 734 of file lsm6dso32_reg.h.

◆ LSM6DSO32_STATUS_REG

#define LSM6DSO32_STATUS_REG   0x1EU

Definition at line 636 of file lsm6dso32_reg.h.

◆ LSM6DSO32_STEP_COUNTER_H

#define LSM6DSO32_STEP_COUNTER_H   0x63U

Definition at line 1757 of file lsm6dso32_reg.h.

◆ LSM6DSO32_STEP_COUNTER_L

#define LSM6DSO32_STEP_COUNTER_L   0x62U

Definition at line 1756 of file lsm6dso32_reg.h.

◆ LSM6DSO32_TAP_CFG0

#define LSM6DSO32_TAP_CFG0   0x56U

Definition at line 789 of file lsm6dso32_reg.h.

◆ LSM6DSO32_TAP_CFG1

#define LSM6DSO32_TAP_CFG1   0x57U

Definition at line 813 of file lsm6dso32_reg.h.

◆ LSM6DSO32_TAP_CFG2

#define LSM6DSO32_TAP_CFG2   0x58U

Definition at line 825 of file lsm6dso32_reg.h.

◆ LSM6DSO32_TAP_SRC

#define LSM6DSO32_TAP_SRC   0x1CU

Definition at line 588 of file lsm6dso32_reg.h.

◆ LSM6DSO32_TAP_THS_6D

#define LSM6DSO32_TAP_THS_6D   0x59U

Definition at line 839 of file lsm6dso32_reg.h.

◆ LSM6DSO32_TIMESTAMP0

#define LSM6DSO32_TIMESTAMP0   0x40U

Definition at line 784 of file lsm6dso32_reg.h.

◆ LSM6DSO32_TIMESTAMP1

#define LSM6DSO32_TIMESTAMP1   0x41U

Definition at line 785 of file lsm6dso32_reg.h.

◆ LSM6DSO32_TIMESTAMP2

#define LSM6DSO32_TIMESTAMP2   0x42U

Definition at line 786 of file lsm6dso32_reg.h.

◆ LSM6DSO32_TIMESTAMP3

#define LSM6DSO32_TIMESTAMP3   0x43U

Definition at line 787 of file lsm6dso32_reg.h.

◆ LSM6DSO32_WAKE_UP_DUR

#define LSM6DSO32_WAKE_UP_DUR   0x5CU

Definition at line 881 of file lsm6dso32_reg.h.

◆ LSM6DSO32_WAKE_UP_SRC

#define LSM6DSO32_WAKE_UP_SRC   0x1BU

Definition at line 564 of file lsm6dso32_reg.h.

◆ LSM6DSO32_WAKE_UP_THS

#define LSM6DSO32_WAKE_UP_THS   0x5BU

Definition at line 867 of file lsm6dso32_reg.h.

◆ LSM6DSO32_WHO_AM_I

#define LSM6DSO32_WHO_AM_I   0x0FU

Definition at line 349 of file lsm6dso32_reg.h.

◆ LSM6DSO32_X_OFS_USR

#define LSM6DSO32_X_OFS_USR   0x73U

Definition at line 979 of file lsm6dso32_reg.h.

◆ LSM6DSO32_Y_OFS_USR

#define LSM6DSO32_Y_OFS_USR   0x74U

Definition at line 980 of file lsm6dso32_reg.h.

◆ LSM6DSO32_Z_OFS_USR

#define LSM6DSO32_Z_OFS_USR   0x75U

Definition at line 981 of file lsm6dso32_reg.h.

Enumeration Type Documentation

◆ lsm6dso32_aux_sens_on_t

enum lsm6dso32_aux_sens_on_t
Enumerator
LSM6DSO32_SLV_0 
LSM6DSO32_SLV_0_1 
LSM6DSO32_SLV_0_1_2 
LSM6DSO32_SLV_0_1_2_3 

Definition at line 3775 of file lsm6dso32_reg.h.

3776{
3777 LSM6DSO32_SLV_0 = 0,
3778 LSM6DSO32_SLV_0_1 = 1,
3779 LSM6DSO32_SLV_0_1_2 = 2,
3780 LSM6DSO32_SLV_0_1_2_3 = 3,
3781} lsm6dso32_aux_sens_on_t;
lsm6dso32_aux_sens_on_t
lsm6dso32_aux_sens_on_t
Definition lsm6dso32_reg.h:3776
LSM6DSO32_SLV_0_1_2
@ LSM6DSO32_SLV_0_1_2
Definition lsm6dso32_reg.h:3779
LSM6DSO32_SLV_0
@ LSM6DSO32_SLV_0
Definition lsm6dso32_reg.h:3777
LSM6DSO32_SLV_0_1
@ LSM6DSO32_SLV_0_1
Definition lsm6dso32_reg.h:3778
LSM6DSO32_SLV_0_1_2_3
@ LSM6DSO32_SLV_0_1_2_3
Definition lsm6dso32_reg.h:3780

◆ lsm6dso32_carry_count_en_t

enum lsm6dso32_carry_count_en_t
Enumerator
LSM6DSO32_EVERY_STEP 
LSM6DSO32_COUNT_OVERFLOW 

Definition at line 3576 of file lsm6dso32_reg.h.

3577{
3578 LSM6DSO32_EVERY_STEP = 0,
3579 LSM6DSO32_COUNT_OVERFLOW = 1,
3580} lsm6dso32_carry_count_en_t;
lsm6dso32_carry_count_en_t
lsm6dso32_carry_count_en_t
Definition lsm6dso32_reg.h:3577
LSM6DSO32_COUNT_OVERFLOW
@ LSM6DSO32_COUNT_OVERFLOW
Definition lsm6dso32_reg.h:3579
LSM6DSO32_EVERY_STEP
@ LSM6DSO32_EVERY_STEP
Definition lsm6dso32_reg.h:3578

◆ lsm6dso32_dataready_pulsed_t

enum lsm6dso32_dataready_pulsed_t
Enumerator
LSM6DSO32_DRDY_LATCHED 
LSM6DSO32_DRDY_PULSED 

Definition at line 2904 of file lsm6dso32_reg.h.

2905{
2906 LSM6DSO32_DRDY_LATCHED = 0,
2907 LSM6DSO32_DRDY_PULSED = 1,
2908} lsm6dso32_dataready_pulsed_t;
lsm6dso32_dataready_pulsed_t
lsm6dso32_dataready_pulsed_t
Definition lsm6dso32_reg.h:2905
LSM6DSO32_DRDY_LATCHED
@ LSM6DSO32_DRDY_LATCHED
Definition lsm6dso32_reg.h:2906
LSM6DSO32_DRDY_PULSED
@ LSM6DSO32_DRDY_PULSED
Definition lsm6dso32_reg.h:2907

◆ lsm6dso32_den_lh_t

enum lsm6dso32_den_lh_t
Enumerator
LSM6DSO32_DEN_ACT_LOW 
LSM6DSO32_DEN_ACT_HIGH 

Definition at line 3517 of file lsm6dso32_reg.h.

3518{
3519 LSM6DSO32_DEN_ACT_LOW = 0,
3520 LSM6DSO32_DEN_ACT_HIGH = 1,
3521} lsm6dso32_den_lh_t;
lsm6dso32_den_lh_t
lsm6dso32_den_lh_t
Definition lsm6dso32_reg.h:3518
LSM6DSO32_DEN_ACT_HIGH
@ LSM6DSO32_DEN_ACT_HIGH
Definition lsm6dso32_reg.h:3520
LSM6DSO32_DEN_ACT_LOW
@ LSM6DSO32_DEN_ACT_LOW
Definition lsm6dso32_reg.h:3519

◆ lsm6dso32_den_mode_t

enum lsm6dso32_den_mode_t
Enumerator
LSM6DSO32_DEN_DISABLE 
LSM6DSO32_LEVEL_FIFO 
LSM6DSO32_LEVEL_LETCHED 
LSM6DSO32_LEVEL_TRIGGER 
LSM6DSO32_EDGE_TRIGGER 

Definition at line 3504 of file lsm6dso32_reg.h.

3505{
3506 LSM6DSO32_DEN_DISABLE = 0,
3507 LSM6DSO32_LEVEL_FIFO = 6,
3508 LSM6DSO32_LEVEL_LETCHED = 3,
3509 LSM6DSO32_LEVEL_TRIGGER = 2,
3510 LSM6DSO32_EDGE_TRIGGER = 4,
3511} lsm6dso32_den_mode_t;
lsm6dso32_den_mode_t
lsm6dso32_den_mode_t
Definition lsm6dso32_reg.h:3505
LSM6DSO32_LEVEL_FIFO
@ LSM6DSO32_LEVEL_FIFO
Definition lsm6dso32_reg.h:3507
LSM6DSO32_EDGE_TRIGGER
@ LSM6DSO32_EDGE_TRIGGER
Definition lsm6dso32_reg.h:3510
LSM6DSO32_DEN_DISABLE
@ LSM6DSO32_DEN_DISABLE
Definition lsm6dso32_reg.h:3506
LSM6DSO32_LEVEL_TRIGGER
@ LSM6DSO32_LEVEL_TRIGGER
Definition lsm6dso32_reg.h:3509
LSM6DSO32_LEVEL_LETCHED
@ LSM6DSO32_LEVEL_LETCHED
Definition lsm6dso32_reg.h:3508

◆ lsm6dso32_den_xl_g_t

enum lsm6dso32_den_xl_g_t
Enumerator
LSM6DSO32_STAMP_IN_GY_DATA 
LSM6DSO32_STAMP_IN_XL_DATA 
LSM6DSO32_STAMP_IN_GY_XL_DATA 

Definition at line 3527 of file lsm6dso32_reg.h.

3528{
3529 LSM6DSO32_STAMP_IN_GY_DATA = 0,
3530 LSM6DSO32_STAMP_IN_XL_DATA = 1,
3531 LSM6DSO32_STAMP_IN_GY_XL_DATA = 2,
3532} lsm6dso32_den_xl_g_t;
lsm6dso32_den_xl_g_t
lsm6dso32_den_xl_g_t
Definition lsm6dso32_reg.h:3528
LSM6DSO32_STAMP_IN_XL_DATA
@ LSM6DSO32_STAMP_IN_XL_DATA
Definition lsm6dso32_reg.h:3530
LSM6DSO32_STAMP_IN_GY_DATA
@ LSM6DSO32_STAMP_IN_GY_DATA
Definition lsm6dso32_reg.h:3529
LSM6DSO32_STAMP_IN_GY_XL_DATA
@ LSM6DSO32_STAMP_IN_GY_XL_DATA
Definition lsm6dso32_reg.h:3531

◆ lsm6dso32_ff_ths_t

enum lsm6dso32_ff_ths_t
Enumerator
LSM6DSO32_FF_TSH_312mg 
LSM6DSO32_FF_TSH_438mg 
LSM6DSO32_FF_TSH_500mg 

Definition at line 3272 of file lsm6dso32_reg.h.

3273{
3274 LSM6DSO32_FF_TSH_312mg = 0,
3275 LSM6DSO32_FF_TSH_438mg = 1,
3276 LSM6DSO32_FF_TSH_500mg = 2,
3277} lsm6dso32_ff_ths_t;
lsm6dso32_ff_ths_t
lsm6dso32_ff_ths_t
Definition lsm6dso32_reg.h:3273
LSM6DSO32_FF_TSH_500mg
@ LSM6DSO32_FF_TSH_500mg
Definition lsm6dso32_reg.h:3276
LSM6DSO32_FF_TSH_438mg
@ LSM6DSO32_FF_TSH_438mg
Definition lsm6dso32_reg.h:3275
LSM6DSO32_FF_TSH_312mg
@ LSM6DSO32_FF_TSH_312mg
Definition lsm6dso32_reg.h:3274

◆ lsm6dso32_fs_g_t

enum lsm6dso32_fs_g_t
Enumerator
LSM6DSO32_250dps 
LSM6DSO32_125dps 
LSM6DSO32_500dps 
LSM6DSO32_1000dps 
LSM6DSO32_2000dps 

Definition at line 2725 of file lsm6dso32_reg.h.

2726{
2727 LSM6DSO32_250dps = 0,
2728 LSM6DSO32_125dps = 1,
2729 LSM6DSO32_500dps = 2,
2730 LSM6DSO32_1000dps = 4,
2731 LSM6DSO32_2000dps = 6,
2732} lsm6dso32_fs_g_t;
lsm6dso32_fs_g_t
lsm6dso32_fs_g_t
Definition lsm6dso32_reg.h:2726
LSM6DSO32_500dps
@ LSM6DSO32_500dps
Definition lsm6dso32_reg.h:2729
LSM6DSO32_125dps
@ LSM6DSO32_125dps
Definition lsm6dso32_reg.h:2728
LSM6DSO32_2000dps
@ LSM6DSO32_2000dps
Definition lsm6dso32_reg.h:2731
LSM6DSO32_1000dps
@ LSM6DSO32_1000dps
Definition lsm6dso32_reg.h:2730
LSM6DSO32_250dps
@ LSM6DSO32_250dps
Definition lsm6dso32_reg.h:2727

◆ lsm6dso32_fs_xl_t

enum lsm6dso32_fs_xl_t
Enumerator
LSM6DSO32_4g 
LSM6DSO32_8g 
LSM6DSO32_16g 
LSM6DSO32_32g 

Definition at line 2674 of file lsm6dso32_reg.h.

2675{
2676 LSM6DSO32_4g = 0x00,
2677 LSM6DSO32_8g = 0x02,
2678 LSM6DSO32_16g = 0x03,
2679 LSM6DSO32_32g = 0x01,
2680} lsm6dso32_fs_xl_t;
lsm6dso32_fs_xl_t
lsm6dso32_fs_xl_t
Definition lsm6dso32_reg.h:2675
LSM6DSO32_32g
@ LSM6DSO32_32g
Definition lsm6dso32_reg.h:2679
LSM6DSO32_16g
@ LSM6DSO32_16g
Definition lsm6dso32_reg.h:2678
LSM6DSO32_8g
@ LSM6DSO32_8g
Definition lsm6dso32_reg.h:2677
LSM6DSO32_4g
@ LSM6DSO32_4g
Definition lsm6dso32_reg.h:2676

◆ lsm6dso32_ftype_t

enum lsm6dso32_ftype_t
Enumerator
LSM6DSO32_ULTRA_LIGHT 
LSM6DSO32_VERY_LIGHT 
LSM6DSO32_LIGHT 
LSM6DSO32_MEDIUM 
LSM6DSO32_STRONG 
LSM6DSO32_VERY_STRONG 
LSM6DSO32_AGGRESSIVE 
LSM6DSO32_XTREME 

Definition at line 2958 of file lsm6dso32_reg.h.

2959{
2960 LSM6DSO32_ULTRA_LIGHT = 0,
2961 LSM6DSO32_VERY_LIGHT = 1,
2962 LSM6DSO32_LIGHT = 2,
2963 LSM6DSO32_MEDIUM = 3,
2964 LSM6DSO32_STRONG = 4, /* not available for data rate > 1k670Hz */
2965 LSM6DSO32_VERY_STRONG = 5, /* not available for data rate > 1k670Hz */
2966 LSM6DSO32_AGGRESSIVE = 6, /* not available for data rate > 1k670Hz */
2967 LSM6DSO32_XTREME = 7, /* not available for data rate > 1k670Hz */
2968} lsm6dso32_ftype_t;
lsm6dso32_ftype_t
lsm6dso32_ftype_t
Definition lsm6dso32_reg.h:2959
LSM6DSO32_ULTRA_LIGHT
@ LSM6DSO32_ULTRA_LIGHT
Definition lsm6dso32_reg.h:2960
LSM6DSO32_STRONG
@ LSM6DSO32_STRONG
Definition lsm6dso32_reg.h:2964
LSM6DSO32_VERY_STRONG
@ LSM6DSO32_VERY_STRONG
Definition lsm6dso32_reg.h:2965
LSM6DSO32_XTREME
@ LSM6DSO32_XTREME
Definition lsm6dso32_reg.h:2967
LSM6DSO32_MEDIUM
@ LSM6DSO32_MEDIUM
Definition lsm6dso32_reg.h:2963
LSM6DSO32_AGGRESSIVE
@ LSM6DSO32_AGGRESSIVE
Definition lsm6dso32_reg.h:2966
LSM6DSO32_LIGHT
@ LSM6DSO32_LIGHT
Definition lsm6dso32_reg.h:2962
LSM6DSO32_VERY_LIGHT
@ LSM6DSO32_VERY_LIGHT
Definition lsm6dso32_reg.h:2961

◆ lsm6dso32_h_lactive_t

enum lsm6dso32_h_lactive_t
Enumerator
LSM6DSO32_ACTIVE_HIGH 
LSM6DSO32_ACTIVE_LOW 

Definition at line 3125 of file lsm6dso32_reg.h.

3126{
3127 LSM6DSO32_ACTIVE_HIGH = 0,
3128 LSM6DSO32_ACTIVE_LOW = 1,
3129} lsm6dso32_h_lactive_t;
lsm6dso32_h_lactive_t
lsm6dso32_h_lactive_t
Definition lsm6dso32_reg.h:3126
LSM6DSO32_ACTIVE_HIGH
@ LSM6DSO32_ACTIVE_HIGH
Definition lsm6dso32_reg.h:3127
LSM6DSO32_ACTIVE_LOW
@ LSM6DSO32_ACTIVE_LOW
Definition lsm6dso32_reg.h:3128

◆ lsm6dso32_hp_slope_xl_en_t

enum lsm6dso32_hp_slope_xl_en_t
Enumerator
LSM6DSO32_HP_PATH_DISABLE_ON_OUT 
LSM6DSO32_SLOPE_ODR_DIV_4 
LSM6DSO32_HP_ODR_DIV_10 
LSM6DSO32_HP_ODR_DIV_20 
LSM6DSO32_HP_ODR_DIV_45 
LSM6DSO32_HP_ODR_DIV_100 
LSM6DSO32_HP_ODR_DIV_200 
LSM6DSO32_HP_ODR_DIV_400 
LSM6DSO32_HP_ODR_DIV_800 
LSM6DSO32_HP_REF_MD_ODR_DIV_10 
LSM6DSO32_HP_REF_MD_ODR_DIV_20 
LSM6DSO32_HP_REF_MD_ODR_DIV_45 
LSM6DSO32_HP_REF_MD_ODR_DIV_100 
LSM6DSO32_HP_REF_MD_ODR_DIV_200 
LSM6DSO32_HP_REF_MD_ODR_DIV_400 
LSM6DSO32_HP_REF_MD_ODR_DIV_800 
LSM6DSO32_LP_ODR_DIV_10 
LSM6DSO32_LP_ODR_DIV_20 
LSM6DSO32_LP_ODR_DIV_45 
LSM6DSO32_LP_ODR_DIV_100 
LSM6DSO32_LP_ODR_DIV_200 
LSM6DSO32_LP_ODR_DIV_400 
LSM6DSO32_LP_ODR_DIV_800 

Definition at line 2977 of file lsm6dso32_reg.h.

2978{
2979 LSM6DSO32_HP_PATH_DISABLE_ON_OUT = 0x00,
2980 LSM6DSO32_SLOPE_ODR_DIV_4 = 0x10,
2981 LSM6DSO32_HP_ODR_DIV_10 = 0x11,
2982 LSM6DSO32_HP_ODR_DIV_20 = 0x12,
2983 LSM6DSO32_HP_ODR_DIV_45 = 0x13,
2984 LSM6DSO32_HP_ODR_DIV_100 = 0x14,
2985 LSM6DSO32_HP_ODR_DIV_200 = 0x15,
2986 LSM6DSO32_HP_ODR_DIV_400 = 0x16,
2987 LSM6DSO32_HP_ODR_DIV_800 = 0x17,
2988 LSM6DSO32_HP_REF_MD_ODR_DIV_10 = 0x31,
2989 LSM6DSO32_HP_REF_MD_ODR_DIV_20 = 0x32,
2990 LSM6DSO32_HP_REF_MD_ODR_DIV_45 = 0x33,
2991 LSM6DSO32_HP_REF_MD_ODR_DIV_100 = 0x34,
2992 LSM6DSO32_HP_REF_MD_ODR_DIV_200 = 0x35,
2993 LSM6DSO32_HP_REF_MD_ODR_DIV_400 = 0x36,
2994 LSM6DSO32_HP_REF_MD_ODR_DIV_800 = 0x37,
2995 LSM6DSO32_LP_ODR_DIV_10 = 0x01,
2996 LSM6DSO32_LP_ODR_DIV_20 = 0x02,
2997 LSM6DSO32_LP_ODR_DIV_45 = 0x03,
2998 LSM6DSO32_LP_ODR_DIV_100 = 0x04,
2999 LSM6DSO32_LP_ODR_DIV_200 = 0x05,
3000 LSM6DSO32_LP_ODR_DIV_400 = 0x06,
3001 LSM6DSO32_LP_ODR_DIV_800 = 0x07,
3002} lsm6dso32_hp_slope_xl_en_t;
lsm6dso32_hp_slope_xl_en_t
lsm6dso32_hp_slope_xl_en_t
Definition lsm6dso32_reg.h:2978
LSM6DSO32_LP_ODR_DIV_10
@ LSM6DSO32_LP_ODR_DIV_10
Definition lsm6dso32_reg.h:2995
LSM6DSO32_HP_REF_MD_ODR_DIV_10
@ LSM6DSO32_HP_REF_MD_ODR_DIV_10
Definition lsm6dso32_reg.h:2988
LSM6DSO32_LP_ODR_DIV_100
@ LSM6DSO32_LP_ODR_DIV_100
Definition lsm6dso32_reg.h:2998
LSM6DSO32_HP_PATH_DISABLE_ON_OUT
@ LSM6DSO32_HP_PATH_DISABLE_ON_OUT
Definition lsm6dso32_reg.h:2979
LSM6DSO32_HP_REF_MD_ODR_DIV_20
@ LSM6DSO32_HP_REF_MD_ODR_DIV_20
Definition lsm6dso32_reg.h:2989
LSM6DSO32_HP_REF_MD_ODR_DIV_45
@ LSM6DSO32_HP_REF_MD_ODR_DIV_45
Definition lsm6dso32_reg.h:2990
LSM6DSO32_HP_REF_MD_ODR_DIV_100
@ LSM6DSO32_HP_REF_MD_ODR_DIV_100
Definition lsm6dso32_reg.h:2991
LSM6DSO32_HP_ODR_DIV_800
@ LSM6DSO32_HP_ODR_DIV_800
Definition lsm6dso32_reg.h:2987
LSM6DSO32_HP_REF_MD_ODR_DIV_400
@ LSM6DSO32_HP_REF_MD_ODR_DIV_400
Definition lsm6dso32_reg.h:2993
LSM6DSO32_LP_ODR_DIV_20
@ LSM6DSO32_LP_ODR_DIV_20
Definition lsm6dso32_reg.h:2996
LSM6DSO32_HP_ODR_DIV_20
@ LSM6DSO32_HP_ODR_DIV_20
Definition lsm6dso32_reg.h:2982
LSM6DSO32_HP_ODR_DIV_100
@ LSM6DSO32_HP_ODR_DIV_100
Definition lsm6dso32_reg.h:2984
LSM6DSO32_SLOPE_ODR_DIV_4
@ LSM6DSO32_SLOPE_ODR_DIV_4
Definition lsm6dso32_reg.h:2980
LSM6DSO32_HP_REF_MD_ODR_DIV_800
@ LSM6DSO32_HP_REF_MD_ODR_DIV_800
Definition lsm6dso32_reg.h:2994
LSM6DSO32_LP_ODR_DIV_45
@ LSM6DSO32_LP_ODR_DIV_45
Definition lsm6dso32_reg.h:2997
LSM6DSO32_LP_ODR_DIV_200
@ LSM6DSO32_LP_ODR_DIV_200
Definition lsm6dso32_reg.h:2999
LSM6DSO32_HP_ODR_DIV_200
@ LSM6DSO32_HP_ODR_DIV_200
Definition lsm6dso32_reg.h:2985
LSM6DSO32_LP_ODR_DIV_800
@ LSM6DSO32_LP_ODR_DIV_800
Definition lsm6dso32_reg.h:3001
LSM6DSO32_HP_ODR_DIV_45
@ LSM6DSO32_HP_ODR_DIV_45
Definition lsm6dso32_reg.h:2983
LSM6DSO32_HP_REF_MD_ODR_DIV_200
@ LSM6DSO32_HP_REF_MD_ODR_DIV_200
Definition lsm6dso32_reg.h:2992
LSM6DSO32_HP_ODR_DIV_10
@ LSM6DSO32_HP_ODR_DIV_10
Definition lsm6dso32_reg.h:2981
LSM6DSO32_LP_ODR_DIV_400
@ LSM6DSO32_LP_ODR_DIV_400
Definition lsm6dso32_reg.h:3000
LSM6DSO32_HP_ODR_DIV_400
@ LSM6DSO32_HP_ODR_DIV_400
Definition lsm6dso32_reg.h:2986

◆ lsm6dso32_hpm_g_t

enum lsm6dso32_hpm_g_t
Enumerator
LSM6DSO32_HP_FILTER_NONE 
LSM6DSO32_HP_FILTER_16mHz 
LSM6DSO32_HP_FILTER_65mHz 
LSM6DSO32_HP_FILTER_260mHz 
LSM6DSO32_HP_FILTER_1Hz04 

Definition at line 3023 of file lsm6dso32_reg.h.

3024{
3025 LSM6DSO32_HP_FILTER_NONE = 0x00,
3026 LSM6DSO32_HP_FILTER_16mHz = 0x80,
3027 LSM6DSO32_HP_FILTER_65mHz = 0x81,
3028 LSM6DSO32_HP_FILTER_260mHz = 0x82,
3029 LSM6DSO32_HP_FILTER_1Hz04 = 0x83,
3030} lsm6dso32_hpm_g_t;
lsm6dso32_hpm_g_t
lsm6dso32_hpm_g_t
Definition lsm6dso32_reg.h:3024
LSM6DSO32_HP_FILTER_NONE
@ LSM6DSO32_HP_FILTER_NONE
Definition lsm6dso32_reg.h:3025
LSM6DSO32_HP_FILTER_16mHz
@ LSM6DSO32_HP_FILTER_16mHz
Definition lsm6dso32_reg.h:3026
LSM6DSO32_HP_FILTER_1Hz04
@ LSM6DSO32_HP_FILTER_1Hz04
Definition lsm6dso32_reg.h:3029
LSM6DSO32_HP_FILTER_260mHz
@ LSM6DSO32_HP_FILTER_260mHz
Definition lsm6dso32_reg.h:3028
LSM6DSO32_HP_FILTER_65mHz
@ LSM6DSO32_HP_FILTER_65mHz
Definition lsm6dso32_reg.h:3027

◆ lsm6dso32_i2c_disable_t

enum lsm6dso32_i2c_disable_t
Enumerator
LSM6DSO32_I2C_ENABLE 
LSM6DSO32_I2C_DISABLE 

Definition at line 3056 of file lsm6dso32_reg.h.

3057{
3058 LSM6DSO32_I2C_ENABLE = 0,
3059 LSM6DSO32_I2C_DISABLE = 1,
3060} lsm6dso32_i2c_disable_t;
lsm6dso32_i2c_disable_t
lsm6dso32_i2c_disable_t
Definition lsm6dso32_reg.h:3057
LSM6DSO32_I2C_ENABLE
@ LSM6DSO32_I2C_ENABLE
Definition lsm6dso32_reg.h:3058
LSM6DSO32_I2C_DISABLE
@ LSM6DSO32_I2C_DISABLE
Definition lsm6dso32_reg.h:3059

◆ lsm6dso32_i3c_disable_t

enum lsm6dso32_i3c_disable_t
Enumerator
LSM6DSO32_I3C_DISABLE 
LSM6DSO32_I3C_ENABLE_T_50us 
LSM6DSO32_I3C_ENABLE_T_2us 
LSM6DSO32_I3C_ENABLE_T_1ms 
LSM6DSO32_I3C_ENABLE_T_25ms 

Definition at line 3066 of file lsm6dso32_reg.h.

3067{
3068 LSM6DSO32_I3C_DISABLE = 0x80,
3069 LSM6DSO32_I3C_ENABLE_T_50us = 0x00,
3070 LSM6DSO32_I3C_ENABLE_T_2us = 0x01,
3071 LSM6DSO32_I3C_ENABLE_T_1ms = 0x02,
3072 LSM6DSO32_I3C_ENABLE_T_25ms = 0x03,
3073} lsm6dso32_i3c_disable_t;
lsm6dso32_i3c_disable_t
lsm6dso32_i3c_disable_t
Definition lsm6dso32_reg.h:3067
LSM6DSO32_I3C_ENABLE_T_25ms
@ LSM6DSO32_I3C_ENABLE_T_25ms
Definition lsm6dso32_reg.h:3072
LSM6DSO32_I3C_DISABLE
@ LSM6DSO32_I3C_DISABLE
Definition lsm6dso32_reg.h:3068
LSM6DSO32_I3C_ENABLE_T_2us
@ LSM6DSO32_I3C_ENABLE_T_2us
Definition lsm6dso32_reg.h:3070
LSM6DSO32_I3C_ENABLE_T_50us
@ LSM6DSO32_I3C_ENABLE_T_50us
Definition lsm6dso32_reg.h:3069
LSM6DSO32_I3C_ENABLE_T_1ms
@ LSM6DSO32_I3C_ENABLE_T_1ms
Definition lsm6dso32_reg.h:3071

◆ lsm6dso32_inact_en_t

enum lsm6dso32_inact_en_t
Enumerator
LSM6DSO32_XL_AND_GY_NOT_AFFECTED 
LSM6DSO32_XL_12Hz5_GY_NOT_AFFECTED 
LSM6DSO32_XL_12Hz5_GY_SLEEP 
LSM6DSO32_XL_12Hz5_GY_PD 

Definition at line 3184 of file lsm6dso32_reg.h.

3185{
3186 LSM6DSO32_XL_AND_GY_NOT_AFFECTED = 0,
3187 LSM6DSO32_XL_12Hz5_GY_NOT_AFFECTED = 1,
3188 LSM6DSO32_XL_12Hz5_GY_SLEEP = 2,
3189 LSM6DSO32_XL_12Hz5_GY_PD = 3,
3190} lsm6dso32_inact_en_t;
lsm6dso32_inact_en_t
lsm6dso32_inact_en_t
Definition lsm6dso32_reg.h:3185
LSM6DSO32_XL_12Hz5_GY_NOT_AFFECTED
@ LSM6DSO32_XL_12Hz5_GY_NOT_AFFECTED
Definition lsm6dso32_reg.h:3187
LSM6DSO32_XL_12Hz5_GY_PD
@ LSM6DSO32_XL_12Hz5_GY_PD
Definition lsm6dso32_reg.h:3189
LSM6DSO32_XL_AND_GY_NOT_AFFECTED
@ LSM6DSO32_XL_AND_GY_NOT_AFFECTED
Definition lsm6dso32_reg.h:3186
LSM6DSO32_XL_12Hz5_GY_SLEEP
@ LSM6DSO32_XL_12Hz5_GY_SLEEP
Definition lsm6dso32_reg.h:3188

◆ lsm6dso32_int1_pd_en_t

enum lsm6dso32_int1_pd_en_t
Enumerator
LSM6DSO32_PULL_DOWN_DISC 
LSM6DSO32_PULL_DOWN_CONNECT 

Definition at line 3079 of file lsm6dso32_reg.h.

3080{
3081 LSM6DSO32_PULL_DOWN_DISC = 0,
3082 LSM6DSO32_PULL_DOWN_CONNECT = 1,
3083} lsm6dso32_int1_pd_en_t;
lsm6dso32_int1_pd_en_t
lsm6dso32_int1_pd_en_t
Definition lsm6dso32_reg.h:3080
LSM6DSO32_PULL_DOWN_CONNECT
@ LSM6DSO32_PULL_DOWN_CONNECT
Definition lsm6dso32_reg.h:3082
LSM6DSO32_PULL_DOWN_DISC
@ LSM6DSO32_PULL_DOWN_DISC
Definition lsm6dso32_reg.h:3081

◆ lsm6dso32_lir_t

enum lsm6dso32_lir_t
Enumerator
LSM6DSO32_ALL_INT_PULSED 
LSM6DSO32_BASE_LATCHED_EMB_PULSED 
LSM6DSO32_BASE_PULSED_EMB_LATCHED 
LSM6DSO32_ALL_INT_LATCHED 

Definition at line 3138 of file lsm6dso32_reg.h.

3139{
3140 LSM6DSO32_ALL_INT_PULSED = 0,
3141 LSM6DSO32_BASE_LATCHED_EMB_PULSED = 1,
3142 LSM6DSO32_BASE_PULSED_EMB_LATCHED = 2,
3143 LSM6DSO32_ALL_INT_LATCHED = 3,
3144} lsm6dso32_lir_t;
lsm6dso32_lir_t
lsm6dso32_lir_t
Definition lsm6dso32_reg.h:3139
LSM6DSO32_ALL_INT_LATCHED
@ LSM6DSO32_ALL_INT_LATCHED
Definition lsm6dso32_reg.h:3143
LSM6DSO32_BASE_LATCHED_EMB_PULSED
@ LSM6DSO32_BASE_LATCHED_EMB_PULSED
Definition lsm6dso32_reg.h:3141
LSM6DSO32_BASE_PULSED_EMB_LATCHED
@ LSM6DSO32_BASE_PULSED_EMB_LATCHED
Definition lsm6dso32_reg.h:3142
LSM6DSO32_ALL_INT_PULSED
@ LSM6DSO32_ALL_INT_PULSED
Definition lsm6dso32_reg.h:3140

◆ lsm6dso32_mag_x_axis_t

enum lsm6dso32_mag_x_axis_t
Enumerator
LSM6DSO32_X_EQ_Y 
LSM6DSO32_X_EQ_MIN_Y 
LSM6DSO32_X_EQ_X 
LSM6DSO32_X_EQ_MIN_X 
LSM6DSO32_X_EQ_MIN_Z 
LSM6DSO32_X_EQ_Z 

Definition at line 3646 of file lsm6dso32_reg.h.

3647{
3648 LSM6DSO32_X_EQ_Y = 0,
3649 LSM6DSO32_X_EQ_MIN_Y = 1,
3650 LSM6DSO32_X_EQ_X = 2,
3651 LSM6DSO32_X_EQ_MIN_X = 3,
3652 LSM6DSO32_X_EQ_MIN_Z = 4,
3653 LSM6DSO32_X_EQ_Z = 5,
3654} lsm6dso32_mag_x_axis_t;
lsm6dso32_mag_x_axis_t
lsm6dso32_mag_x_axis_t
Definition lsm6dso32_reg.h:3647
LSM6DSO32_X_EQ_X
@ LSM6DSO32_X_EQ_X
Definition lsm6dso32_reg.h:3650
LSM6DSO32_X_EQ_Z
@ LSM6DSO32_X_EQ_Z
Definition lsm6dso32_reg.h:3653
LSM6DSO32_X_EQ_MIN_Z
@ LSM6DSO32_X_EQ_MIN_Z
Definition lsm6dso32_reg.h:3652
LSM6DSO32_X_EQ_Y
@ LSM6DSO32_X_EQ_Y
Definition lsm6dso32_reg.h:3648
LSM6DSO32_X_EQ_MIN_X
@ LSM6DSO32_X_EQ_MIN_X
Definition lsm6dso32_reg.h:3651
LSM6DSO32_X_EQ_MIN_Y
@ LSM6DSO32_X_EQ_MIN_Y
Definition lsm6dso32_reg.h:3649

◆ lsm6dso32_mag_y_axis_t

enum lsm6dso32_mag_y_axis_t
Enumerator
LSM6DSO32_Y_EQ_Y 
LSM6DSO32_Y_EQ_MIN_Y 
LSM6DSO32_Y_EQ_X 
LSM6DSO32_Y_EQ_MIN_X 
LSM6DSO32_Y_EQ_MIN_Z 
LSM6DSO32_Y_EQ_Z 

Definition at line 3632 of file lsm6dso32_reg.h.

3633{
3634 LSM6DSO32_Y_EQ_Y = 0,
3635 LSM6DSO32_Y_EQ_MIN_Y = 1,
3636 LSM6DSO32_Y_EQ_X = 2,
3637 LSM6DSO32_Y_EQ_MIN_X = 3,
3638 LSM6DSO32_Y_EQ_MIN_Z = 4,
3639 LSM6DSO32_Y_EQ_Z = 5,
3640} lsm6dso32_mag_y_axis_t;
lsm6dso32_mag_y_axis_t
lsm6dso32_mag_y_axis_t
Definition lsm6dso32_reg.h:3633
LSM6DSO32_Y_EQ_Y
@ LSM6DSO32_Y_EQ_Y
Definition lsm6dso32_reg.h:3634
LSM6DSO32_Y_EQ_X
@ LSM6DSO32_Y_EQ_X
Definition lsm6dso32_reg.h:3636
LSM6DSO32_Y_EQ_Z
@ LSM6DSO32_Y_EQ_Z
Definition lsm6dso32_reg.h:3639
LSM6DSO32_Y_EQ_MIN_X
@ LSM6DSO32_Y_EQ_MIN_X
Definition lsm6dso32_reg.h:3637
LSM6DSO32_Y_EQ_MIN_Y
@ LSM6DSO32_Y_EQ_MIN_Y
Definition lsm6dso32_reg.h:3635
LSM6DSO32_Y_EQ_MIN_Z
@ LSM6DSO32_Y_EQ_MIN_Z
Definition lsm6dso32_reg.h:3638

◆ lsm6dso32_mag_z_axis_t

enum lsm6dso32_mag_z_axis_t
Enumerator
LSM6DSO32_Z_EQ_Y 
LSM6DSO32_Z_EQ_MIN_Y 
LSM6DSO32_Z_EQ_X 
LSM6DSO32_Z_EQ_MIN_X 
LSM6DSO32_Z_EQ_MIN_Z 
LSM6DSO32_Z_EQ_Z 

Definition at line 3618 of file lsm6dso32_reg.h.

3619{
3620 LSM6DSO32_Z_EQ_Y = 0,
3621 LSM6DSO32_Z_EQ_MIN_Y = 1,
3622 LSM6DSO32_Z_EQ_X = 2,
3623 LSM6DSO32_Z_EQ_MIN_X = 3,
3624 LSM6DSO32_Z_EQ_MIN_Z = 4,
3625 LSM6DSO32_Z_EQ_Z = 5,
3626} lsm6dso32_mag_z_axis_t;
lsm6dso32_mag_z_axis_t
lsm6dso32_mag_z_axis_t
Definition lsm6dso32_reg.h:3619
LSM6DSO32_Z_EQ_MIN_Z
@ LSM6DSO32_Z_EQ_MIN_Z
Definition lsm6dso32_reg.h:3624
LSM6DSO32_Z_EQ_MIN_X
@ LSM6DSO32_Z_EQ_MIN_X
Definition lsm6dso32_reg.h:3623
LSM6DSO32_Z_EQ_Z
@ LSM6DSO32_Z_EQ_Z
Definition lsm6dso32_reg.h:3625
LSM6DSO32_Z_EQ_MIN_Y
@ LSM6DSO32_Z_EQ_MIN_Y
Definition lsm6dso32_reg.h:3621
LSM6DSO32_Z_EQ_Y
@ LSM6DSO32_Z_EQ_Y
Definition lsm6dso32_reg.h:3620
LSM6DSO32_Z_EQ_X
@ LSM6DSO32_Z_EQ_X
Definition lsm6dso32_reg.h:3622

◆ lsm6dso32_odr_g_t

enum lsm6dso32_odr_g_t
Enumerator
LSM6DSO32_GY_ODR_OFF 
LSM6DSO32_GY_ODR_12Hz5_HIGH_PERF 
LSM6DSO32_GY_ODR_26Hz_HIGH_PERF 
LSM6DSO32_GY_ODR_52Hz_HIGH_PERF 
LSM6DSO32_GY_ODR_104Hz_HIGH_PERF 
LSM6DSO32_GY_ODR_208Hz_HIGH_PERF 
LSM6DSO32_GY_ODR_417Hz_HIGH_PERF 
LSM6DSO32_GY_ODR_833Hz_HIGH_PERF 
LSM6DSO32_GY_ODR_1667Hz_HIGH_PERF 
LSM6DSO32_GY_ODR_3333Hz_HIGH_PERF 
LSM6DSO32_GY_ODR_6667Hz_HIGH_PERF 
LSM6DSO32_GY_ODR_104Hz_NORMAL_MD 
LSM6DSO32_GY_ODR_208Hz_NORMAL_MD 
LSM6DSO32_GY_ODR_12Hz5_LOW_PW 
LSM6DSO32_GY_ODR_26Hz_LOW_PW 
LSM6DSO32_GY_ODR_52Hz_LOW_PW 

Definition at line 2738 of file lsm6dso32_reg.h.

2739{
2740 /* Gyroscope power off */
2741 LSM6DSO32_GY_ODR_OFF = 0x00,
2742 /* Gyroscope high performance mode */
2743 LSM6DSO32_GY_ODR_12Hz5_HIGH_PERF = 0x01,
2744 LSM6DSO32_GY_ODR_26Hz_HIGH_PERF = 0x02,
2745 LSM6DSO32_GY_ODR_52Hz_HIGH_PERF = 0x03,
2746 LSM6DSO32_GY_ODR_104Hz_HIGH_PERF = 0x04,
2747 LSM6DSO32_GY_ODR_208Hz_HIGH_PERF = 0x05,
2748 LSM6DSO32_GY_ODR_417Hz_HIGH_PERF = 0x06,
2749 LSM6DSO32_GY_ODR_833Hz_HIGH_PERF = 0x07,
2750 LSM6DSO32_GY_ODR_1667Hz_HIGH_PERF = 0x08,
2751 LSM6DSO32_GY_ODR_3333Hz_HIGH_PERF = 0x09,
2752 LSM6DSO32_GY_ODR_6667Hz_HIGH_PERF = 0x0A,
2753 /* Gyroscope normal mode */
2754 LSM6DSO32_GY_ODR_104Hz_NORMAL_MD = 0x14,
2755 LSM6DSO32_GY_ODR_208Hz_NORMAL_MD = 0x15,
2756 /* Gyroscope low power mode */
2757 LSM6DSO32_GY_ODR_12Hz5_LOW_PW = 0x11,
2758 LSM6DSO32_GY_ODR_26Hz_LOW_PW = 0x12,
2759 LSM6DSO32_GY_ODR_52Hz_LOW_PW = 0x13,
2760} lsm6dso32_odr_g_t;
lsm6dso32_odr_g_t
lsm6dso32_odr_g_t
Definition lsm6dso32_reg.h:2739
LSM6DSO32_GY_ODR_52Hz_LOW_PW
@ LSM6DSO32_GY_ODR_52Hz_LOW_PW
Definition lsm6dso32_reg.h:2759
LSM6DSO32_GY_ODR_104Hz_HIGH_PERF
@ LSM6DSO32_GY_ODR_104Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2746
LSM6DSO32_GY_ODR_12Hz5_LOW_PW
@ LSM6DSO32_GY_ODR_12Hz5_LOW_PW
Definition lsm6dso32_reg.h:2757
LSM6DSO32_GY_ODR_26Hz_HIGH_PERF
@ LSM6DSO32_GY_ODR_26Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2744
LSM6DSO32_GY_ODR_208Hz_NORMAL_MD
@ LSM6DSO32_GY_ODR_208Hz_NORMAL_MD
Definition lsm6dso32_reg.h:2755
LSM6DSO32_GY_ODR_6667Hz_HIGH_PERF
@ LSM6DSO32_GY_ODR_6667Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2752
LSM6DSO32_GY_ODR_104Hz_NORMAL_MD
@ LSM6DSO32_GY_ODR_104Hz_NORMAL_MD
Definition lsm6dso32_reg.h:2754
LSM6DSO32_GY_ODR_OFF
@ LSM6DSO32_GY_ODR_OFF
Definition lsm6dso32_reg.h:2741
LSM6DSO32_GY_ODR_52Hz_HIGH_PERF
@ LSM6DSO32_GY_ODR_52Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2745
LSM6DSO32_GY_ODR_417Hz_HIGH_PERF
@ LSM6DSO32_GY_ODR_417Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2748
LSM6DSO32_GY_ODR_26Hz_LOW_PW
@ LSM6DSO32_GY_ODR_26Hz_LOW_PW
Definition lsm6dso32_reg.h:2758
LSM6DSO32_GY_ODR_12Hz5_HIGH_PERF
@ LSM6DSO32_GY_ODR_12Hz5_HIGH_PERF
Definition lsm6dso32_reg.h:2743
LSM6DSO32_GY_ODR_3333Hz_HIGH_PERF
@ LSM6DSO32_GY_ODR_3333Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2751
LSM6DSO32_GY_ODR_1667Hz_HIGH_PERF
@ LSM6DSO32_GY_ODR_1667Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2750
LSM6DSO32_GY_ODR_833Hz_HIGH_PERF
@ LSM6DSO32_GY_ODR_833Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2749
LSM6DSO32_GY_ODR_208Hz_HIGH_PERF
@ LSM6DSO32_GY_ODR_208Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2747

◆ lsm6dso32_odr_xl_t

enum lsm6dso32_odr_xl_t
Enumerator
LSM6DSO32_XL_ODR_OFF 
LSM6DSO32_XL_ODR_6Hz5_LOW_PW 
LSM6DSO32_XL_ODR_12Hz5_LOW_PW 
LSM6DSO32_XL_ODR_26Hz_LOW_PW 
LSM6DSO32_XL_ODR_52Hz_LOW_PW 
LSM6DSO32_XL_ODR_104Hz_NORMAL_MD 
LSM6DSO32_XL_ODR_208Hz_NORMAL_MD 
LSM6DSO32_XL_ODR_12Hz5_HIGH_PERF 
LSM6DSO32_XL_ODR_26Hz_HIGH_PERF 
LSM6DSO32_XL_ODR_52Hz_HIGH_PERF 
LSM6DSO32_XL_ODR_104Hz_HIGH_PERF 
LSM6DSO32_XL_ODR_208Hz_HIGH_PERF 
LSM6DSO32_XL_ODR_417Hz_HIGH_PERF 
LSM6DSO32_XL_ODR_833Hz_HIGH_PERF 
LSM6DSO32_XL_ODR_1667Hz_HIGH_PERF 
LSM6DSO32_XL_ODR_3333Hz_HIGH_PERF 
LSM6DSO32_XL_ODR_6667Hz_HIGH_PERF 
LSM6DSO32_XL_ODR_6Hz5_ULTRA_LOW_PW 
LSM6DSO32_XL_ODR_12Hz5_ULTRA_LOW_PW 
LSM6DSO32_XL_ODR_26Hz_ULTRA_LOW_PW 
LSM6DSO32_XL_ODR_52Hz_ULTRA_LOW_PW 
LSM6DSO32_XL_ODR_104Hz_ULTRA_LOW_PW 
LSM6DSO32_XL_ODR_208Hz_ULTRA_LOW_PW 

Definition at line 2686 of file lsm6dso32_reg.h.

2687{
2688 /* Accelerometer power off */
2689 LSM6DSO32_XL_ODR_OFF = 0x00,
2690 /* Accelerometer low power mode */
2691 LSM6DSO32_XL_ODR_6Hz5_LOW_PW = 0x1B,
2692 LSM6DSO32_XL_ODR_12Hz5_LOW_PW = 0x11,
2693 LSM6DSO32_XL_ODR_26Hz_LOW_PW = 0x12,
2694 LSM6DSO32_XL_ODR_52Hz_LOW_PW = 0x13,
2695 /* Accelerometer normal mode */
2696 LSM6DSO32_XL_ODR_104Hz_NORMAL_MD = 0x14,
2697 LSM6DSO32_XL_ODR_208Hz_NORMAL_MD = 0x15,
2698 /* Accelerometer high performance */
2699 LSM6DSO32_XL_ODR_12Hz5_HIGH_PERF = 0x01,
2700 LSM6DSO32_XL_ODR_26Hz_HIGH_PERF = 0x02,
2701 LSM6DSO32_XL_ODR_52Hz_HIGH_PERF = 0x03,
2702 LSM6DSO32_XL_ODR_104Hz_HIGH_PERF = 0x04,
2703 LSM6DSO32_XL_ODR_208Hz_HIGH_PERF = 0x05,
2704 LSM6DSO32_XL_ODR_417Hz_HIGH_PERF = 0x06,
2705 LSM6DSO32_XL_ODR_833Hz_HIGH_PERF = 0x07,
2706 LSM6DSO32_XL_ODR_1667Hz_HIGH_PERF = 0x08,
2707 LSM6DSO32_XL_ODR_3333Hz_HIGH_PERF = 0x09,
2708 LSM6DSO32_XL_ODR_6667Hz_HIGH_PERF = 0x0A,
2709 /* Accelerometer ultra low power.
2710 * WARNING: Gyroscope must be in Power-Down mode when
2711 * accelerometer is in ultra low power mode.
2712 */
2713 LSM6DSO32_XL_ODR_6Hz5_ULTRA_LOW_PW = 0x2B,
2714 LSM6DSO32_XL_ODR_12Hz5_ULTRA_LOW_PW = 0x21,
2715 LSM6DSO32_XL_ODR_26Hz_ULTRA_LOW_PW = 0x22,
2716 LSM6DSO32_XL_ODR_52Hz_ULTRA_LOW_PW = 0x23,
2717 LSM6DSO32_XL_ODR_104Hz_ULTRA_LOW_PW = 0x24,
2718 LSM6DSO32_XL_ODR_208Hz_ULTRA_LOW_PW = 0x25,
2719} lsm6dso32_odr_xl_t;
lsm6dso32_odr_xl_t
lsm6dso32_odr_xl_t
Definition lsm6dso32_reg.h:2687
LSM6DSO32_XL_ODR_3333Hz_HIGH_PERF
@ LSM6DSO32_XL_ODR_3333Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2707
LSM6DSO32_XL_ODR_6667Hz_HIGH_PERF
@ LSM6DSO32_XL_ODR_6667Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2708
LSM6DSO32_XL_ODR_833Hz_HIGH_PERF
@ LSM6DSO32_XL_ODR_833Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2705
LSM6DSO32_XL_ODR_208Hz_ULTRA_LOW_PW
@ LSM6DSO32_XL_ODR_208Hz_ULTRA_LOW_PW
Definition lsm6dso32_reg.h:2718
LSM6DSO32_XL_ODR_12Hz5_HIGH_PERF
@ LSM6DSO32_XL_ODR_12Hz5_HIGH_PERF
Definition lsm6dso32_reg.h:2699
LSM6DSO32_XL_ODR_52Hz_HIGH_PERF
@ LSM6DSO32_XL_ODR_52Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2701
LSM6DSO32_XL_ODR_417Hz_HIGH_PERF
@ LSM6DSO32_XL_ODR_417Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2704
LSM6DSO32_XL_ODR_6Hz5_ULTRA_LOW_PW
@ LSM6DSO32_XL_ODR_6Hz5_ULTRA_LOW_PW
Definition lsm6dso32_reg.h:2713
LSM6DSO32_XL_ODR_208Hz_NORMAL_MD
@ LSM6DSO32_XL_ODR_208Hz_NORMAL_MD
Definition lsm6dso32_reg.h:2697
LSM6DSO32_XL_ODR_26Hz_LOW_PW
@ LSM6DSO32_XL_ODR_26Hz_LOW_PW
Definition lsm6dso32_reg.h:2693
LSM6DSO32_XL_ODR_208Hz_HIGH_PERF
@ LSM6DSO32_XL_ODR_208Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2703
LSM6DSO32_XL_ODR_12Hz5_LOW_PW
@ LSM6DSO32_XL_ODR_12Hz5_LOW_PW
Definition lsm6dso32_reg.h:2692
LSM6DSO32_XL_ODR_104Hz_NORMAL_MD
@ LSM6DSO32_XL_ODR_104Hz_NORMAL_MD
Definition lsm6dso32_reg.h:2696
LSM6DSO32_XL_ODR_26Hz_HIGH_PERF
@ LSM6DSO32_XL_ODR_26Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2700
LSM6DSO32_XL_ODR_52Hz_ULTRA_LOW_PW
@ LSM6DSO32_XL_ODR_52Hz_ULTRA_LOW_PW
Definition lsm6dso32_reg.h:2716
LSM6DSO32_XL_ODR_12Hz5_ULTRA_LOW_PW
@ LSM6DSO32_XL_ODR_12Hz5_ULTRA_LOW_PW
Definition lsm6dso32_reg.h:2714
LSM6DSO32_XL_ODR_6Hz5_LOW_PW
@ LSM6DSO32_XL_ODR_6Hz5_LOW_PW
Definition lsm6dso32_reg.h:2691
LSM6DSO32_XL_ODR_26Hz_ULTRA_LOW_PW
@ LSM6DSO32_XL_ODR_26Hz_ULTRA_LOW_PW
Definition lsm6dso32_reg.h:2715
LSM6DSO32_XL_ODR_1667Hz_HIGH_PERF
@ LSM6DSO32_XL_ODR_1667Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2706
LSM6DSO32_XL_ODR_OFF
@ LSM6DSO32_XL_ODR_OFF
Definition lsm6dso32_reg.h:2689
LSM6DSO32_XL_ODR_104Hz_HIGH_PERF
@ LSM6DSO32_XL_ODR_104Hz_HIGH_PERF
Definition lsm6dso32_reg.h:2702
LSM6DSO32_XL_ODR_52Hz_LOW_PW
@ LSM6DSO32_XL_ODR_52Hz_LOW_PW
Definition lsm6dso32_reg.h:2694
LSM6DSO32_XL_ODR_104Hz_ULTRA_LOW_PW
@ LSM6DSO32_XL_ODR_104Hz_ULTRA_LOW_PW
Definition lsm6dso32_reg.h:2717

◆ lsm6dso32_pedo_md_t

enum lsm6dso32_pedo_md_t
Enumerator
LSM6DSO32_PEDO_DISABLE 
LSM6DSO32_PEDO_BASE_MODE 
LSM6DSO32_PEDO_ADV_MODE 
LSM6DSO32_FALSE_STEP_REJ 
LSM6DSO32_FALSE_STEP_REJ_ADV_MODE 

Definition at line 3550 of file lsm6dso32_reg.h.

3551{
3552 LSM6DSO32_PEDO_DISABLE = 0x00,
3553 LSM6DSO32_PEDO_BASE_MODE = 0x01,
3554 LSM6DSO32_PEDO_ADV_MODE = 0x03,
3555 LSM6DSO32_FALSE_STEP_REJ = 0x13,
3556 LSM6DSO32_FALSE_STEP_REJ_ADV_MODE = 0x33,
3557} lsm6dso32_pedo_md_t;
lsm6dso32_pedo_md_t
lsm6dso32_pedo_md_t
Definition lsm6dso32_reg.h:3551
LSM6DSO32_PEDO_BASE_MODE
@ LSM6DSO32_PEDO_BASE_MODE
Definition lsm6dso32_reg.h:3553
LSM6DSO32_PEDO_DISABLE
@ LSM6DSO32_PEDO_DISABLE
Definition lsm6dso32_reg.h:3552
LSM6DSO32_PEDO_ADV_MODE
@ LSM6DSO32_PEDO_ADV_MODE
Definition lsm6dso32_reg.h:3554
LSM6DSO32_FALSE_STEP_REJ
@ LSM6DSO32_FALSE_STEP_REJ
Definition lsm6dso32_reg.h:3555
LSM6DSO32_FALSE_STEP_REJ_ADV_MODE
@ LSM6DSO32_FALSE_STEP_REJ_ADV_MODE
Definition lsm6dso32_reg.h:3556

◆ lsm6dso32_pp_od_t

enum lsm6dso32_pp_od_t
Enumerator
LSM6DSO32_PUSH_PULL 
LSM6DSO32_OPEN_DRAIN 

Definition at line 3115 of file lsm6dso32_reg.h.

3116{
3117 LSM6DSO32_PUSH_PULL = 0,
3118 LSM6DSO32_OPEN_DRAIN = 1,
3119} lsm6dso32_pp_od_t;
lsm6dso32_pp_od_t
lsm6dso32_pp_od_t
Definition lsm6dso32_reg.h:3116
LSM6DSO32_OPEN_DRAIN
@ LSM6DSO32_OPEN_DRAIN
Definition lsm6dso32_reg.h:3118
LSM6DSO32_PUSH_PULL
@ LSM6DSO32_PUSH_PULL
Definition lsm6dso32_reg.h:3117

◆ lsm6dso32_reg_access_t

enum lsm6dso32_reg_access_t
Enumerator
LSM6DSO32_USER_BANK 
LSM6DSO32_SENSOR_HUB_BANK 
LSM6DSO32_EMBEDDED_FUNC_BANK 

Definition at line 2883 of file lsm6dso32_reg.h.

2884{
2885 LSM6DSO32_USER_BANK = 0,
2886 LSM6DSO32_SENSOR_HUB_BANK = 1,
2887 LSM6DSO32_EMBEDDED_FUNC_BANK = 2,
2888} lsm6dso32_reg_access_t;
lsm6dso32_reg_access_t
lsm6dso32_reg_access_t
Definition lsm6dso32_reg.h:2884
LSM6DSO32_USER_BANK
@ LSM6DSO32_USER_BANK
Definition lsm6dso32_reg.h:2885
LSM6DSO32_EMBEDDED_FUNC_BANK
@ LSM6DSO32_EMBEDDED_FUNC_BANK
Definition lsm6dso32_reg.h:2887
LSM6DSO32_SENSOR_HUB_BANK
@ LSM6DSO32_SENSOR_HUB_BANK
Definition lsm6dso32_reg.h:2886

◆ lsm6dso32_rounding_t

enum lsm6dso32_rounding_t
Enumerator
LSM6DSO32_NO_ROUND 
LSM6DSO32_ROUND_XL 
LSM6DSO32_ROUND_GY 
LSM6DSO32_ROUND_GY_XL 

Definition at line 2842 of file lsm6dso32_reg.h.

2843{
2844 LSM6DSO32_NO_ROUND = 0,
2845 LSM6DSO32_ROUND_XL = 1,
2846 LSM6DSO32_ROUND_GY = 2,
2847 LSM6DSO32_ROUND_GY_XL = 3,
2848} lsm6dso32_rounding_t;
lsm6dso32_rounding_t
lsm6dso32_rounding_t
Definition lsm6dso32_reg.h:2843
LSM6DSO32_ROUND_GY
@ LSM6DSO32_ROUND_GY
Definition lsm6dso32_reg.h:2846
LSM6DSO32_NO_ROUND
@ LSM6DSO32_NO_ROUND
Definition lsm6dso32_reg.h:2844
LSM6DSO32_ROUND_GY_XL
@ LSM6DSO32_ROUND_GY_XL
Definition lsm6dso32_reg.h:2847
LSM6DSO32_ROUND_XL
@ LSM6DSO32_ROUND_XL
Definition lsm6dso32_reg.h:2845

◆ lsm6dso32_sdo_pu_en_t

enum lsm6dso32_sdo_pu_en_t
Enumerator
LSM6DSO32_PULL_UP_DISC 
LSM6DSO32_PULL_UP_CONNECT 

Definition at line 3036 of file lsm6dso32_reg.h.

3037{
3038 LSM6DSO32_PULL_UP_DISC = 0,
3039 LSM6DSO32_PULL_UP_CONNECT = 1,
3040} lsm6dso32_sdo_pu_en_t;
lsm6dso32_sdo_pu_en_t
lsm6dso32_sdo_pu_en_t
Definition lsm6dso32_reg.h:3037
LSM6DSO32_PULL_UP_DISC
@ LSM6DSO32_PULL_UP_DISC
Definition lsm6dso32_reg.h:3038
LSM6DSO32_PULL_UP_CONNECT
@ LSM6DSO32_PULL_UP_CONNECT
Definition lsm6dso32_reg.h:3039

◆ lsm6dso32_shub_odr_t

enum lsm6dso32_shub_odr_t
Enumerator
LSM6DSO32_SH_ODR_104Hz 
LSM6DSO32_SH_ODR_52Hz 
LSM6DSO32_SH_ODR_26Hz 
LSM6DSO32_SH_ODR_13Hz 

Definition at line 3827 of file lsm6dso32_reg.h.

3828{
3829 LSM6DSO32_SH_ODR_104Hz = 0,
3830 LSM6DSO32_SH_ODR_52Hz = 1,
3831 LSM6DSO32_SH_ODR_26Hz = 2,
3832 LSM6DSO32_SH_ODR_13Hz = 3,
3833} lsm6dso32_shub_odr_t;
lsm6dso32_shub_odr_t
lsm6dso32_shub_odr_t
Definition lsm6dso32_reg.h:3828
LSM6DSO32_SH_ODR_13Hz
@ LSM6DSO32_SH_ODR_13Hz
Definition lsm6dso32_reg.h:3832
LSM6DSO32_SH_ODR_26Hz
@ LSM6DSO32_SH_ODR_26Hz
Definition lsm6dso32_reg.h:3831
LSM6DSO32_SH_ODR_52Hz
@ LSM6DSO32_SH_ODR_52Hz
Definition lsm6dso32_reg.h:3830
LSM6DSO32_SH_ODR_104Hz
@ LSM6DSO32_SH_ODR_104Hz
Definition lsm6dso32_reg.h:3829

◆ lsm6dso32_shub_pu_en_t

enum lsm6dso32_shub_pu_en_t
Enumerator
LSM6DSO32_EXT_PULL_UP 
LSM6DSO32_INTERNAL_PULL_UP 

Definition at line 3790 of file lsm6dso32_reg.h.

3791{
3792 LSM6DSO32_EXT_PULL_UP = 0,
3793 LSM6DSO32_INTERNAL_PULL_UP = 1,
3794} lsm6dso32_shub_pu_en_t;
lsm6dso32_shub_pu_en_t
lsm6dso32_shub_pu_en_t
Definition lsm6dso32_reg.h:3791
LSM6DSO32_INTERNAL_PULL_UP
@ LSM6DSO32_INTERNAL_PULL_UP
Definition lsm6dso32_reg.h:3793
LSM6DSO32_EXT_PULL_UP
@ LSM6DSO32_EXT_PULL_UP
Definition lsm6dso32_reg.h:3792

◆ lsm6dso32_sim_t

enum lsm6dso32_sim_t
Enumerator
LSM6DSO32_SPI_4_WIRE 
LSM6DSO32_SPI_3_WIRE 

Definition at line 3046 of file lsm6dso32_reg.h.

3047{
3048 LSM6DSO32_SPI_4_WIRE = 0,
3049 LSM6DSO32_SPI_3_WIRE = 1,
3050} lsm6dso32_sim_t;
lsm6dso32_sim_t
lsm6dso32_sim_t
Definition lsm6dso32_reg.h:3047
LSM6DSO32_SPI_4_WIRE
@ LSM6DSO32_SPI_4_WIRE
Definition lsm6dso32_reg.h:3048
LSM6DSO32_SPI_3_WIRE
@ LSM6DSO32_SPI_3_WIRE
Definition lsm6dso32_reg.h:3049

◆ lsm6dso32_single_double_tap_t

enum lsm6dso32_single_double_tap_t
Enumerator
LSM6DSO32_ONLY_SINGLE 
LSM6DSO32_BOTH_SINGLE_DOUBLE 

Definition at line 3249 of file lsm6dso32_reg.h.

3250{
3251 LSM6DSO32_ONLY_SINGLE = 0,
3252 LSM6DSO32_BOTH_SINGLE_DOUBLE = 1,
3253} lsm6dso32_single_double_tap_t;
lsm6dso32_single_double_tap_t
lsm6dso32_single_double_tap_t
Definition lsm6dso32_reg.h:3250
LSM6DSO32_ONLY_SINGLE
@ LSM6DSO32_ONLY_SINGLE
Definition lsm6dso32_reg.h:3251
LSM6DSO32_BOTH_SINGLE_DOUBLE
@ LSM6DSO32_BOTH_SINGLE_DOUBLE
Definition lsm6dso32_reg.h:3252

◆ lsm6dso32_sixd_ths_t

enum lsm6dso32_sixd_ths_t
Enumerator
LSM6DSO32_DEG_68 
LSM6DSO32_DEG_47 

Definition at line 3259 of file lsm6dso32_reg.h.

3260{
3261 LSM6DSO32_DEG_68 = 0,
3262 LSM6DSO32_DEG_47 = 1,
3263} lsm6dso32_sixd_ths_t;
lsm6dso32_sixd_ths_t
lsm6dso32_sixd_ths_t
Definition lsm6dso32_reg.h:3260
LSM6DSO32_DEG_68
@ LSM6DSO32_DEG_68
Definition lsm6dso32_reg.h:3261
LSM6DSO32_DEG_47
@ LSM6DSO32_DEG_47
Definition lsm6dso32_reg.h:3262

◆ lsm6dso32_sleep_status_on_int_t

enum lsm6dso32_sleep_status_on_int_t
Enumerator
LSM6DSO32_DRIVE_SLEEP_CHG_EVENT 
LSM6DSO32_DRIVE_SLEEP_STATUS 

Definition at line 3174 of file lsm6dso32_reg.h.

3175{
3176 LSM6DSO32_DRIVE_SLEEP_CHG_EVENT = 0,
3177 LSM6DSO32_DRIVE_SLEEP_STATUS = 1,
3178} lsm6dso32_sleep_status_on_int_t;
lsm6dso32_sleep_status_on_int_t
lsm6dso32_sleep_status_on_int_t
Definition lsm6dso32_reg.h:3175
LSM6DSO32_DRIVE_SLEEP_CHG_EVENT
@ LSM6DSO32_DRIVE_SLEEP_CHG_EVENT
Definition lsm6dso32_reg.h:3176
LSM6DSO32_DRIVE_SLEEP_STATUS
@ LSM6DSO32_DRIVE_SLEEP_STATUS
Definition lsm6dso32_reg.h:3177

◆ lsm6dso32_slope_fds_t

enum lsm6dso32_slope_fds_t
Enumerator
LSM6DSO32_USE_SLOPE 
LSM6DSO32_USE_HPF 

Definition at line 3013 of file lsm6dso32_reg.h.

3014{
3015 LSM6DSO32_USE_SLOPE = 0,
3016 LSM6DSO32_USE_HPF = 1,
3017} lsm6dso32_slope_fds_t;
lsm6dso32_slope_fds_t
lsm6dso32_slope_fds_t
Definition lsm6dso32_reg.h:3014
LSM6DSO32_USE_SLOPE
@ LSM6DSO32_USE_SLOPE
Definition lsm6dso32_reg.h:3015
LSM6DSO32_USE_HPF
@ LSM6DSO32_USE_HPF
Definition lsm6dso32_reg.h:3016

◆ lsm6dso32_st_g_t

enum lsm6dso32_st_g_t
Enumerator
LSM6DSO32_GY_ST_DISABLE 
LSM6DSO32_GY_ST_POSITIVE 
LSM6DSO32_GY_ST_NEGATIVE 

Definition at line 2936 of file lsm6dso32_reg.h.

2937{
2938 LSM6DSO32_GY_ST_DISABLE = 0,
2939 LSM6DSO32_GY_ST_POSITIVE = 1,
2940 LSM6DSO32_GY_ST_NEGATIVE = 3,
2941} lsm6dso32_st_g_t;
lsm6dso32_st_g_t
lsm6dso32_st_g_t
Definition lsm6dso32_reg.h:2937
LSM6DSO32_GY_ST_NEGATIVE
@ LSM6DSO32_GY_ST_NEGATIVE
Definition lsm6dso32_reg.h:2940
LSM6DSO32_GY_ST_POSITIVE
@ LSM6DSO32_GY_ST_POSITIVE
Definition lsm6dso32_reg.h:2939
LSM6DSO32_GY_ST_DISABLE
@ LSM6DSO32_GY_ST_DISABLE
Definition lsm6dso32_reg.h:2938

◆ lsm6dso32_st_xl_t

enum lsm6dso32_st_xl_t
Enumerator
LSM6DSO32_XL_ST_DISABLE 
LSM6DSO32_XL_ST_POSITIVE 
LSM6DSO32_XL_ST_NEGATIVE 

Definition at line 2925 of file lsm6dso32_reg.h.

2926{
2927 LSM6DSO32_XL_ST_DISABLE = 0,
2928 LSM6DSO32_XL_ST_POSITIVE = 1,
2929 LSM6DSO32_XL_ST_NEGATIVE = 2,
2930} lsm6dso32_st_xl_t;
lsm6dso32_st_xl_t
lsm6dso32_st_xl_t
Definition lsm6dso32_reg.h:2926
LSM6DSO32_XL_ST_POSITIVE
@ LSM6DSO32_XL_ST_POSITIVE
Definition lsm6dso32_reg.h:2928
LSM6DSO32_XL_ST_DISABLE
@ LSM6DSO32_XL_ST_DISABLE
Definition lsm6dso32_reg.h:2927
LSM6DSO32_XL_ST_NEGATIVE
@ LSM6DSO32_XL_ST_NEGATIVE
Definition lsm6dso32_reg.h:2929

◆ lsm6dso32_start_config_t

enum lsm6dso32_start_config_t
Enumerator
LSM6DSO32_EXT_ON_INT2_PIN 
LSM6DSO32_XL_GY_DRDY 

Definition at line 3804 of file lsm6dso32_reg.h.

3805{
3806 LSM6DSO32_EXT_ON_INT2_PIN = 1,
3807 LSM6DSO32_XL_GY_DRDY = 0,
3808} lsm6dso32_start_config_t;
lsm6dso32_start_config_t
lsm6dso32_start_config_t
Definition lsm6dso32_reg.h:3805
LSM6DSO32_XL_GY_DRDY
@ LSM6DSO32_XL_GY_DRDY
Definition lsm6dso32_reg.h:3807
LSM6DSO32_EXT_ON_INT2_PIN
@ LSM6DSO32_EXT_ON_INT2_PIN
Definition lsm6dso32_reg.h:3806

◆ lsm6dso32_tap_priority_t

enum lsm6dso32_tap_priority_t
Enumerator
LSM6DSO32_XYZ 
LSM6DSO32_YXZ 
LSM6DSO32_XZY 
LSM6DSO32_ZYX 
LSM6DSO32_YZX 
LSM6DSO32_ZXY 

Definition at line 3218 of file lsm6dso32_reg.h.

3219{
3220 LSM6DSO32_XYZ = 0,
3221 LSM6DSO32_YXZ = 1,
3222 LSM6DSO32_XZY = 2,
3223 LSM6DSO32_ZYX = 3,
3224 LSM6DSO32_YZX = 5,
3225 LSM6DSO32_ZXY = 6,
3226} lsm6dso32_tap_priority_t;
lsm6dso32_tap_priority_t
lsm6dso32_tap_priority_t
Definition lsm6dso32_reg.h:3219
LSM6DSO32_XYZ
@ LSM6DSO32_XYZ
Definition lsm6dso32_reg.h:3220
LSM6DSO32_ZXY
@ LSM6DSO32_ZXY
Definition lsm6dso32_reg.h:3225
LSM6DSO32_YXZ
@ LSM6DSO32_YXZ
Definition lsm6dso32_reg.h:3221
LSM6DSO32_XZY
@ LSM6DSO32_XZY
Definition lsm6dso32_reg.h:3222
LSM6DSO32_YZX
@ LSM6DSO32_YZX
Definition lsm6dso32_reg.h:3224
LSM6DSO32_ZYX
@ LSM6DSO32_ZYX
Definition lsm6dso32_reg.h:3223

◆ lsm6dso32_usr_off_w_t

enum lsm6dso32_usr_off_w_t
Enumerator
LSM6DSO32_LSb_1mg 
LSM6DSO32_LSb_16mg 

Definition at line 2771 of file lsm6dso32_reg.h.

2772{
2773 LSM6DSO32_LSb_1mg = 0,
2774 LSM6DSO32_LSb_16mg = 1,
2775} lsm6dso32_usr_off_w_t;
lsm6dso32_usr_off_w_t
lsm6dso32_usr_off_w_t
Definition lsm6dso32_reg.h:2772
LSM6DSO32_LSb_16mg
@ LSM6DSO32_LSb_16mg
Definition lsm6dso32_reg.h:2774
LSM6DSO32_LSb_1mg
@ LSM6DSO32_LSb_1mg
Definition lsm6dso32_reg.h:2773

◆ lsm6dso32_wake_ths_w_t

enum lsm6dso32_wake_ths_w_t
Enumerator
LSM6DSO32_LSb_FS_DIV_64 
LSM6DSO32_LSb_FS_DIV_256 

Definition at line 3150 of file lsm6dso32_reg.h.

3151{
3152 LSM6DSO32_LSb_FS_DIV_64 = 0,
3153 LSM6DSO32_LSb_FS_DIV_256 = 1,
3154} lsm6dso32_wake_ths_w_t;
lsm6dso32_wake_ths_w_t
lsm6dso32_wake_ths_w_t
Definition lsm6dso32_reg.h:3151
LSM6DSO32_LSb_FS_DIV_64
@ LSM6DSO32_LSb_FS_DIV_64
Definition lsm6dso32_reg.h:3152
LSM6DSO32_LSb_FS_DIV_256
@ LSM6DSO32_LSb_FS_DIV_256
Definition lsm6dso32_reg.h:3153

◆ lsm6dso32_write_once_t

enum lsm6dso32_write_once_t
Enumerator
LSM6DSO32_EACH_SH_CYCLE 
LSM6DSO32_ONLY_FIRST_CYCLE 

Definition at line 3814 of file lsm6dso32_reg.h.

3815{
3816 LSM6DSO32_EACH_SH_CYCLE = 0,
3817 LSM6DSO32_ONLY_FIRST_CYCLE = 1,
3818} lsm6dso32_write_once_t;
lsm6dso32_write_once_t
lsm6dso32_write_once_t
Definition lsm6dso32_reg.h:3815
LSM6DSO32_EACH_SH_CYCLE
@ LSM6DSO32_EACH_SH_CYCLE
Definition lsm6dso32_reg.h:3816
LSM6DSO32_ONLY_FIRST_CYCLE
@ LSM6DSO32_ONLY_FIRST_CYCLE
Definition lsm6dso32_reg.h:3817

Function Documentation

◆ lsm6dso32_ln_pg_read()

int32_t lsm6dso32_ln_pg_read ( stmdev_ctx_t *  ctx,
uint16_t  address,
uint8_t *  val 
)