This file provides a set of functions needed to drive the lsm6dso32 enhanced inertial module. More...

Collaboration diagram for "LSM6DSO32 IMU Driver":

Modules
	LSM6DSO32_Interfaces_Functions
	This section provide a set of functions used to read and write a generic register of the device. MANDATORY: return 0 -> no Error.

	LSM6DSO32_Sensitivity
	These functions convert raw-data into engineering units.

	LSM6DSO32_Data_Generation
	This section groups all the functions concerning data generation.

	LSM6DSO32_common
	This section groups common useful functions.

	LSM6DSO32_filters
	This section group all the functions concerning the filters configuration.

	LSM6DSO32_interrupt_pins
	This section groups all the functions that manage interrupt pins.

	LSM6DSO32_Wake_Up_event
	This section groups all the functions that manage the Wake Up event generation.

	Activity/Inactivity_detection
	This section groups all the functions concerning activity/inactivity detection.

	LSM6DSO32_tap_generator
	This section groups all the functions that manage the tap and double tap event generation.

	LSM6DSO32_DEN_functionality
	This section groups all the functions concerning DEN functionality.

	LSM6DSO32_Pedometer
	This section groups all the functions that manage pedometer.

	LSM6DSO32_significant_motion
	This section groups all the functions that manage the significant motion detection.

	LSM6DSO32_Sensor_hub
	This section groups all the functions that manage the sensor hub.

Enumerations
enum	OFFSET_TYPE { HWOFFSET = 0 , SWOFFSET = 1 , RESET_HWOFFSET = 2 }
	Specifies the type of offset compensation to be used. More...

Functions
int32_t	lsm6dso32_xl_full_scale_set (stmdev_ctx_t *ctx, lsm6dso32_fs_xl_t val)
	Accelerometer full-scale selection.[set].

int32_t	lsm6dso32_xl_full_scale_get (stmdev_ctx_t ctx, lsm6dso32_fs_xl_t val)
	Accelerometer full-scale selection.[get].

int32_t	lsm6dso32_xl_data_rate_set (stmdev_ctx_t *ctx, lsm6dso32_odr_xl_t val)
	Accelerometer UI data rate and power mode selection.[set].

int32_t	lsm6dso32_xl_data_rate_get (stmdev_ctx_t ctx, lsm6dso32_odr_xl_t val)
	Accelerometer UI data rate selection.[get].

int32_t	lsm6dso32_gy_full_scale_set (stmdev_ctx_t *ctx, lsm6dso32_fs_g_t val)
	Gyroscope UI chain full-scale selection.[set].

int32_t	lsm6dso32_gy_full_scale_get (stmdev_ctx_t ctx, lsm6dso32_fs_g_t val)
	Gyroscope UI chain full-scale selection.[get].

int32_t	lsm6dso32_gy_data_rate_set (stmdev_ctx_t *ctx, lsm6dso32_odr_g_t val)
	Gyroscope UI data rate selection.[set].

int32_t	lsm6dso32_gy_data_rate_get (stmdev_ctx_t ctx, lsm6dso32_odr_g_t val)
	Gyroscope UI data rate selection.[get].

int32_t	lsm6dso32_block_data_update_set (stmdev_ctx_t *ctx, uint8_t val)
	Block data update.[set].

int32_t	lsm6dso32_block_data_update_get (stmdev_ctx_t ctx, uint8_t val)
	Block data update.[get].

int32_t	lsm6dso32_xl_offset_weight_set (stmdev_ctx_t *ctx, lsm6dso32_usr_off_w_t val)
	Weight of XL user offset bits of registers X_OFS_USR (73h), Y_OFS_USR (74h), Z_OFS_USR (75h).[set].

int32_t	lsm6dso32_xl_offset_weight_get (stmdev_ctx_t ctx, lsm6dso32_usr_off_w_t val)
	Weight of XL user offset bits of registers X_OFS_USR (73h), Y_OFS_USR (74h), Z_OFS_USR (75h).[get].

int32_t	lsm6dso32_all_sources_get (stmdev_ctx_t ctx, lsm6dso32_all_sources_t val)
	Read all the interrupt flag of the device.[get].

int32_t	lsm6dso32_status_reg_get (stmdev_ctx_t ctx, lsm6dso32_status_reg_t val)
	The STATUS_REG register is read by the primary interface.[get].

int32_t	lsm6dso32_xl_flag_data_ready_get (stmdev_ctx_t ctx, uint8_t val)
	Accelerometer new data available.[get].

int32_t	lsm6dso32_gy_flag_data_ready_get (stmdev_ctx_t ctx, uint8_t val)
	Gyroscope new data available.[get].

int32_t	lsm6dso32_temp_flag_data_ready_get (stmdev_ctx_t ctx, uint8_t val)
	Temperature new data available.[get].

int32_t	lsm6dso32_xl_usr_offset_x_set (stmdev_ctx_t ctx, uint8_t buff)
	Accelerometer X-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_W in CTRL6_C (15h). The value must be in the range [-127 127].[set].

int32_t	lsm6dso32_xl_usr_offset_x_get (stmdev_ctx_t ctx, uint8_t buff)
	Accelerometer X-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_W in CTRL6_C (15h). The value must be in the range [-127 127].[get].

int32_t	lsm6dso32_xl_usr_offset_y_set (stmdev_ctx_t ctx, uint8_t buff)
	Accelerometer Y-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_W in CTRL6_C (15h). The value must be in the range [-127 127].[set].

int32_t	lsm6dso32_xl_usr_offset_y_get (stmdev_ctx_t ctx, uint8_t buff)
	Accelerometer Y-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_W in CTRL6_C (15h). The value must be in the range [-127 127].[get].

int32_t	lsm6dso32_xl_usr_offset_z_set (stmdev_ctx_t ctx, uint8_t buff)
	Accelerometer Z-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_W in CTRL6_C (15h). The value must be in the range [-127 127].[set].

int32_t	lsm6dso32_xl_usr_offset_z_get (stmdev_ctx_t ctx, uint8_t buff)
	Accelerometer Z-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_W in CTRL6_C (15h). The value must be in the range [-127 127].[get].

int32_t	lsm6dso32_xl_usr_offset_set (stmdev_ctx_t *ctx, uint8_t val)
	Enables user offset on out.[set].

int32_t	lsm6dso32_xl_usr_offset_get (stmdev_ctx_t ctx, uint8_t val)
	User offset on out flag.[get].

int32_t	lsm6dso32_sdo_sa0_mode_set (stmdev_ctx_t *ctx, lsm6dso32_sdo_pu_en_t val)
	Connect/Disconnect SDO/SA0 internal pull-up.[set].

int32_t	lsm6dso32_sdo_sa0_mode_get (stmdev_ctx_t ctx, lsm6dso32_sdo_pu_en_t val)
	Connect/Disconnect SDO/SA0 internal pull-up.[get].

int32_t	lsm6dso32_spi_mode_set (stmdev_ctx_t *ctx, lsm6dso32_sim_t val)
	SPI Serial Interface Mode selection.[set].

int32_t	lsm6dso32_spi_mode_get (stmdev_ctx_t ctx, lsm6dso32_sim_t val)
	SPI Serial Interface Mode selection.[get].

int32_t	lsm6dso32_i2c_interface_set (stmdev_ctx_t *ctx, lsm6dso32_i2c_disable_t val)
	Disable / Enable I2C interface.[set].

int32_t	lsm6dso32_i2c_interface_get (stmdev_ctx_t ctx, lsm6dso32_i2c_disable_t val)
	Disable / Enable I2C interface.[get].

int32_t	lsm6dso32_i3c_disable_set (stmdev_ctx_t *ctx, lsm6dso32_i3c_disable_t val)
	I3C Enable/Disable communication protocol[.set].

int32_t	lsm6dso32_i3c_disable_get (stmdev_ctx_t ctx, lsm6dso32_i3c_disable_t val)
	I3C Enable/Disable communication protocol.[get].

int32_t	imuP_write (void handle, uint8_t reg_addr, const uint8_t buf, uint16_t len)
	SPI write function for the primary IMU (LSM6DSO32).

int32_t	imuP_read (void handle, uint8_t reg_addr, uint8_t buf, uint16_t len)
	SPI read function for the primary IMU (LSM6DSO32).

int32_t	imuB_write (void handle, uint8_t reg_addr, const uint8_t buf, uint16_t len)
	SPI write function for the backup IMU (LSM6DSO32).

int32_t	imuB_read (void handle, uint8_t reg_addr, uint8_t buf, uint16_t len)
	SPI read function for the backup IMU (LSM6DSO32).

int8_t	init_imup (stmdev_ctx_t *imu, lsm6dso32_fs_xl_t acc_full_scale, lsm6dso32_fs_g_t gyro_full_scale, lsm6dso32_odr_xl_t acc_output_data_rate, lsm6dso32_odr_g_t gyro_output_data_rate)
	Initializes the primary IMU (LSM6DSO32).

int8_t	init_imuB (stmdev_ctx_t *imu, lsm6dso32_fs_xl_t acc_full_scale, lsm6dso32_fs_g_t gyro_full_scale, lsm6dso32_odr_xl_t acc_output_data_rate, lsm6dso32_odr_g_t gyro_output_data_rate)
	Initializes the backup IMU (LSM6DSO32).

int8_t	calibrateIMU (stmdev_ctx_t *imu, uint16_t iterationNum, OFFSET_TYPE type)
	Calibrates the IMU by calculating sensor offsets.

int32_t	imuP_read_2 (void handle, uint8_t reg_addr, uint8_t buf, uint16_t len)
	SPI read function for the primary IMU (LSM6DSO32).

Detailed Description

This file provides a set of functions needed to drive the lsm6dso32 enhanced inertial module.

This section groups all the functions concerning main serial interface management (not auxiliary)

Enumeration Type Documentation

◆ OFFSET_TYPE

enum OFFSET_TYPE

Specifies the type of offset compensation to be used.

This enumeration is used to distinguish between hardware-based, software-based, or resetting the hardware offset.

Enumerator
HWOFFSET	Use the hardware's internal offset registers.
SWOFFSET	Apply a software-based offset after reading the data.
RESET_HWOFFSET	Reset the hardware offset registers to their default values.

Definition at line 60 of file utilities.h.

             {
    HWOFFSET = 0,       
    SWOFFSET = 1,       
    RESET_HWOFFSET = 2  
} OFFSET_TYPE;

Function Documentation

◆ calibrateIMU()

int8_t calibrateIMU	(	stmdev_ctx_t *	imu,
		uint16_t	iterationNum,
		OFFSET_TYPE	type
	)

Calibrates the IMU by calculating sensor offsets.

Reads the accelerometer and gyroscope for a specified number of iterations while the device is stationary to determine the bias/offset. It then writes these offsets to the IMU's hardware registers to be automatically subtracted from future measurements.

Parameters

[in,out]	imu	Pointer to the stmdev_ctx_t driver context.
[in]	iterationNum	The number of samples to average for calibration.
[in]	type	The type of calibration to perform (e.g., HWOFFSET).

Returns: int8_t 0 on success.

Note: The device must be perfectly still during calibration. For the accelerometer, the Z-axis should be pointing up, against gravity, to properly calibrate the 1g offset.

Definition at line 366 of file utilities.c.

                                                                                {
 
    float_t mean_acceleration_mg[3] = {0};
    float_t mean_angular_rate_mdps[3] = {0};
    float_t mean_temperature_degC = 0.0;
    float_t acceleration_mg[3] = {0};
    float_t angular_rate_mdps[3] = {0};
    float_t temperature_degC = 0.0;
    int16_t data_raw_acceleration[3] = {0};
    int16_t data_raw_angular_rate[3] = {0};
    int16_t data_raw_temperature = 0.0;
 
    lsm6dso32_acceleration_raw_get(imu, data_raw_acceleration);
    lsm6dso32_angular_rate_raw_get(imu, data_raw_angular_rate);
    lsm6dso32_temperature_raw_get(imu, &data_raw_temperature);
 
    acceleration_mg[0] = lsm6dso32_from_fs16_to_mg(data_raw_acceleration[0]);
    acceleration_mg[1] = lsm6dso32_from_fs16_to_mg(data_raw_acceleration[1]);
    acceleration_mg[2] = lsm6dso32_from_fs16_to_mg(data_raw_acceleration[2]);
 
    angular_rate_mdps[0] = lsm6dso32_from_fs2000_to_mdps(data_raw_angular_rate[0]);
    angular_rate_mdps[1] = lsm6dso32_from_fs2000_to_mdps(data_raw_angular_rate[1]);
    angular_rate_mdps[2] = lsm6dso32_from_fs2000_to_mdps(data_raw_angular_rate[2]);
 
    temperature_degC = lsm6dso32_from_lsb_to_celsius(data_raw_temperature);
 
    mean_acceleration_mg[0] += acceleration_mg[0];
    mean_acceleration_mg[1] += acceleration_mg[1];
    mean_acceleration_mg[2] += acceleration_mg[2];
 
    mean_angular_rate_mdps[0] += angular_rate_mdps[0];
    mean_angular_rate_mdps[1] += angular_rate_mdps[1];
    mean_angular_rate_mdps[2] += angular_rate_mdps[2];
 
    mean_temperature_degC += temperature_degC;
 
    for (int i = 0; i < iterationNum; i++) {
        lsm6dso32_reg_t reg;
        /* Read output only if new data is available */
        lsm6dso32_status_reg_get(imu, &reg.status_reg);
 
        if (reg.status_reg.xlda) {
            /* Read acceleration data */
            memset(data_raw_acceleration, 0x00, 3 * sizeof(int16_t));
            lsm6dso32_acceleration_raw_get(imu, data_raw_acceleration);
            acceleration_mg[0] = lsm6dso32_from_fs16_to_mg(data_raw_acceleration[0]);
            acceleration_mg[1] = lsm6dso32_from_fs16_to_mg(data_raw_acceleration[1]);
            acceleration_mg[2] = lsm6dso32_from_fs16_to_mg(data_raw_acceleration[2]);
            mean_acceleration_mg[0] += acceleration_mg[0];
            mean_acceleration_mg[0] /= 2;
            mean_acceleration_mg[1] += acceleration_mg[1];
            mean_acceleration_mg[1] /= 2;
            mean_acceleration_mg[2] += acceleration_mg[2];
            mean_acceleration_mg[2] /= 2;
        }
 
        if (reg.status_reg.gda) {
            /* Read angular rate field data */
            memset(data_raw_angular_rate, 0x00, 3 * sizeof(int16_t));
            lsm6dso32_angular_rate_raw_get(imu, data_raw_angular_rate);
            angular_rate_mdps[0] = lsm6dso32_from_fs2000_to_mdps(data_raw_angular_rate[0]);
            angular_rate_mdps[1] = lsm6dso32_from_fs2000_to_mdps(data_raw_angular_rate[1]);
            angular_rate_mdps[2] = lsm6dso32_from_fs2000_to_mdps(data_raw_angular_rate[2]);
            mean_angular_rate_mdps[0] += angular_rate_mdps[0];
            mean_angular_rate_mdps[0] /= 2;
            mean_angular_rate_mdps[1] += angular_rate_mdps[1];
            mean_angular_rate_mdps[1] /= 2;
            mean_angular_rate_mdps[2] += angular_rate_mdps[2];
            mean_angular_rate_mdps[2] /= 2;
        }
 
        if (reg.status_reg.tda) {
            /* Read temperature data */
            memset(&data_raw_temperature, 0x00, sizeof(int16_t));
            lsm6dso32_temperature_raw_get(imu, &data_raw_temperature);
            temperature_degC = lsm6dso32_from_lsb_to_celsius(data_raw_temperature);
            mean_temperature_degC += temperature_degC;
            mean_temperature_degC /= 2;
        }
    }
 
    switch(type) {
//          case SWOFFSET:
//              /* FIXME handle a possible sw offset type, store offset values somewhere and use
//               * them to calibrate measurements. */
//
//              acceleration_mg_swoffset[0] = mean_acceleration_mg[0];
//              acceleration_mg_swoffset[1] = mean_acceleration_mg[1];
//              acceleration_mg_swoffset[2] = mean_acceleration_mg[2];
//
//              angular_rate_mdps_swoffset[0] = mean_angular_rate_mdps[0];
//              angular_rate_mdps_swoffset[1] = mean_angular_rate_mdps[1];
//              angular_rate_mdps_swoffset[2] = mean_angular_rate_mdps[2];
//
//              break;
            case HWOFFSET:
 
                // add code to set a possible hardware offset in the IMU, if needed
 
                /*
                    LSM6DSO32_X_OFS_USR
                    LSM6DSO32_Y_OFS_USR
                    LSM6DSO32_Z_OFS_USR
 
                    are the registers used to set an hardware offset to accelerometer measurements
 
                    To enable offset USR_OFF_ON_OUT bit of the CTRL7_G register must be set.
 
                    The value of the offset is expressed on 8 bits 2's complement.
 
                    The weight [g/LSB] to be applied to the offset register values is independent
                     of the accelerometer selected full scale
                     and can be configured using the USR_OFF_W bit of the CTRL6_C register:
                    • 2^-10 g/LSB if the USR_OFF_W bit is set to 0
                    • 2^-6  g/LSB if the USR_OFF_W bit is set to 1
                */
 
                /*
                 * 1. offset is computed using the finest weight
                 * 2. we check whether the offset can be represented on 8 bits 2's complement
                 * 3.1. If yes, the weight is set
                 * 3.2. Otherwise, the coarser weight is used and the offsets are recomputed
                 * 4. the value of the offset is stored in imu's registers
                 */
 
                float mean_acceleration_x = mean_acceleration_mg[0] / 2;
                float mean_acceleration_y = mean_acceleration_mg[1] / 2;
                float mean_acceleration_z = mean_acceleration_mg[2] / 2;
 
                float mean_acceleration = sqrtf(
                    mean_acceleration_mg[0]*mean_acceleration_mg[0] +
                    mean_acceleration_mg[1]*mean_acceleration_mg[1] +
                    mean_acceleration_mg[2]*mean_acceleration_mg[2]
                );
 
                float mean_acc_direction_x = mean_acceleration_x / mean_acceleration;
                float mean_acc_direction_y = mean_acceleration_y / mean_acceleration;
                float mean_acc_direction_z = mean_acceleration_z / mean_acceleration;
 
                float gravity = 1000;
 
                mean_acceleration_x -= mean_acc_direction_x*gravity;
                mean_acceleration_y -= mean_acc_direction_y*gravity;
                mean_acceleration_z -= mean_acc_direction_z*gravity;
 
                int16_t offsetValX = (int16_t)mean_acceleration_x;
                int16_t offsetValY = (int16_t)mean_acceleration_y;
                int16_t offsetValZ = (int16_t)mean_acceleration_z;
 
                if (offsetValX > -128 && offsetValX < 128 && offsetValY > -128 && offsetValY < 128
                        && offsetValZ > -128 && offsetValZ < 128) {
 
                    lsm6dso32_xl_offset_weight_set(imu, LSM6DSO32_LSb_1mg);
                } else {
                    /* the right shift by 4 operation is done to perform the division by 16 */
                    lsm6dso32_xl_offset_weight_set(imu, LSM6DSO32_LSb_16mg);
                    offsetValX /= 16;
                    offsetValY /= 16;
                    offsetValZ /= 16;
                }
 
                //      int32_t lsm6dso32_xl_offset_weight_get(stmdev_ctx_t *ctx, lsm6dso32_usr_off_w_t *val);
                //      int32_t lsm6dso32_xl_usr_offset_x_get(stmdev_ctx_t *ctx, uint8_t *buff);
                //      int32_t lsm6dso32_xl_usr_offset_y_get(stmdev_ctx_t *ctx, uint8_t *buff);
                //      int32_t lsm6dso32_xl_usr_offset_z_get(stmdev_ctx_t *ctx, uint8_t *buff);
                //      int32_t lsm6dso32_xl_usr_offset_get(stmdev_ctx_t *ctx, uint8_t *val);
 
                lsm6dso32_xl_usr_offset_x_set(imu, (uint8_t *) &offsetValX);
                lsm6dso32_xl_usr_offset_y_set(imu, (uint8_t *) &offsetValY);
                lsm6dso32_xl_usr_offset_z_set(imu, (uint8_t *) &offsetValZ);
 
                /* this function call enables the offset previously set */
                lsm6dso32_xl_usr_offset_set(imu, 1);
 
                break;
 
            case RESET_HWOFFSET:
 
                lsm6dso32_xl_usr_offset_x_set(imu, 0);
                lsm6dso32_xl_usr_offset_y_set(imu, 0);
                lsm6dso32_xl_usr_offset_z_set(imu, 0);
 
                lsm6dso32_xl_usr_offset_set(imu, 0);
 
                break;
 
            default:
 
                break;
        }
 
 
 
    return 0;
}

References lsm6dso32_status_reg_t::gda, HWOFFSET, lsm6dso32_acceleration_raw_get(), lsm6dso32_angular_rate_raw_get(), lsm6dso32_from_fs16_to_mg(), lsm6dso32_from_fs2000_to_mdps(), lsm6dso32_from_lsb_to_celsius(), LSM6DSO32_LSb_16mg, LSM6DSO32_LSb_1mg, lsm6dso32_status_reg_get(), lsm6dso32_temperature_raw_get(), lsm6dso32_xl_offset_weight_set(), lsm6dso32_xl_usr_offset_set(), lsm6dso32_xl_usr_offset_x_set(), lsm6dso32_xl_usr_offset_y_set(), lsm6dso32_xl_usr_offset_z_set(), RESET_HWOFFSET, lsm6dso32_reg_t::status_reg, lsm6dso32_status_reg_t::tda, and lsm6dso32_status_reg_t::xlda.

Referenced by main().

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◆ imuB_read()

int32_t imuB_read	(	void *	handle,
		uint8_t	reg_addr,
		uint8_t *	buf,
		uint16_t	len
	)

SPI read function for the backup IMU (LSM6DSO32).

This function is designed to be passed as a function pointer to the STMicroelectronics IMU driver library. It handles SPI bus transactions.

Parameters

[in]	handle	Unused handle pointer, for driver compatibility.
[in]	reg_addr	The 7-bit register address to read from. The read bit is set automatically.
[out]	buf	Pointer to the buffer where read data will be stored.
[in]	len	The number of bytes to read.

Returns: int32_t HAL_OK on success, HAL_ERROR on failure.

Definition at line 582 of file utilities.c.

                                                                              {
 
    int32_t result = HAL_ERROR;
 
    reg_addr |= 0x80;
 
    BMP390_CS_HIGH;
    MAG_CS_HIGH;
    IMU_CS_LOW;
 
    if (HAL_SPI_Transmit(&hspi3, &reg_addr, 1, 100) == HAL_OK) {
        if (HAL_SPI_Receive(&hspi3, buf, len, 100) == HAL_OK) {
            result = HAL_OK;
        }
    }
 
    IMU_CS_HIGH;
 
    return result;
}

References HAL_ERROR, HAL_OK, and hspi3.

Referenced by init_imuB().

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◆ imuB_write()

int32_t imuB_write	(	void *	handle,
		uint8_t	reg_addr,
		const uint8_t *	buf,
		uint16_t	len
	)

SPI write function for the backup IMU (LSM6DSO32).

This function is designed to be passed as a function pointer to the STMicroelectronics IMU driver library. It handles SPI bus transactions.

Parameters

[in]	handle	Unused handle pointer, for driver compatibility.
[in]	reg_addr	The 7-bit register address to write to.
[in]	buf	Pointer to the data buffer to be written.
[in]	len	The number of bytes to write.

Returns: int32_t HAL_OK on success, HAL_ERROR on failure.

Definition at line 563 of file utilities.c.

                                                                                     {
 
    int32_t result = HAL_ERROR;
 
    BMP390_CS_HIGH;
    MAG_CS_HIGH;
    IMU_CS_LOW;
 
    if (HAL_SPI_Transmit(&hspi3, &reg_addr, 1, 100) == HAL_OK) {
        if (HAL_SPI_Transmit(&hspi3, (uint8_t *)buf, len, 100) == HAL_OK) {
            result = HAL_OK;
        }
    }
 
    IMU_CS_HIGH;
 
    return result;
}

References HAL_ERROR, HAL_OK, and hspi3.

Referenced by init_imuB().

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◆ imuP_read()

int32_t imuP_read	(	void *	handle,
		uint8_t	reg_addr,
		uint8_t *	buf,
		uint16_t	len
	)

SPI read function for the primary IMU (LSM6DSO32).

This function is designed to be passed as a function pointer to the STMicroelectronics IMU driver library. It handles SPI bus transactions.

Parameters

[in]	handle	Unused handle pointer, for driver compatibility.
[in]	reg_addr	The 7-bit register address to read from. The read bit is set automatically.
[out]	buf	Pointer to the buffer where read data will be stored.
[in]	len	The number of bytes to read.

Returns: int32_t HAL_OK on success, HAL_ERROR on failure.

Definition at line 52 of file utilities.c.

                                                                              {
 
    int32_t result = HAL_ERROR;
 
    reg_addr |= 0x80;
    BMP390_CS_HIGH;
    MAG_CS_HIGH;
    IMU_CS_LOW;
 
    if (HAL_SPI_Transmit(&hspi2, &reg_addr, 1, 100) == HAL_OK) {
        if (HAL_SPI_Receive(&hspi2, buf, len, 100) == HAL_OK) {
            result = HAL_OK;
        }
    }
 
    IMU_CS_HIGH;
 
    return result;
}

References HAL_ERROR, HAL_OK, and hspi2.

Referenced by init_imup().

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◆ imuP_read_2()

int32_t imuP_read_2	(	void *	handle,
		uint8_t	reg_addr,
		uint8_t *	buf,
		uint16_t	len
	)

SPI read function for the primary IMU (LSM6DSO32).

This function is designed to be passed as a function pointer to the STMicroelectronics IMU driver library. It handles SPI bus transactions. It does the same thing as imuP_read but using a different Hal function

Parameters

[in]	handle	Unused handle pointer, for driver compatibility.
[in]	reg_addr	The 7-bit register address to read from. The read bit is set automatically.
[out]	buf	Pointer to the buffer where read data will be stored.
[in]	len	The number of bytes to read.

Returns: int32_t HAL_OK on success, HAL_ERROR on failure.

Definition at line 71 of file utilities.c.

                                                                                {
    int32_t result = HAL_ERROR;
    uint8_t tx_buffer[len + 1]; // Buffer to send address + dummy bytes
    uint8_t rx_buffer[len + 1]; // Buffer to receive dummy byte + actual data
 
    reg_addr |= 0x80; // Correctly set the read bit
    tx_buffer[0] = reg_addr; // First byte to transmit is the address
 
    // Fill the rest of the transmit buffer with dummy bytes
    for (int i = 1; i <= len; i++) {
        tx_buffer[i] = 0xFF; // Dummy byte (value doesn't usually matter)
    }
    if(HAL_GPIO_ReadPin(BARO_CS_GPIO_Port,BARO_CS_Pin)!=GPIO_PIN_SET){BMP390_CS_HIGH;}
    if(HAL_GPIO_ReadPin(MAG_CS_GPIO_Port,MAG_CS_Pin)!=GPIO_PIN_SET){MAG_CS_HIGH;}
 
    IMU_CS_LOW; // Lower CS
 
    // Use TransmitReceive for simultaneous sending and receiving
    if (HAL_SPI_TransmitReceive(&hspi2, tx_buffer, rx_buffer, len + 1, 100) == HAL_OK) {
        // The actual data is in rx_buffer starting from the second byte
        for (int i = 0; i < len; i++) {
            buf[i] = rx_buffer[i + 1];
        }
        result = HAL_OK;
    }
 
    IMU_CS_HIGH; // Raise CS
 
    return result;
}

References HAL_ERROR, HAL_OK, and hspi2.

◆ imuP_write()

int32_t imuP_write	(	void *	handle,
		uint8_t	reg_addr,
		const uint8_t *	buf,
		uint16_t	len
	)

SPI write function for the primary IMU (LSM6DSO32).

This function is designed to be passed as a function pointer to the STMicroelectronics IMU driver library. It handles SPI bus transactions.

Parameters

[in]	handle	Unused handle pointer, for driver compatibility.
[in]	reg_addr	The 7-bit register address to write to.
[in]	buf	Pointer to the data buffer to be written.
[in]	len	The number of bytes to write.

Returns: int32_t HAL_OK on success, HAL_ERROR on failure.

Definition at line 33 of file utilities.c.

                                                                                     {
 
    int32_t result = HAL_ERROR;
 
    BMP390_CS_HIGH;
    MAG_CS_HIGH;
    IMU_CS_LOW;
 
    if (HAL_SPI_Transmit(&hspi2, &reg_addr, 1, 100) == HAL_OK) {
        if (HAL_SPI_Transmit(&hspi2, (uint8_t *)buf, len, 100) == HAL_OK) {
            result = HAL_OK;
        }
    }
 
    IMU_CS_HIGH;
 
    return result;
}

References HAL_ERROR, HAL_OK, and hspi2.

Referenced by init_imup().

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◆ init_imuB()

int8_t init_imuB	(	stmdev_ctx_t *	imu,
		lsm6dso32_fs_xl_t	acc_full_scale,
		lsm6dso32_fs_g_t	gyro_full_scale,
		lsm6dso32_odr_xl_t	acc_output_data_rate,
		lsm6dso32_odr_g_t	gyro_output_data_rate
	)

Initializes the backup IMU (LSM6DSO32).

Configures the IMU with the specified full-scale ranges and output data rates. Performs a device ID check and reset.

Parameters

[in,out]	imu	Pointer to the stmdev_ctx_t driver context structure.
[in]	acc_full_scale	Desired accelerometer full-scale range.
[in]	gyro_full_scale	Desired gyroscope full-scale range.
[in]	acc_output_data_rate	Desired accelerometer output data rate (ODR).
[in]	gyro_output_data_rate	Desired gyroscope output data rate (ODR).

Returns: int8_t HAL_OK on successful initialization, HAL_ERROR otherwise.

Definition at line 665 of file utilities.c.

                                                                                                                                                                                          {
 
//  int8_t result = HAL_ERROR;
 
    uint8_t who_am_i = 0;
    uint8_t rst = 1;
    uint8_t result = 1;
 
    imu -> write_reg = imuB_write;
    imu -> read_reg = imuB_read;
    imu -> handle = &hspi3;
 
    HAL_Delay(10);  //FIXME here HAL_Delay used because this init is done during startup, so before kernel takes control of execution
 
    lsm6dso32_device_id_get(imu, &who_am_i);
 
    if (who_am_i != LSM6DSO32_ID) {
        return HAL_ERROR;
    }
 
    /* Restore default configuration */
    result = lsm6dso32_reset_set(imu, PROPERTY_ENABLE);
 
    /* Wait until the imu does not exit reset status */
    do {
        lsm6dso32_reset_get(imu, &rst);
    } while (rst);
 
    if (result != 0) {
        return HAL_ERROR;
    }
 
    /* Disable I3C interface */
    result = lsm6dso32_i3c_disable_set(imu, LSM6DSO32_I3C_DISABLE);
 
    if (result != 0) {
        return HAL_ERROR;
    }
 
    /* Enable Block Data Update, this means that registers
     * are not update until all the data have been read */
    result = lsm6dso32_block_data_update_set(imu, PROPERTY_ENABLE);
 
    if (result != 0) {
        return HAL_ERROR;
    }
 
    /* Set accelerometer and gyroscope full scale */
    lsm6dso32_xl_full_scale_set(imu, acc_full_scale);
    lsm6dso32_gy_full_scale_set(imu, gyro_full_scale);
 
    /* Set accelerometer and gyroscope output data rate ODR */
    lsm6dso32_xl_data_rate_set(imu, acc_output_data_rate);
    lsm6dso32_gy_data_rate_set(imu, gyro_output_data_rate);
 
    return HAL_OK;
}

References HAL_ERROR, HAL_OK, hspi3, imuB_read(), imuB_write(), lsm6dso32_block_data_update_set(), lsm6dso32_device_id_get(), lsm6dso32_gy_data_rate_set(), lsm6dso32_gy_full_scale_set(), LSM6DSO32_I3C_DISABLE, lsm6dso32_i3c_disable_set(), LSM6DSO32_ID, lsm6dso32_reset_get(), lsm6dso32_reset_set(), lsm6dso32_xl_data_rate_set(), lsm6dso32_xl_full_scale_set(), and PROPERTY_ENABLE.

Referenced by main().

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◆ init_imup()

int8_t init_imup	(	stmdev_ctx_t *	imu,
		lsm6dso32_fs_xl_t	acc_full_scale,
		lsm6dso32_fs_g_t	gyro_full_scale,
		lsm6dso32_odr_xl_t	acc_output_data_rate,
		lsm6dso32_odr_g_t	gyro_output_data_rate
	)

Initializes the primary IMU (LSM6DSO32).

Configures the IMU with the specified full-scale ranges and output data rates. Performs a device ID check and reset.

Parameters

[in,out]	imu	Pointer to the stmdev_ctx_t driver context structure.
[in]	acc_full_scale	Desired accelerometer full-scale range.
[in]	gyro_full_scale	Desired gyroscope full-scale range.
[in]	acc_output_data_rate	Desired accelerometer output data rate (ODR).
[in]	gyro_output_data_rate	Desired gyroscope output data rate (ODR).

Returns: int8_t HAL_OK on successful initialization, HAL_ERROR otherwise.

Definition at line 193 of file utilities.c.

                                                                                                                                                                                          {
 
 
 
    uint8_t who_am_i = 0;
    uint8_t rst = 1;
    uint8_t result = 1;
 
    imu -> write_reg = imuP_write;
    imu -> read_reg = imuP_read;
    imu -> handle = &hspi2;
 
    HAL_Delay(10);  //FIXME here HAL_Delay used because this init is done during startup, so before kernel takes control of execution
 
    lsm6dso32_device_id_get(imu, &who_am_i);
 
 
    if (who_am_i != LSM6DSO32_ID) {
        return HAL_ERROR;
    }
 
    /* Restore default configuration */
    result = lsm6dso32_reset_set(imu, PROPERTY_ENABLE);
 
    /* Wait until the imu does not exit reset status */
    do {
        lsm6dso32_reset_get(imu, &rst);
    } while (rst);
 
    if (result != 0) {
        return HAL_ERROR;
    }
 
    /* Disable I3C interface */
    result = lsm6dso32_i3c_disable_set(imu, LSM6DSO32_I3C_DISABLE);
 
    if (result != 0) {
        return HAL_ERROR;
    }
 
    /* Enable Block Data Update, this means that registers
     * are not update until all the data have been read */
    result = lsm6dso32_block_data_update_set(imu, PROPERTY_ENABLE);
 
    if (result != 0) {
        return HAL_ERROR;
    }
 
    /* Set accelerometer and gyroscope full scale */
    lsm6dso32_xl_full_scale_set(imu, acc_full_scale);
    lsm6dso32_gy_full_scale_set(imu, gyro_full_scale);
 
    /* Set accelerometer and gyroscope output data rate ODR */
    lsm6dso32_xl_data_rate_set(imu, acc_output_data_rate);
    lsm6dso32_gy_data_rate_set(imu, gyro_output_data_rate);
 
    return HAL_OK;
}

References HAL_ERROR, HAL_OK, hspi2, imuP_read(), imuP_write(), lsm6dso32_block_data_update_set(), lsm6dso32_device_id_get(), lsm6dso32_gy_data_rate_set(), lsm6dso32_gy_full_scale_set(), LSM6DSO32_I3C_DISABLE, lsm6dso32_i3c_disable_set(), LSM6DSO32_ID, lsm6dso32_reset_get(), lsm6dso32_reset_set(), lsm6dso32_xl_data_rate_set(), lsm6dso32_xl_full_scale_set(), and PROPERTY_ENABLE.

Referenced by main().

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◆ lsm6dso32_all_sources_get()

int32_t lsm6dso32_all_sources_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_all_sources_t *	val
	)

Read all the interrupt flag of the device.[get].

Parameters

ctx	read / write interface definitions
val	registers ALL_INT_SRC; WAKE_UP_SRC; TAP_SRC; D6D_SRC; STATUS_REG; EMB_FUNC_STATUS; FSM_STATUS_A/B

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 778 of file lsm6dso32_reg.c.

{
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_ALL_INT_SRC,
                           (uint8_t *)&val->all_int_src, 1);
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_WAKE_UP_SRC,
                             (uint8_t *)&val->wake_up_src, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_TAP_SRC,
                             (uint8_t *)&val->tap_src, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_D6D_SRC,
                             (uint8_t *)&val->d6d_src, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_STATUS_REG,
                             (uint8_t *)&val->status_reg, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_EMBEDDED_FUNC_BANK);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_EMB_FUNC_STATUS,
                             (uint8_t *)&val->emb_func_status, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FSM_STATUS_A,
                             (uint8_t *)&val->fsm_status_a, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FSM_STATUS_B,
                             (uint8_t *)&val->fsm_status_b, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_USER_BANK);
  }
 
  return ret;
}

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◆ lsm6dso32_block_data_update_get()

int32_t lsm6dso32_block_data_update_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

Block data update.[get].

Parameters

ctx	read / write interface definitions
val	change the values of bdu in reg CTRL3_C

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 695 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl3_c_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL3_C, (uint8_t *)&reg, 1);
  *val = reg.bdu;
 
  return ret;
}

References lsm6dso32_ctrl3_c_t::bdu, LSM6DSO32_CTRL3_C, and lsm6dso32_read_reg().

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◆ lsm6dso32_block_data_update_set()

int32_t lsm6dso32_block_data_update_set	(	stmdev_ctx_t *	ctx,
		uint8_t	val
	)

Block data update.[set].

Parameters

ctx	read / write interface definitions
val	change the values of bdu in reg CTRL3_C

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 670 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl3_c_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL3_C, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.bdu = val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_CTRL3_C, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References lsm6dso32_ctrl3_c_t::bdu, LSM6DSO32_CTRL3_C, lsm6dso32_read_reg(), and lsm6dso32_write_reg().

Referenced by init_imuB(), and init_imup().

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◆ lsm6dso32_gy_data_rate_get()

int32_t lsm6dso32_gy_data_rate_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_odr_g_t *	val
	)

Gyroscope UI data rate selection.[get].

Parameters

ctx	read / write interface definitions
val	Get the values of odr_g in reg CTRL2_G

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 574 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl2_g_t ctrl2_g;
  lsm6dso32_ctrl7_g_t ctrl7_g;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL7_G, (uint8_t *)&ctrl7_g, 1);
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL2_G, (uint8_t *)&ctrl2_g, 1);
  }
 
  switch ((ctrl7_g.g_hm_mode << 4) + ctrl2_g.odr_g)
  {
    case LSM6DSO32_GY_ODR_OFF:
      *val = LSM6DSO32_GY_ODR_OFF;
      break;
 
    case LSM6DSO32_GY_ODR_12Hz5_HIGH_PERF:
      *val = LSM6DSO32_GY_ODR_12Hz5_HIGH_PERF;
      break;
 
    case LSM6DSO32_GY_ODR_26Hz_HIGH_PERF:
      *val = LSM6DSO32_GY_ODR_26Hz_HIGH_PERF;
      break;
 
    case LSM6DSO32_GY_ODR_52Hz_HIGH_PERF:
      *val = LSM6DSO32_GY_ODR_52Hz_HIGH_PERF;
      break;
 
    case LSM6DSO32_GY_ODR_104Hz_HIGH_PERF:
      *val = LSM6DSO32_GY_ODR_104Hz_HIGH_PERF;
      break;
 
    case LSM6DSO32_GY_ODR_208Hz_HIGH_PERF:
      *val = LSM6DSO32_GY_ODR_208Hz_HIGH_PERF;
      break;
 
    case LSM6DSO32_GY_ODR_417Hz_HIGH_PERF:
      *val = LSM6DSO32_GY_ODR_417Hz_HIGH_PERF;
      break;
 
    case LSM6DSO32_GY_ODR_833Hz_HIGH_PERF:
      *val = LSM6DSO32_GY_ODR_833Hz_HIGH_PERF;
      break;
 
    case LSM6DSO32_GY_ODR_1667Hz_HIGH_PERF:
      *val = LSM6DSO32_GY_ODR_1667Hz_HIGH_PERF;
      break;
 
    case LSM6DSO32_GY_ODR_3333Hz_HIGH_PERF:
      *val = LSM6DSO32_GY_ODR_3333Hz_HIGH_PERF;
      break;
 
    case LSM6DSO32_GY_ODR_6667Hz_HIGH_PERF:
      *val = LSM6DSO32_GY_ODR_6667Hz_HIGH_PERF;
      break;
 
    case LSM6DSO32_GY_ODR_104Hz_NORMAL_MD:
      *val = LSM6DSO32_GY_ODR_104Hz_NORMAL_MD;
      break;
 
    case LSM6DSO32_GY_ODR_208Hz_NORMAL_MD:
      *val = LSM6DSO32_GY_ODR_208Hz_NORMAL_MD;
      break;
 
    case LSM6DSO32_GY_ODR_12Hz5_LOW_PW:
      *val = LSM6DSO32_GY_ODR_12Hz5_LOW_PW;
      break;
 
    case LSM6DSO32_GY_ODR_26Hz_LOW_PW:
      *val = LSM6DSO32_GY_ODR_26Hz_LOW_PW;
      break;
 
    case LSM6DSO32_GY_ODR_52Hz_LOW_PW:
      *val = LSM6DSO32_GY_ODR_52Hz_LOW_PW;
      break;
 
    default:
      *val = LSM6DSO32_GY_ODR_OFF;
      break;
  }
 
  return ret;
}

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◆ lsm6dso32_gy_data_rate_set()

int32_t lsm6dso32_gy_data_rate_set	(	stmdev_ctx_t *	ctx,
		lsm6dso32_odr_g_t	val
	)

Gyroscope UI data rate selection.[set].

Parameters

ctx	read / write interface definitions
val	change the values of odr_g in reg CTRL2_G

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 526 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl2_g_t ctrl2_g;
  lsm6dso32_ctrl7_g_t ctrl7_g;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL2_G, (uint8_t *)&ctrl2_g, 1);
 
  if (ret == 0)
  {
    ctrl2_g.odr_g = (uint8_t) LSM6DSO32_GY_ODR_OFF & 0x0FU;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_CTRL2_G, (uint8_t *)&ctrl2_g, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL7_G, (uint8_t *)&ctrl7_g, 1);
  }
 
  if (ret == 0)
  {
    ctrl7_g.g_hm_mode = ((uint8_t)val & 0x10U) >> 4;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_CTRL7_G, (uint8_t *)&ctrl7_g, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL2_G, (uint8_t *)&ctrl2_g, 1);
  }
 
  if (ret == 0)
  {
    ctrl2_g.odr_g = (uint8_t)val & 0x0FU;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_CTRL2_G, (uint8_t *)&ctrl2_g, 1);
  }
 
  return ret;
}

References lsm6dso32_ctrl7_g_t::g_hm_mode, LSM6DSO32_CTRL2_G, LSM6DSO32_CTRL7_G, LSM6DSO32_GY_ODR_OFF, lsm6dso32_read_reg(), lsm6dso32_write_reg(), and lsm6dso32_ctrl2_g_t::odr_g.

Referenced by init_imuB(), and init_imup().

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◆ lsm6dso32_gy_flag_data_ready_get()

int32_t lsm6dso32_gy_flag_data_ready_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

Gyroscope new data available.[get].

Parameters

ctx	read / write interface definitions
val	change the values of gda in reg STATUS_REG

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 887 of file lsm6dso32_reg.c.

{
  lsm6dso32_status_reg_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_STATUS_REG, (uint8_t *)&reg, 1);
  *val = reg.gda;
 
  return ret;
}

References lsm6dso32_status_reg_t::gda, lsm6dso32_read_reg(), and LSM6DSO32_STATUS_REG.

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◆ lsm6dso32_gy_full_scale_get()

int32_t lsm6dso32_gy_full_scale_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_fs_g_t *	val
	)

Gyroscope UI chain full-scale selection.[get].

Parameters

ctx	read / write interface definitions
val	Get the values of fs_g in reg CTRL2_G

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 480 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl2_g_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL2_G, (uint8_t *)&reg, 1);
 
  switch (reg.fs_g)
  {
    case LSM6DSO32_250dps:
      *val = LSM6DSO32_250dps;
      break;
 
    case LSM6DSO32_125dps:
      *val = LSM6DSO32_125dps;
      break;
 
    case LSM6DSO32_500dps:
      *val = LSM6DSO32_500dps;
      break;
 
    case LSM6DSO32_1000dps:
      *val = LSM6DSO32_1000dps;
      break;
 
    case LSM6DSO32_2000dps:
      *val = LSM6DSO32_2000dps;
      break;
 
    default:
      *val = LSM6DSO32_250dps;
      break;
  }
 
  return ret;
}

References lsm6dso32_ctrl2_g_t::fs_g, LSM6DSO32_1000dps, LSM6DSO32_125dps, LSM6DSO32_2000dps, LSM6DSO32_250dps, LSM6DSO32_500dps, LSM6DSO32_CTRL2_G, and lsm6dso32_read_reg().

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◆ lsm6dso32_gy_full_scale_set()

int32_t lsm6dso32_gy_full_scale_set	(	stmdev_ctx_t *	ctx,
		lsm6dso32_fs_g_t	val
	)

Gyroscope UI chain full-scale selection.[set].

Parameters

ctx	read / write interface definitions
val	change the values of fs_g in reg CTRL2_G

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 455 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl2_g_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL2_G, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.fs_g = (uint8_t) val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_CTRL2_G, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References lsm6dso32_ctrl2_g_t::fs_g, LSM6DSO32_CTRL2_G, lsm6dso32_read_reg(), and lsm6dso32_write_reg().

Referenced by init_imuB(), and init_imup().

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◆ lsm6dso32_i2c_interface_get()

int32_t lsm6dso32_i2c_interface_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_i2c_disable_t *	val
	)

Disable / Enable I2C interface.[get].

Parameters

ctx	read / write interface definitions
val	Get the values of i2c_disable in reg CTRL4_C

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 2910 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl4_c_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL4_C, (uint8_t *)&reg, 1);
 
  switch (reg.i2c_disable)
  {
    case LSM6DSO32_I2C_ENABLE:
      *val = LSM6DSO32_I2C_ENABLE;
      break;
 
    case LSM6DSO32_I2C_DISABLE:
      *val = LSM6DSO32_I2C_DISABLE;
      break;
 
    default:
      *val = LSM6DSO32_I2C_ENABLE;
      break;
  }
 
  return ret;
}

References lsm6dso32_ctrl4_c_t::i2c_disable, LSM6DSO32_CTRL4_C, LSM6DSO32_I2C_DISABLE, LSM6DSO32_I2C_ENABLE, and lsm6dso32_read_reg().

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◆ lsm6dso32_i2c_interface_set()

int32_t lsm6dso32_i2c_interface_set	(	stmdev_ctx_t *	ctx,
		lsm6dso32_i2c_disable_t	val
	)

Disable / Enable I2C interface.[set].

Parameters

ctx	read / write interface definitions
val	change the values of i2c_disable in reg CTRL4_C

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 2884 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl4_c_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL4_C, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.i2c_disable = (uint8_t)val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_CTRL4_C, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References lsm6dso32_ctrl4_c_t::i2c_disable, LSM6DSO32_CTRL4_C, lsm6dso32_read_reg(), and lsm6dso32_write_reg().

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◆ lsm6dso32_i3c_disable_get()

int32_t lsm6dso32_i3c_disable_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_i3c_disable_t *	val
	)

I3C Enable/Disable communication protocol.[get].

Parameters

ctx	read / write interface definitions
val	change the values of i3c_disable in reg CTRL9_XL

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 2985 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl9_xl_t ctrl9_xl;
  lsm6dso32_i3c_bus_avb_t i3c_bus_avb;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL9_XL,
                           (uint8_t *)&ctrl9_xl, 1);
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_I3C_BUS_AVB,
                             (uint8_t *)&i3c_bus_avb, 1);
 
    switch ((ctrl9_xl.i3c_disable << 7) | i3c_bus_avb.i3c_bus_avb_sel)
    {
      case LSM6DSO32_I3C_DISABLE:
        *val = LSM6DSO32_I3C_DISABLE;
        break;
 
      case LSM6DSO32_I3C_ENABLE_T_50us:
        *val = LSM6DSO32_I3C_ENABLE_T_50us;
        break;
 
      case LSM6DSO32_I3C_ENABLE_T_2us:
        *val = LSM6DSO32_I3C_ENABLE_T_2us;
        break;
 
      case LSM6DSO32_I3C_ENABLE_T_1ms:
        *val = LSM6DSO32_I3C_ENABLE_T_1ms;
        break;
 
      case LSM6DSO32_I3C_ENABLE_T_25ms:
        *val = LSM6DSO32_I3C_ENABLE_T_25ms;
        break;
 
      default:
        *val = LSM6DSO32_I3C_DISABLE;
        break;
    }
  }
 
  return ret;
}

References lsm6dso32_ctrl9_xl_t::i3c_disable, LSM6DSO32_CTRL9_XL, LSM6DSO32_I3C_BUS_AVB, LSM6DSO32_I3C_DISABLE, LSM6DSO32_I3C_ENABLE_T_1ms, LSM6DSO32_I3C_ENABLE_T_25ms, LSM6DSO32_I3C_ENABLE_T_2us, LSM6DSO32_I3C_ENABLE_T_50us, and lsm6dso32_read_reg().

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◆ lsm6dso32_i3c_disable_set()

int32_t lsm6dso32_i3c_disable_set	(	stmdev_ctx_t *	ctx,
		lsm6dso32_i3c_disable_t	val
	)

I3C Enable/Disable communication protocol[.set].

Parameters

ctx	read / write interface definitions
val	change the values of i3c_disable in reg CTRL9_XL

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 2944 of file lsm6dso32_reg.c.

{
  lsm6dso32_i3c_bus_avb_t i3c_bus_avb;
  lsm6dso32_ctrl9_xl_t ctrl9_xl;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL9_XL,
                           (uint8_t *)&ctrl9_xl, 1);
 
  if (ret == 0)
  {
    ctrl9_xl.i3c_disable = ((uint8_t)val & 0x80U) >> 7;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_CTRL9_XL,
                              (uint8_t *)&ctrl9_xl, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_I3C_BUS_AVB,
                             (uint8_t *)&i3c_bus_avb, 1);
  }
 
  if (ret == 0)
  {
    i3c_bus_avb.i3c_bus_avb_sel = (uint8_t)val & 0x03U;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_I3C_BUS_AVB,
                              (uint8_t *)&i3c_bus_avb, 1);
  }
 
  return ret;
}

References lsm6dso32_i3c_bus_avb_t::i3c_bus_avb_sel, lsm6dso32_ctrl9_xl_t::i3c_disable, LSM6DSO32_CTRL9_XL, LSM6DSO32_I3C_BUS_AVB, lsm6dso32_read_reg(), and lsm6dso32_write_reg().

Referenced by init_imuB(), and init_imup().

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◆ lsm6dso32_sdo_sa0_mode_get()

int32_t lsm6dso32_sdo_sa0_mode_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_sdo_pu_en_t *	val
	)

Connect/Disconnect SDO/SA0 internal pull-up.[get].

Parameters

ctx	read / write interface definitions
val	Get the values of sdo_pu_en in reg PIN_CTRL

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 2791 of file lsm6dso32_reg.c.

{
  lsm6dso32_pin_ctrl_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_PIN_CTRL, (uint8_t *)&reg, 1);
 
  switch (reg.sdo_pu_en)
  {
    case LSM6DSO32_PULL_UP_DISC:
      *val = LSM6DSO32_PULL_UP_DISC;
      break;
 
    case LSM6DSO32_PULL_UP_CONNECT:
      *val = LSM6DSO32_PULL_UP_CONNECT;
      break;
 
    default:
      *val = LSM6DSO32_PULL_UP_DISC;
      break;
  }
 
  return ret;
}

References LSM6DSO32_PIN_CTRL, LSM6DSO32_PULL_UP_CONNECT, LSM6DSO32_PULL_UP_DISC, lsm6dso32_read_reg(), and lsm6dso32_pin_ctrl_t::sdo_pu_en.

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◆ lsm6dso32_sdo_sa0_mode_set()

int32_t lsm6dso32_sdo_sa0_mode_set	(	stmdev_ctx_t *	ctx,
		lsm6dso32_sdo_pu_en_t	val
	)

Connect/Disconnect SDO/SA0 internal pull-up.[set].

Parameters

ctx	read / write interface definitions
val	change the values of sdo_pu_en in reg PIN_CTRL

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 2766 of file lsm6dso32_reg.c.

{
  lsm6dso32_pin_ctrl_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_PIN_CTRL, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.sdo_pu_en = (uint8_t)val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_PIN_CTRL, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References LSM6DSO32_PIN_CTRL, lsm6dso32_read_reg(), lsm6dso32_write_reg(), and lsm6dso32_pin_ctrl_t::sdo_pu_en.

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◆ lsm6dso32_spi_mode_get()

int32_t lsm6dso32_spi_mode_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_sim_t *	val
	)

SPI Serial Interface Mode selection.[get].

Parameters

ctx	read / write interface definitions
val	Get the values of sim in reg CTRL3_C

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 2849 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl3_c_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL3_C, (uint8_t *)&reg, 1);
 
  switch (reg.sim)
  {
    case LSM6DSO32_SPI_4_WIRE:
      *val = LSM6DSO32_SPI_4_WIRE;
      break;
 
    case LSM6DSO32_SPI_3_WIRE:
      *val = LSM6DSO32_SPI_3_WIRE;
      break;
 
    default:
      *val = LSM6DSO32_SPI_4_WIRE;
      break;
  }
 
  return ret;
}

References LSM6DSO32_CTRL3_C, lsm6dso32_read_reg(), LSM6DSO32_SPI_3_WIRE, LSM6DSO32_SPI_4_WIRE, and lsm6dso32_ctrl3_c_t::sim.

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◆ lsm6dso32_spi_mode_set()

int32_t lsm6dso32_spi_mode_set	(	stmdev_ctx_t *	ctx,
		lsm6dso32_sim_t	val
	)

SPI Serial Interface Mode selection.[set].

Parameters

ctx	read / write interface definitions
val	change the values of sim in reg CTRL3_C

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 2825 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl3_c_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL3_C, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.sim = (uint8_t)val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_CTRL3_C, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References LSM6DSO32_CTRL3_C, lsm6dso32_read_reg(), lsm6dso32_write_reg(), and lsm6dso32_ctrl3_c_t::sim.

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◆ lsm6dso32_status_reg_get()

int32_t lsm6dso32_status_reg_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_status_reg_t *	val
	)

The STATUS_REG register is read by the primary interface.[get].

Parameters

ctx	read / write interface definitions
val	register STATUS_REG

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 849 of file lsm6dso32_reg.c.

{
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_STATUS_REG, (uint8_t *) val, 1);
 
  return ret;
}

References lsm6dso32_read_reg(), and LSM6DSO32_STATUS_REG.

Referenced by calibrateIMU().

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◆ lsm6dso32_temp_flag_data_ready_get()

int32_t lsm6dso32_temp_flag_data_ready_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

Temperature new data available.[get].

Parameters

ctx	read / write interface definitions
val	change the values of tda in reg STATUS_REG

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 907 of file lsm6dso32_reg.c.

{
  lsm6dso32_status_reg_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_STATUS_REG, (uint8_t *)&reg, 1);
  *val = reg.tda;
 
  return ret;
}

References lsm6dso32_read_reg(), LSM6DSO32_STATUS_REG, and lsm6dso32_status_reg_t::tda.

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◆ lsm6dso32_xl_data_rate_get()

int32_t lsm6dso32_xl_data_rate_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_odr_xl_t *	val
	)

Accelerometer UI data rate selection.[get].

Parameters

ctx	read / write interface definitions
val	Get the data rate and the power mode of the accelerometer

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 316 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl1_xl_t ctrl1_xl;
  lsm6dso32_ctrl5_c_t ctrl5_c;
  lsm6dso32_ctrl6_c_t ctrl6_c;
  lsm6dso32_func_cfg_access_t func_cfg_access;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL1_XL,
                           (uint8_t *)&ctrl1_xl, 1);
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FUNC_CFG_ACCESS,
                             (uint8_t *)&func_cfg_access, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL5_C, (uint8_t *) &ctrl5_c, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL6_C, (uint8_t *) &ctrl6_c, 1);
  }
 
  switch ((ctrl5_c.xl_ulp_en << 5) + (ctrl6_c.xl_hm_mode << 4) +
          ctrl1_xl.odr_xl)
  {
    case LSM6DSO32_XL_ODR_OFF:
      *val = LSM6DSO32_XL_ODR_OFF;
      break;
 
    case LSM6DSO32_XL_ODR_6Hz5_LOW_PW:
      *val = LSM6DSO32_XL_ODR_6Hz5_LOW_PW;
      break;
 
    case LSM6DSO32_XL_ODR_12Hz5_LOW_PW:
      *val = LSM6DSO32_XL_ODR_12Hz5_LOW_PW;
      break;
 
    case LSM6DSO32_XL_ODR_26Hz_LOW_PW:
      *val = LSM6DSO32_XL_ODR_26Hz_LOW_PW;
      break;
 
    case LSM6DSO32_XL_ODR_52Hz_LOW_PW:
      *val = LSM6DSO32_XL_ODR_52Hz_LOW_PW;
      break;
 
    case LSM6DSO32_XL_ODR_104Hz_NORMAL_MD:
      *val = LSM6DSO32_XL_ODR_104Hz_NORMAL_MD;
      break;
 
    case LSM6DSO32_XL_ODR_208Hz_NORMAL_MD:
      *val = LSM6DSO32_XL_ODR_208Hz_NORMAL_MD;
      break;
 
    case LSM6DSO32_XL_ODR_12Hz5_HIGH_PERF:
      *val = LSM6DSO32_XL_ODR_12Hz5_HIGH_PERF;
      break;
 
    case LSM6DSO32_XL_ODR_26Hz_HIGH_PERF:
      *val = LSM6DSO32_XL_ODR_26Hz_HIGH_PERF;
      break;
 
    case LSM6DSO32_XL_ODR_52Hz_HIGH_PERF:
      *val = LSM6DSO32_XL_ODR_52Hz_HIGH_PERF;
      break;
 
    case LSM6DSO32_XL_ODR_104Hz_HIGH_PERF:
      *val = LSM6DSO32_XL_ODR_104Hz_HIGH_PERF;
      break;
 
    case LSM6DSO32_XL_ODR_208Hz_HIGH_PERF:
      *val = LSM6DSO32_XL_ODR_208Hz_HIGH_PERF;
      break;
 
    case LSM6DSO32_XL_ODR_417Hz_HIGH_PERF:
      *val = LSM6DSO32_XL_ODR_417Hz_HIGH_PERF;
      break;
 
    case LSM6DSO32_XL_ODR_833Hz_HIGH_PERF:
      *val = LSM6DSO32_XL_ODR_833Hz_HIGH_PERF;
      break;
 
    case LSM6DSO32_XL_ODR_1667Hz_HIGH_PERF:
      *val = LSM6DSO32_XL_ODR_1667Hz_HIGH_PERF;
      break;
 
    case LSM6DSO32_XL_ODR_3333Hz_HIGH_PERF:
      *val = LSM6DSO32_XL_ODR_3333Hz_HIGH_PERF;
      break;
 
    case LSM6DSO32_XL_ODR_6667Hz_HIGH_PERF:
      *val = LSM6DSO32_XL_ODR_6667Hz_HIGH_PERF;
      break;
 
    case LSM6DSO32_XL_ODR_6Hz5_ULTRA_LOW_PW:
      *val = LSM6DSO32_XL_ODR_6Hz5_ULTRA_LOW_PW;
      break;
 
    case LSM6DSO32_XL_ODR_12Hz5_ULTRA_LOW_PW:
      *val = LSM6DSO32_XL_ODR_12Hz5_ULTRA_LOW_PW;
      break;
 
    case LSM6DSO32_XL_ODR_26Hz_ULTRA_LOW_PW:
      *val = LSM6DSO32_XL_ODR_26Hz_ULTRA_LOW_PW;
      break;
 
    case LSM6DSO32_XL_ODR_52Hz_ULTRA_LOW_PW:
      *val = LSM6DSO32_XL_ODR_52Hz_ULTRA_LOW_PW;
      break;
 
    case LSM6DSO32_XL_ODR_104Hz_ULTRA_LOW_PW:
      *val = LSM6DSO32_XL_ODR_104Hz_ULTRA_LOW_PW;
      break;
 
    case LSM6DSO32_XL_ODR_208Hz_ULTRA_LOW_PW:
      *val = LSM6DSO32_XL_ODR_208Hz_ULTRA_LOW_PW;
      break;
 
    default:
      *val = LSM6DSO32_XL_ODR_OFF;
      break;
  }
 
  return ret;
}

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◆ lsm6dso32_xl_data_rate_set()

int32_t lsm6dso32_xl_data_rate_set	(	stmdev_ctx_t *	ctx,
		lsm6dso32_odr_xl_t	val
	)

Accelerometer UI data rate and power mode selection.[set].

Parameters

ctx	read / write interface definitions
val	Change the data rate and the power mode of the accelerometer

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 242 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl1_xl_t ctrl1_xl;
  lsm6dso32_ctrl5_c_t ctrl5_c;
  lsm6dso32_ctrl6_c_t ctrl6_c;
  lsm6dso32_func_cfg_access_t func_cfg_access;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL1_XL,
                           (uint8_t *)&ctrl1_xl, 1);
 
  if (ret == 0)
  {
    ctrl1_xl.odr_xl = (uint8_t) LSM6DSO32_XL_ODR_OFF & 0x0FU;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_CTRL1_XL,
                              (uint8_t *)&ctrl1_xl, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FUNC_CFG_ACCESS,
                             (uint8_t *)&func_cfg_access, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL5_C, (uint8_t *) &ctrl5_c, 1);
  }
 
  if (ret == 0)
  {
    ctrl5_c.xl_ulp_en = ((uint8_t)val & 0x20U) >> 5;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_CTRL5_C,
                              (uint8_t *) &ctrl5_c, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL6_C, (uint8_t *) &ctrl6_c, 1);
  }
 
  if (ret == 0)
  {
    ctrl6_c.xl_hm_mode = ((uint8_t)val & 0x10U) >> 4;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_CTRL6_C,
                              (uint8_t *) &ctrl6_c, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL1_XL,
                             (uint8_t *)&ctrl1_xl, 1);
  }
 
  if (ret == 0)
  {
    ctrl1_xl.odr_xl = (uint8_t) val & 0x0FU;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_CTRL1_XL,
                              (uint8_t *)&ctrl1_xl, 1);
  }
 
  return ret;
}

References LSM6DSO32_CTRL1_XL, LSM6DSO32_CTRL5_C, LSM6DSO32_CTRL6_C, LSM6DSO32_FUNC_CFG_ACCESS, lsm6dso32_read_reg(), lsm6dso32_write_reg(), LSM6DSO32_XL_ODR_OFF, lsm6dso32_ctrl1_xl_t::odr_xl, lsm6dso32_ctrl6_c_t::xl_hm_mode, and lsm6dso32_ctrl5_c_t::xl_ulp_en.

Referenced by init_imuB(), and init_imup().

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◆ lsm6dso32_xl_flag_data_ready_get()

int32_t lsm6dso32_xl_flag_data_ready_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

Accelerometer new data available.[get].

Parameters

ctx	read / write interface definitions
val	change the values of xlda in reg STATUS_REG

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 867 of file lsm6dso32_reg.c.

{
  lsm6dso32_status_reg_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_STATUS_REG, (uint8_t *)&reg, 1);
  *val = reg.xlda;
 
  return ret;
}

References lsm6dso32_read_reg(), LSM6DSO32_STATUS_REG, and lsm6dso32_status_reg_t::xlda.

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◆ lsm6dso32_xl_full_scale_get()

int32_t lsm6dso32_xl_full_scale_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_fs_xl_t *	val
	)

Accelerometer full-scale selection.[get].

Parameters

ctx	read / write interface definitions
val	Get the values of fs_xl in reg CTRL1_XL

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 199 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl1_xl_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL1_XL, (uint8_t *)&reg, 1);
 
  switch (reg.fs_xl)
  {
    case LSM6DSO32_4g:
      *val = LSM6DSO32_4g;
      break;
 
    case LSM6DSO32_8g:
      *val = LSM6DSO32_8g;
      break;
 
    case LSM6DSO32_16g:
      *val = LSM6DSO32_16g;
      break;
 
    case LSM6DSO32_32g:
      *val = LSM6DSO32_32g;
      break;
 
    default:
      *val = LSM6DSO32_4g;
      break;
  }
 
  return ret;
}

References lsm6dso32_ctrl1_xl_t::fs_xl, LSM6DSO32_16g, LSM6DSO32_32g, LSM6DSO32_4g, LSM6DSO32_8g, LSM6DSO32_CTRL1_XL, and lsm6dso32_read_reg().

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◆ lsm6dso32_xl_full_scale_set()

int32_t lsm6dso32_xl_full_scale_set	(	stmdev_ctx_t *	ctx,
		lsm6dso32_fs_xl_t	val
	)

Accelerometer full-scale selection.[set].

Parameters

ctx	read / write interface definitions
val	change the values of fs_xl in reg CTRL1_XL

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 172 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl1_xl_t ctrl1_xl;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL1_XL,
                           (uint8_t *)&ctrl1_xl, 1);
 
  if (ret == 0)
  {
    ctrl1_xl.fs_xl = (uint8_t) val & 0x03U;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_CTRL1_XL,
                              (uint8_t *)&ctrl1_xl, 1);
  }
 
  return ret;
}

References lsm6dso32_ctrl1_xl_t::fs_xl, LSM6DSO32_CTRL1_XL, lsm6dso32_read_reg(), and lsm6dso32_write_reg().

Referenced by init_imuB(), and init_imup().

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◆ lsm6dso32_xl_offset_weight_get()

int32_t lsm6dso32_xl_offset_weight_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_usr_off_w_t *	val
	)

Weight of XL user offset bits of registers X_OFS_USR (73h), Y_OFS_USR (74h), Z_OFS_USR (75h).[get].

Parameters

ctx	read / write interface definitions
val	Get the values of usr_off_w in reg CTRL6_C

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 742 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl6_c_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL6_C, (uint8_t *)&reg, 1);
 
  switch (reg.usr_off_w)
  {
    case LSM6DSO32_LSb_1mg:
      *val = LSM6DSO32_LSb_1mg;
      break;
 
    case LSM6DSO32_LSb_16mg:
      *val = LSM6DSO32_LSb_16mg;
      break;
 
    default:
      *val = LSM6DSO32_LSb_1mg;
      break;
  }
 
  return ret;
}

References LSM6DSO32_CTRL6_C, LSM6DSO32_LSb_16mg, LSM6DSO32_LSb_1mg, lsm6dso32_read_reg(), and lsm6dso32_ctrl6_c_t::usr_off_w.

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◆ lsm6dso32_xl_offset_weight_set()

int32_t lsm6dso32_xl_offset_weight_set	(	stmdev_ctx_t *	ctx,
		lsm6dso32_usr_off_w_t	val
	)

Weight of XL user offset bits of registers X_OFS_USR (73h), Y_OFS_USR (74h), Z_OFS_USR (75h).[set].

Parameters

ctx	read / write interface definitions
val	change the values of usr_off_w in reg CTRL6_C

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 716 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl6_c_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL6_C, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.usr_off_w = (uint8_t)val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_CTRL6_C, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References LSM6DSO32_CTRL6_C, lsm6dso32_read_reg(), lsm6dso32_write_reg(), and lsm6dso32_ctrl6_c_t::usr_off_w.

Referenced by calibrateIMU().

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◆ lsm6dso32_xl_usr_offset_get()

int32_t lsm6dso32_xl_usr_offset_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

User offset on out flag.[get].

Parameters

ctx	read / write interface definitions
val	values of usr_off_on_out in reg CTRL7_G

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 1071 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl7_g_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL7_G, (uint8_t *)&reg, 1);
  *val = reg.usr_off_on_out;
 
  return ret;
}

References LSM6DSO32_CTRL7_G, lsm6dso32_read_reg(), and lsm6dso32_ctrl7_g_t::usr_off_on_out.

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◆ lsm6dso32_xl_usr_offset_set()

int32_t lsm6dso32_xl_usr_offset_set	(	stmdev_ctx_t *	ctx,
		uint8_t	val
	)

Enables user offset on out.[set].

Parameters

ctx	read / write interface definitions
val	change the values of usr_off_on_out in reg CTRL7_G

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 1047 of file lsm6dso32_reg.c.

{
  lsm6dso32_ctrl7_g_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_CTRL7_G, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.usr_off_on_out = val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_CTRL7_G, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References LSM6DSO32_CTRL7_G, lsm6dso32_read_reg(), lsm6dso32_write_reg(), and lsm6dso32_ctrl7_g_t::usr_off_on_out.

Referenced by calibrateIMU().

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◆ lsm6dso32_xl_usr_offset_x_get()

int32_t lsm6dso32_xl_usr_offset_x_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	buff
	)

Accelerometer X-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_W in CTRL6_C (15h). The value must be in the range [-127 127].[get].

Parameters

ctx	read / write interface definitions
buff	buffer that stores data read

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 949 of file lsm6dso32_reg.c.

{
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_X_OFS_USR, buff, 1);
 
  return ret;
}

References lsm6dso32_read_reg(), and LSM6DSO32_X_OFS_USR.

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◆ lsm6dso32_xl_usr_offset_x_set()

int32_t lsm6dso32_xl_usr_offset_x_set	(	stmdev_ctx_t *	ctx,
		uint8_t *	buff
	)

Accelerometer X-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_W in CTRL6_C (15h). The value must be in the range [-127 127].[set].

Parameters

ctx	read / write interface definitions
buff	buffer that contains data to write

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 929 of file lsm6dso32_reg.c.

{
  int32_t ret;
 
  ret = lsm6dso32_write_reg(ctx, LSM6DSO32_X_OFS_USR, buff, 1);
 
  return ret;
}

References lsm6dso32_write_reg(), and LSM6DSO32_X_OFS_USR.

Referenced by calibrateIMU().

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◆ lsm6dso32_xl_usr_offset_y_get()

int32_t lsm6dso32_xl_usr_offset_y_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	buff
	)

Accelerometer Y-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_W in CTRL6_C (15h). The value must be in the range [-127 127].[get].

Parameters

ctx	read / write interface definitions
buff	buffer that stores data read

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 989 of file lsm6dso32_reg.c.

{
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_Y_OFS_USR, buff, 1);
 
  return ret;
}

References lsm6dso32_read_reg(), and LSM6DSO32_Y_OFS_USR.

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◆ lsm6dso32_xl_usr_offset_y_set()

int32_t lsm6dso32_xl_usr_offset_y_set	(	stmdev_ctx_t *	ctx,
		uint8_t *	buff
	)

Accelerometer Y-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_W in CTRL6_C (15h). The value must be in the range [-127 127].[set].

Parameters

ctx	read / write interface definitions
buff	buffer that contains data to write

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 969 of file lsm6dso32_reg.c.

{
  int32_t ret;
 
  ret = lsm6dso32_write_reg(ctx, LSM6DSO32_Y_OFS_USR, buff, 1);
 
  return ret;
}

References lsm6dso32_write_reg(), and LSM6DSO32_Y_OFS_USR.

Referenced by calibrateIMU().

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◆ lsm6dso32_xl_usr_offset_z_get()

int32_t lsm6dso32_xl_usr_offset_z_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	buff
	)

Accelerometer Z-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_W in CTRL6_C (15h). The value must be in the range [-127 127].[get].

Parameters

ctx	read / write interface definitions
buff	buffer that stores data read

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 1029 of file lsm6dso32_reg.c.

{
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_Z_OFS_USR, buff, 1);
 
  return ret;
}

References lsm6dso32_read_reg(), and LSM6DSO32_Z_OFS_USR.

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◆ lsm6dso32_xl_usr_offset_z_set()

int32_t lsm6dso32_xl_usr_offset_z_set	(	stmdev_ctx_t *	ctx,
		uint8_t *	buff
	)

Accelerometer Z-axis user offset correction expressed in two’s complement, weight depends on USR_OFF_W in CTRL6_C (15h). The value must be in the range [-127 127].[set].

Parameters

ctx	read / write interface definitions
buff	buffer that contains data to write

Return values

interface status (MANDATORY: return 0 -> no Error)

Definition at line 1009 of file lsm6dso32_reg.c.

{
  int32_t ret;
 
  ret = lsm6dso32_write_reg(ctx, LSM6DSO32_Z_OFS_USR, buff, 1);
 
  return ret;
}

References lsm6dso32_write_reg(), and LSM6DSO32_Z_OFS_USR.

Referenced by calibrateIMU().

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Modules

Enumerations

Functions

Detailed Description

Enumeration Type Documentation

◆ OFFSET_TYPE

Function Documentation

◆ calibrateIMU()

◆ imuB_read()

◆ imuB_write()

◆ imuP_read()

◆ imuP_read_2()

◆ imuP_write()

◆ init_imuB()

◆ init_imup()

◆ lsm6dso32_all_sources_get()

◆ lsm6dso32_block_data_update_get()

◆ lsm6dso32_block_data_update_set()

◆ lsm6dso32_gy_data_rate_get()

◆ lsm6dso32_gy_data_rate_set()

◆ lsm6dso32_gy_flag_data_ready_get()

◆ lsm6dso32_gy_full_scale_get()

◆ lsm6dso32_gy_full_scale_set()

◆ lsm6dso32_i2c_interface_get()

◆ lsm6dso32_i2c_interface_set()

◆ lsm6dso32_i3c_disable_get()

◆ lsm6dso32_i3c_disable_set()

◆ lsm6dso32_sdo_sa0_mode_get()

◆ lsm6dso32_sdo_sa0_mode_set()

◆ lsm6dso32_spi_mode_get()

◆ lsm6dso32_spi_mode_set()

◆ lsm6dso32_status_reg_get()

◆ lsm6dso32_temp_flag_data_ready_get()

◆ lsm6dso32_xl_data_rate_get()

◆ lsm6dso32_xl_data_rate_set()

◆ lsm6dso32_xl_flag_data_ready_get()

◆ lsm6dso32_xl_full_scale_get()

◆ lsm6dso32_xl_full_scale_set()

◆ lsm6dso32_xl_offset_weight_get()

◆ lsm6dso32_xl_offset_weight_set()

◆ lsm6dso32_xl_usr_offset_get()

◆ lsm6dso32_xl_usr_offset_set()

◆ lsm6dso32_xl_usr_offset_x_get()

◆ lsm6dso32_xl_usr_offset_x_set()

◆ lsm6dso32_xl_usr_offset_y_get()

◆ lsm6dso32_xl_usr_offset_y_set()

◆ lsm6dso32_xl_usr_offset_z_get()

◆ lsm6dso32_xl_usr_offset_z_set()