LSM6DSO32_tap_generator

This section groups all the functions that manage the tap and double tap event generation. More...

Collaboration diagram for LSM6DSO32_tap_generator:

Functions
int32_t	lsm6dso32_tap_detection_on_z_set (stmdev_ctx_t *ctx, uint8_t val)
	Enable Z direction in tap recognition.[set].
int32_t	lsm6dso32_tap_detection_on_z_get (stmdev_ctx_t *ctx, uint8_t *val)
	Enable Z direction in tap recognition.[get].
int32_t	lsm6dso32_tap_detection_on_y_set (stmdev_ctx_t *ctx, uint8_t val)
	Enable Y direction in tap recognition.[set].
int32_t	lsm6dso32_tap_detection_on_y_get (stmdev_ctx_t *ctx, uint8_t *val)
	Enable Y direction in tap recognition.[get].
int32_t	lsm6dso32_tap_detection_on_x_set (stmdev_ctx_t *ctx, uint8_t val)
	Enable X direction in tap recognition.[set].
int32_t	lsm6dso32_tap_detection_on_x_get (stmdev_ctx_t *ctx, uint8_t *val)
	Enable X direction in tap recognition.[get].
int32_t	lsm6dso32_tap_threshold_x_set (stmdev_ctx_t *ctx, uint8_t val)
	X-axis tap recognition threshold.[set].
int32_t	lsm6dso32_tap_threshold_x_get (stmdev_ctx_t *ctx, uint8_t *val)
	X-axis tap recognition threshold.[get].
int32_t	lsm6dso32_tap_axis_priority_set (stmdev_ctx_t *ctx, lsm6dso32_tap_priority_t val)
	Selection of axis priority for TAP detection.[set].
int32_t	lsm6dso32_tap_axis_priority_get (stmdev_ctx_t *ctx, lsm6dso32_tap_priority_t *val)
	Selection of axis priority for TAP detection.[get].
int32_t	lsm6dso32_tap_threshold_y_set (stmdev_ctx_t *ctx, uint8_t val)
	Y-axis tap recognition threshold.[set].
int32_t	lsm6dso32_tap_threshold_y_get (stmdev_ctx_t *ctx, uint8_t *val)
	Y-axis tap recognition threshold.[get].
int32_t	lsm6dso32_tap_threshold_z_set (stmdev_ctx_t *ctx, uint8_t val)
	Z-axis recognition threshold.[set].
int32_t	lsm6dso32_tap_threshold_z_get (stmdev_ctx_t *ctx, uint8_t *val)
	Z-axis recognition threshold.[get].
int32_t	lsm6dso32_tap_shock_set (stmdev_ctx_t *ctx, uint8_t val)
	Maximum duration is the maximum time of an over threshold signal detection to be recognized as a tap event. The default value of these bits is 00b which corresponds to 4*ODR_XL time. If the SHOCK[1:0] bits are set to a different value, 1LSB corresponds to 8*ODR_XL time.[set].
int32_t	lsm6dso32_tap_shock_get (stmdev_ctx_t *ctx, uint8_t *val)
	Maximum duration is the maximum time of an over threshold signal detection to be recognized as a tap event. The default value of these bits is 00b which corresponds to 4*ODR_XL time. If the SHOCK[1:0] bits are set to a different value, 1LSB corresponds to 8*ODR_XL time.[get].
int32_t	lsm6dso32_tap_quiet_set (stmdev_ctx_t *ctx, uint8_t val)
	Quiet time is the time after the first detected tap in which there must not be any over threshold event. The default value of these bits is 00b which corresponds to 2*ODR_XL time. If the QUIET[1:0] bits are set to a different value, 1LSB corresponds to 4*ODR_XL time.[set].
int32_t	lsm6dso32_tap_quiet_get (stmdev_ctx_t *ctx, uint8_t *val)
	Quiet time is the time after the first detected tap in which there must not be any over threshold event. The default value of these bits is 00b which corresponds to 2*ODR_XL time. If the QUIET[1:0] bits are set to a different value, 1LSB corresponds to 4*ODR_XL time.[get].
int32_t	lsm6dso32_tap_dur_set (stmdev_ctx_t *ctx, uint8_t val)
	When double tap recognition is enabled, this register expresses the maximum time between two consecutive detected taps to determine a double tap event. The default value of these bits is 0000b which corresponds to 16*ODR_XL time. If the DUR[3:0] bits are set to a different value, 1LSB corresponds to 32*ODR_XL time.[set].
int32_t	lsm6dso32_tap_dur_get (stmdev_ctx_t *ctx, uint8_t *val)
	When double tap recognition is enabled, this register expresses the maximum time between two consecutive detected taps to determine a double tap event. The default value of these bits is 0000b which corresponds to 16*ODR_XL time. If the DUR[3:0] bits are set to a different value, 1LSB corresponds to 32*ODR_XL time.[get].
int32_t	lsm6dso32_tap_mode_set (stmdev_ctx_t *ctx, lsm6dso32_single_double_tap_t val)
	Single/double-tap event enable.[set].
int32_t	lsm6dso32_tap_mode_get (stmdev_ctx_t *ctx, lsm6dso32_single_double_tap_t *val)
	Single/double-tap event enable.[get].

Detailed Description

This section groups all the functions that manage the tap and double tap event generation.

Function Documentation

lsm6dso32_tap_axis_priority_get()

int32_t lsm6dso32_tap_axis_priority_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_tap_priority_t *	val
	)

Selection of axis priority for TAP detection.[get].

Parameters

ctx	read / write interface definitions
val	Get the values of tap_priority in reg TAP_CFG1

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 4449 of file lsm6dso32_reg.c.

{
  lsm6dso32_tap_cfg1_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_TAP_CFG1, (uint8_t *)&reg, 1);
 
  switch (reg.tap_priority)
  {
    case LSM6DSO32_XYZ:
      *val = LSM6DSO32_XYZ;
      break;
 
    case LSM6DSO32_YXZ:
      *val = LSM6DSO32_YXZ;
      break;
 
    case LSM6DSO32_XZY:
      *val = LSM6DSO32_XZY;
      break;
 
    case LSM6DSO32_ZYX:
      *val = LSM6DSO32_ZYX;
      break;
 
    case LSM6DSO32_YZX:
      *val = LSM6DSO32_YZX;
      break;
 
    case LSM6DSO32_ZXY:
      *val = LSM6DSO32_ZXY;
      break;
 
    default:
      *val = LSM6DSO32_XYZ;
      break;
  }
 
  return ret;
}

References lsm6dso32_read_reg(), LSM6DSO32_TAP_CFG1, LSM6DSO32_XYZ, LSM6DSO32_XZY, LSM6DSO32_YXZ, LSM6DSO32_YZX, LSM6DSO32_ZXY, LSM6DSO32_ZYX, and lsm6dso32_tap_cfg1_t::tap_priority.

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lsm6dso32_tap_axis_priority_set()

int32_t lsm6dso32_tap_axis_priority_set	(	stmdev_ctx_t *	ctx,
		lsm6dso32_tap_priority_t	val
	)

Selection of axis priority for TAP detection.[set].

Parameters

ctx	read / write interface definitions
val	change the values of tap_priority in reg TAP_CFG1

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 4424 of file lsm6dso32_reg.c.

{
  lsm6dso32_tap_cfg1_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_TAP_CFG1, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.tap_priority = (uint8_t)val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_TAP_CFG1, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References lsm6dso32_read_reg(), LSM6DSO32_TAP_CFG1, lsm6dso32_write_reg(), and lsm6dso32_tap_cfg1_t::tap_priority.

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lsm6dso32_tap_detection_on_x_get()

int32_t lsm6dso32_tap_detection_on_x_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

Enable X direction in tap recognition.[get].

Parameters

ctx	read / write interface definitions
val	change the values of tap_x_en in reg TAP_CFG0

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 4361 of file lsm6dso32_reg.c.

{
  lsm6dso32_tap_cfg0_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_TAP_CFG0, (uint8_t *)&reg, 1);
  *val = reg.tap_x_en;
 
  return ret;
}

References lsm6dso32_read_reg(), LSM6DSO32_TAP_CFG0, and lsm6dso32_tap_cfg0_t::tap_x_en.

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lsm6dso32_tap_detection_on_x_set()

int32_t lsm6dso32_tap_detection_on_x_set	(	stmdev_ctx_t *	ctx,
		uint8_t	val
	)

Enable X direction in tap recognition.[set].

Parameters

ctx	read / write interface definitions
val	change the values of tap_x_en in reg TAP_CFG0

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 4336 of file lsm6dso32_reg.c.

{
  lsm6dso32_tap_cfg0_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_TAP_CFG0, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.tap_x_en = val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_TAP_CFG0, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References lsm6dso32_read_reg(), LSM6DSO32_TAP_CFG0, lsm6dso32_write_reg(), and lsm6dso32_tap_cfg0_t::tap_x_en.

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lsm6dso32_tap_detection_on_y_get()

int32_t lsm6dso32_tap_detection_on_y_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

Enable Y direction in tap recognition.[get].

Parameters

ctx	read / write interface definitions
val	change the values of tap_y_en in reg TAP_CFG0

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 4316 of file lsm6dso32_reg.c.

{
  lsm6dso32_tap_cfg0_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_TAP_CFG0, (uint8_t *)&reg, 1);
  *val = reg.tap_y_en;
 
  return ret;
}

References lsm6dso32_read_reg(), LSM6DSO32_TAP_CFG0, and lsm6dso32_tap_cfg0_t::tap_y_en.

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lsm6dso32_tap_detection_on_y_set()

int32_t lsm6dso32_tap_detection_on_y_set	(	stmdev_ctx_t *	ctx,
		uint8_t	val
	)

Enable Y direction in tap recognition.[set].

Parameters

ctx	read / write interface definitions
val	change the values of tap_y_en in reg TAP_CFG0

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 4291 of file lsm6dso32_reg.c.

{
  lsm6dso32_tap_cfg0_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_TAP_CFG0, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.tap_y_en = val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_TAP_CFG0, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References lsm6dso32_read_reg(), LSM6DSO32_TAP_CFG0, lsm6dso32_write_reg(), and lsm6dso32_tap_cfg0_t::tap_y_en.

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lsm6dso32_tap_detection_on_z_get()

int32_t lsm6dso32_tap_detection_on_z_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

Enable Z direction in tap recognition.[get].

Parameters

ctx	read / write interface definitions
val	change the values of tap_z_en in reg TAP_CFG0

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 4271 of file lsm6dso32_reg.c.

{
  lsm6dso32_tap_cfg0_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_TAP_CFG0, (uint8_t *)&reg, 1);
  *val = reg.tap_z_en;
 
  return ret;
}

References lsm6dso32_read_reg(), LSM6DSO32_TAP_CFG0, and lsm6dso32_tap_cfg0_t::tap_z_en.

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lsm6dso32_tap_detection_on_z_set()

int32_t lsm6dso32_tap_detection_on_z_set	(	stmdev_ctx_t *	ctx,
		uint8_t	val
	)

Enable Z direction in tap recognition.[set].

Parameters

ctx	read / write interface definitions
val	change the values of tap_z_en in reg TAP_CFG0

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 4246 of file lsm6dso32_reg.c.

{
  lsm6dso32_tap_cfg0_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_TAP_CFG0, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.tap_z_en = val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_TAP_CFG0, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References lsm6dso32_read_reg(), LSM6DSO32_TAP_CFG0, lsm6dso32_write_reg(), and lsm6dso32_tap_cfg0_t::tap_z_en.

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lsm6dso32_tap_dur_get()

int32_t lsm6dso32_tap_dur_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

When double tap recognition is enabled, this register expresses the maximum time between two consecutive detected taps to determine a double tap event. The default value of these bits is 0000b which corresponds to 16*ODR_XL time. If the DUR[3:0] bits are set to a different value, 1LSB corresponds to 32*ODR_XL time.[get].

Parameters

ctx	read / write interface definitions
val	change the values of dur in reg INT_DUR2

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 4731 of file lsm6dso32_reg.c.

{
  lsm6dso32_int_dur2_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_INT_DUR2, (uint8_t *)&reg, 1);
  *val = reg.dur;
 
  return ret;
}

References lsm6dso32_int_dur2_t::dur, LSM6DSO32_INT_DUR2, and lsm6dso32_read_reg().

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lsm6dso32_tap_dur_set()

int32_t lsm6dso32_tap_dur_set	(	stmdev_ctx_t *	ctx,
		uint8_t	val
	)

When double tap recognition is enabled, this register expresses the maximum time between two consecutive detected taps to determine a double tap event. The default value of these bits is 0000b which corresponds to 16*ODR_XL time. If the DUR[3:0] bits are set to a different value, 1LSB corresponds to 32*ODR_XL time.[set].

Parameters

ctx	read / write interface definitions
val	change the values of dur in reg INT_DUR2

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 4700 of file lsm6dso32_reg.c.

{
  lsm6dso32_int_dur2_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_INT_DUR2, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.dur = val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_INT_DUR2, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References lsm6dso32_int_dur2_t::dur, LSM6DSO32_INT_DUR2, lsm6dso32_read_reg(), and lsm6dso32_write_reg().

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lsm6dso32_tap_mode_get()

int32_t lsm6dso32_tap_mode_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_single_double_tap_t *	val
	)

Single/double-tap event enable.[get].

Parameters

ctx	read / write interface definitions
val	Get the values of single_double_tap in reg WAKE_UP_THS

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 4775 of file lsm6dso32_reg.c.

{
  lsm6dso32_wake_up_ths_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_WAKE_UP_THS, (uint8_t *)&reg, 1);
 
  switch (reg.single_double_tap)
  {
    case LSM6DSO32_ONLY_SINGLE:
      *val = LSM6DSO32_ONLY_SINGLE;
      break;
 
    case LSM6DSO32_BOTH_SINGLE_DOUBLE:
      *val = LSM6DSO32_BOTH_SINGLE_DOUBLE;
      break;
 
    default:
      *val = LSM6DSO32_ONLY_SINGLE;
      break;
  }
 
  return ret;
}

References LSM6DSO32_BOTH_SINGLE_DOUBLE, LSM6DSO32_ONLY_SINGLE, lsm6dso32_read_reg(), LSM6DSO32_WAKE_UP_THS, and lsm6dso32_wake_up_ths_t::single_double_tap.

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lsm6dso32_tap_mode_set()

int32_t lsm6dso32_tap_mode_set	(	stmdev_ctx_t *	ctx,
		lsm6dso32_single_double_tap_t	val
	)

Single/double-tap event enable.[set].

Parameters

ctx	read / write interface definitions
val	change the values of single_double_tap in reg WAKE_UP_THS

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 4750 of file lsm6dso32_reg.c.

{
  lsm6dso32_wake_up_ths_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_WAKE_UP_THS, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.single_double_tap = (uint8_t)val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_WAKE_UP_THS, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References lsm6dso32_read_reg(), LSM6DSO32_WAKE_UP_THS, lsm6dso32_write_reg(), and lsm6dso32_wake_up_ths_t::single_double_tap.

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lsm6dso32_tap_quiet_get()

int32_t lsm6dso32_tap_quiet_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

Quiet time is the time after the first detected tap in which there must not be any over threshold event. The default value of these bits is 00b which corresponds to 2*ODR_XL time. If the QUIET[1:0] bits are set to a different value, 1LSB corresponds to 4*ODR_XL time.[get].

Parameters

ctx	read / write interface definitions
val	change the values of quiet in reg INT_DUR2

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 4674 of file lsm6dso32_reg.c.

{
  lsm6dso32_int_dur2_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_INT_DUR2, (uint8_t *)&reg, 1);
  *val = reg.quiet;
 
  return ret;
}

References LSM6DSO32_INT_DUR2, lsm6dso32_read_reg(), and lsm6dso32_int_dur2_t::quiet.

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lsm6dso32_tap_quiet_set()

int32_t lsm6dso32_tap_quiet_set	(	stmdev_ctx_t *	ctx,
		uint8_t	val
	)

Quiet time is the time after the first detected tap in which there must not be any over threshold event. The default value of these bits is 00b which corresponds to 2*ODR_XL time. If the QUIET[1:0] bits are set to a different value, 1LSB corresponds to 4*ODR_XL time.[set].

Parameters

ctx	read / write interface definitions
val	change the values of quiet in reg INT_DUR2

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 4644 of file lsm6dso32_reg.c.

{
  lsm6dso32_int_dur2_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_INT_DUR2, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.quiet = val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_INT_DUR2, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References LSM6DSO32_INT_DUR2, lsm6dso32_read_reg(), lsm6dso32_write_reg(), and lsm6dso32_int_dur2_t::quiet.

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lsm6dso32_tap_shock_get()

int32_t lsm6dso32_tap_shock_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

Maximum duration is the maximum time of an over threshold signal detection to be recognized as a tap event. The default value of these bits is 00b which corresponds to 4*ODR_XL time. If the SHOCK[1:0] bits are set to a different value, 1LSB corresponds to 8*ODR_XL time.[get].

Parameters

ctx	read / write interface definitions
val	change the values of shock in reg INT_DUR2

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 4619 of file lsm6dso32_reg.c.

{
  lsm6dso32_int_dur2_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_INT_DUR2, (uint8_t *)&reg, 1);
  *val = reg.shock;
 
  return ret;
}

References LSM6DSO32_INT_DUR2, lsm6dso32_read_reg(), and lsm6dso32_int_dur2_t::shock.

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lsm6dso32_tap_shock_set()

int32_t lsm6dso32_tap_shock_set	(	stmdev_ctx_t *	ctx,
		uint8_t	val
	)

Maximum duration is the maximum time of an over threshold signal detection to be recognized as a tap event. The default value of these bits is 00b which corresponds to 4*ODR_XL time. If the SHOCK[1:0] bits are set to a different value, 1LSB corresponds to 8*ODR_XL time.[set].

Parameters

ctx	read / write interface definitions
val	change the values of shock in reg INT_DUR2

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 4590 of file lsm6dso32_reg.c.

{
  lsm6dso32_int_dur2_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_INT_DUR2, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.shock = val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_INT_DUR2, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References LSM6DSO32_INT_DUR2, lsm6dso32_read_reg(), lsm6dso32_write_reg(), and lsm6dso32_int_dur2_t::shock.

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lsm6dso32_tap_threshold_x_get()

int32_t lsm6dso32_tap_threshold_x_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

X-axis tap recognition threshold.[get].

Parameters

ctx	read / write interface definitions
val	change the values of tap_ths_x in reg TAP_CFG1

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 4405 of file lsm6dso32_reg.c.

{
  lsm6dso32_tap_cfg1_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_TAP_CFG1, (uint8_t *)&reg, 1);
  *val = reg.tap_ths_x;
 
  return ret;
}

References lsm6dso32_read_reg(), LSM6DSO32_TAP_CFG1, and lsm6dso32_tap_cfg1_t::tap_ths_x.

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lsm6dso32_tap_threshold_x_set()

int32_t lsm6dso32_tap_threshold_x_set	(	stmdev_ctx_t *	ctx,
		uint8_t	val
	)

X-axis tap recognition threshold.[set].

Parameters

ctx	read / write interface definitions
val	change the values of tap_ths_x in reg TAP_CFG1

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 4381 of file lsm6dso32_reg.c.

{
  lsm6dso32_tap_cfg1_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_TAP_CFG1, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.tap_ths_x = val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_TAP_CFG1, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References lsm6dso32_read_reg(), LSM6DSO32_TAP_CFG1, lsm6dso32_write_reg(), and lsm6dso32_tap_cfg1_t::tap_ths_x.

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lsm6dso32_tap_threshold_y_get()

int32_t lsm6dso32_tap_threshold_y_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

Y-axis tap recognition threshold.[get].

Parameters

ctx	read / write interface definitions
val	change the values of tap_ths_y in reg TAP_CFG2

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 4523 of file lsm6dso32_reg.c.

{
  lsm6dso32_tap_cfg2_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_TAP_CFG2, (uint8_t *)&reg, 1);
  *val = reg.tap_ths_y;
 
  return ret;
}

References lsm6dso32_read_reg(), LSM6DSO32_TAP_CFG2, and lsm6dso32_tap_cfg2_t::tap_ths_y.

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lsm6dso32_tap_threshold_y_set()

int32_t lsm6dso32_tap_threshold_y_set	(	stmdev_ctx_t *	ctx,
		uint8_t	val
	)

Y-axis tap recognition threshold.[set].

Parameters

ctx	read / write interface definitions
val	change the values of tap_ths_y in reg TAP_CFG2

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 4499 of file lsm6dso32_reg.c.

{
  lsm6dso32_tap_cfg2_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_TAP_CFG2, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.tap_ths_y = val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_TAP_CFG2, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References lsm6dso32_read_reg(), LSM6DSO32_TAP_CFG2, lsm6dso32_write_reg(), and lsm6dso32_tap_cfg2_t::tap_ths_y.

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lsm6dso32_tap_threshold_z_get()

int32_t lsm6dso32_tap_threshold_z_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

Z-axis recognition threshold.[get].

Parameters

ctx	read / write interface definitions
val	change the values of tap_ths_z in reg TAP_THS_6D

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 4566 of file lsm6dso32_reg.c.

{
  lsm6dso32_tap_ths_6d_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_TAP_THS_6D, (uint8_t *)&reg, 1);
  *val = reg.tap_ths_z;
 
  return ret;
}

References lsm6dso32_read_reg(), LSM6DSO32_TAP_THS_6D, and lsm6dso32_tap_ths_6d_t::tap_ths_z.

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lsm6dso32_tap_threshold_z_set()

int32_t lsm6dso32_tap_threshold_z_set	(	stmdev_ctx_t *	ctx,
		uint8_t	val
	)

Z-axis recognition threshold.[set].

Parameters

ctx	read / write interface definitions
val	change the values of tap_ths_z in reg TAP_THS_6D

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 4542 of file lsm6dso32_reg.c.

{
  lsm6dso32_tap_ths_6d_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_TAP_THS_6D, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.tap_ths_z = val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_TAP_THS_6D, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References lsm6dso32_read_reg(), LSM6DSO32_TAP_THS_6D, lsm6dso32_write_reg(), and lsm6dso32_tap_ths_6d_t::tap_ths_z.

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