LSM6DSO32_fifo

This section group all the functions concerning the fifo usage. More...

Collaboration diagram for LSM6DSO32_fifo:

Enumerations
enum	lsm6dso32_uncoptr_rate_t {   LSM6DSO32_CMP_DISABLE = 0x00 , LSM6DSO32_CMP_ALWAYS = 0x04 , LSM6DSO32_CMP_8_TO_1 = 0x05 , LSM6DSO32_CMP_16_TO_1 = 0x06 ,   LSM6DSO32_CMP_32_TO_1 = 0x07 }
enum	lsm6dso32_bdr_xl_t {   LSM6DSO32_XL_NOT_BATCHED = 0 , LSM6DSO32_XL_BATCHED_AT_12Hz5 = 1 , LSM6DSO32_XL_BATCHED_AT_26Hz = 2 , LSM6DSO32_XL_BATCHED_AT_52Hz = 3 ,   LSM6DSO32_XL_BATCHED_AT_104Hz = 4 , LSM6DSO32_XL_BATCHED_AT_208Hz = 5 , LSM6DSO32_XL_BATCHED_AT_417Hz = 6 , LSM6DSO32_XL_BATCHED_AT_833Hz = 7 ,   LSM6DSO32_XL_BATCHED_AT_1667Hz = 8 , LSM6DSO32_XL_BATCHED_AT_3333Hz = 9 , LSM6DSO32_XL_BATCHED_AT_6667Hz = 10 , LSM6DSO32_XL_BATCHED_AT_6Hz5 = 11 }
enum	lsm6dso32_bdr_gy_t {   LSM6DSO32_GY_NOT_BATCHED = 0 , LSM6DSO32_GY_BATCHED_AT_12Hz5 = 1 , LSM6DSO32_GY_BATCHED_AT_26Hz = 2 , LSM6DSO32_GY_BATCHED_AT_52Hz = 3 ,   LSM6DSO32_GY_BATCHED_AT_104Hz = 4 , LSM6DSO32_GY_BATCHED_AT_208Hz = 5 , LSM6DSO32_GY_BATCHED_AT_417Hz = 6 , LSM6DSO32_GY_BATCHED_AT_833Hz = 7 ,   LSM6DSO32_GY_BATCHED_AT_1667Hz = 8 , LSM6DSO32_GY_BATCHED_AT_3333Hz = 9 , LSM6DSO32_GY_BATCHED_AT_6667Hz = 10 , LSM6DSO32_GY_BATCHED_AT_6Hz5 = 11 }
enum	lsm6dso32_fifo_mode_t {   LSM6DSO32_BYPASS_MODE = 0 , LSM6DSO32_FIFO_MODE = 1 , LSM6DSO32_STREAM_TO_FIFO_MODE = 3 , LSM6DSO32_BYPASS_TO_STREAM_MODE = 4 ,   LSM6DSO32_STREAM_MODE = 6 , LSM6DSO32_BYPASS_TO_FIFO_MODE = 7 }
enum	lsm6dso32_odr_t_batch_t { LSM6DSO32_TEMP_NOT_BATCHED = 0 , LSM6DSO32_TEMP_BATCHED_AT_1Hz6 = 1 , LSM6DSO32_TEMP_BATCHED_AT_12Hz5 = 2 , LSM6DSO32_TEMP_BATCHED_AT_52Hz = 3 }
enum	lsm6dso32_odr_ts_batch_t { LSM6DSO32_NO_DECIMATION = 0 , LSM6DSO32_DEC_1 = 1 , LSM6DSO32_DEC_8 = 2 , LSM6DSO32_DEC_32 = 3 }
enum	lsm6dso32_trig_counter_bdr_t { LSM6DSO32_XL_BATCH_EVENT = 0 , LSM6DSO32_GYRO_BATCH_EVENT = 1 }
enum	lsm6dso32_fifo_tag_t {   LSM6DSO32_GYRO_NC_TAG = 1 , LSM6DSO32_XL_NC_TAG , LSM6DSO32_TEMPERATURE_TAG , LSM6DSO32_TIMESTAMP_TAG ,   LSM6DSO32_CFG_CHANGE_TAG , LSM6DSO32_XL_NC_T_2_TAG , LSM6DSO32_XL_NC_T_1_TAG , LSM6DSO32_XL_2XC_TAG ,   LSM6DSO32_XL_3XC_TAG , LSM6DSO32_GYRO_NC_T_2_TAG , LSM6DSO32_GYRO_NC_T_1_TAG , LSM6DSO32_GYRO_2XC_TAG ,   LSM6DSO32_GYRO_3XC_TAG , LSM6DSO32_SENSORHUB_SLAVE0_TAG , LSM6DSO32_SENSORHUB_SLAVE1_TAG , LSM6DSO32_SENSORHUB_SLAVE2_TAG ,   LSM6DSO32_SENSORHUB_SLAVE3_TAG , LSM6DSO32_STEP_COUNTER_TAG , LSM6DSO32_SENSORHUB_NACK_TAG = 0x19 }

Functions
int32_t	lsm6dso32_fifo_watermark_set (stmdev_ctx_t *ctx, uint16_t val)
	FIFO watermark level selection.[set].
int32_t	lsm6dso32_fifo_watermark_get (stmdev_ctx_t *ctx, uint16_t *val)
	FIFO watermark level selection.[get].
int32_t	lsm6dso32_compression_algo_init_set (stmdev_ctx_t *ctx, uint8_t val)
	FIFO compression feature initialization request [set].
int32_t	lsm6dso32_compression_algo_init_get (stmdev_ctx_t *ctx, uint8_t *val)
	FIFO compression feature initialization request [get].
int32_t	lsm6dso32_compression_algo_set (stmdev_ctx_t *ctx, lsm6dso32_uncoptr_rate_t val)
	Enable and configure compression algo.[set].
int32_t	lsm6dso32_compression_algo_get (stmdev_ctx_t *ctx, lsm6dso32_uncoptr_rate_t *val)
	Enable and configure compression algo.[get].
int32_t	lsm6dso32_fifo_virtual_sens_odr_chg_set (stmdev_ctx_t *ctx, uint8_t val)
	Enables ODR CHANGE virtual sensor to be batched in FIFO.[set].
int32_t	lsm6dso32_fifo_virtual_sens_odr_chg_get (stmdev_ctx_t *ctx, uint8_t *val)
	Enables ODR CHANGE virtual sensor to be batched in FIFO.[get].
int32_t	lsm6dso32_compression_algo_real_time_set (stmdev_ctx_t *ctx, uint8_t val)
	Enables/Disables compression algorithm runtime.[set].
int32_t	lsm6dso32_compression_algo_real_time_get (stmdev_ctx_t *ctx, uint8_t *val)
	Enables/Disables compression algorithm runtime.[get].
int32_t	lsm6dso32_fifo_stop_on_wtm_set (stmdev_ctx_t *ctx, uint8_t val)
	Sensing chain FIFO stop values memorization at threshold level.[set].
int32_t	lsm6dso32_fifo_stop_on_wtm_get (stmdev_ctx_t *ctx, uint8_t *val)
	Sensing chain FIFO stop values memorization at threshold level.[get].
int32_t	lsm6dso32_fifo_xl_batch_set (stmdev_ctx_t *ctx, lsm6dso32_bdr_xl_t val)
	Selects Batching Data Rate (writing frequency in FIFO) for accelerometer data.[set].
int32_t	lsm6dso32_fifo_xl_batch_get (stmdev_ctx_t *ctx, lsm6dso32_bdr_xl_t *val)
	Selects Batching Data Rate (writing frequency in FIFO) for accelerometer data.[get].
int32_t	lsm6dso32_fifo_gy_batch_set (stmdev_ctx_t *ctx, lsm6dso32_bdr_gy_t val)
	Selects Batching Data Rate (writing frequency in FIFO) for gyroscope data.[set].
int32_t	lsm6dso32_fifo_gy_batch_get (stmdev_ctx_t *ctx, lsm6dso32_bdr_gy_t *val)
	Selects Batching Data Rate (writing frequency in FIFO) for gyroscope data.[get].
int32_t	lsm6dso32_fifo_mode_set (stmdev_ctx_t *ctx, lsm6dso32_fifo_mode_t val)
	FIFO mode selection.[set].
int32_t	lsm6dso32_fifo_mode_get (stmdev_ctx_t *ctx, lsm6dso32_fifo_mode_t *val)
	FIFO mode selection.[get].
int32_t	lsm6dso32_fifo_temp_batch_set (stmdev_ctx_t *ctx, lsm6dso32_odr_t_batch_t val)
	Selects Batching Data Rate (writing frequency in FIFO) for temperature data.[set].
int32_t	lsm6dso32_fifo_temp_batch_get (stmdev_ctx_t *ctx, lsm6dso32_odr_t_batch_t *val)
	Selects Batching Data Rate (writing frequency in FIFO) for temperature data.[get].
int32_t	lsm6dso32_fifo_timestamp_decimation_set (stmdev_ctx_t *ctx, lsm6dso32_odr_ts_batch_t val)
	Selects decimation for timestamp batching in FIFO. Writing rate will be the maximum rate between XL and GYRO BDR divided by decimation decoder.[set].
int32_t	lsm6dso32_fifo_timestamp_decimation_get (stmdev_ctx_t *ctx, lsm6dso32_odr_ts_batch_t *val)
	Selects decimation for timestamp batching in FIFO. Writing rate will be the maximum rate between XL and GYRO BDR divided by decimation decoder.[get].
int32_t	lsm6dso32_fifo_cnt_event_batch_set (stmdev_ctx_t *ctx, lsm6dso32_trig_counter_bdr_t val)
	Selects the trigger for the internal counter of batching events between XL and gyro.[set].
int32_t	lsm6dso32_fifo_cnt_event_batch_get (stmdev_ctx_t *ctx, lsm6dso32_trig_counter_bdr_t *val)
	Selects the trigger for the internal counter of batching events between XL and gyro.[get].
int32_t	lsm6dso32_rst_batch_counter_set (stmdev_ctx_t *ctx, uint8_t val)
	Resets the internal counter of batching vents for a single sensor. This bit is automatically reset to zero if it was set to ‘1’.[set].
int32_t	lsm6dso32_rst_batch_counter_get (stmdev_ctx_t *ctx, uint8_t *val)
	Resets the internal counter of batching events for a single sensor. This bit is automatically reset to zero if it was set to ‘1’.[get].
int32_t	lsm6dso32_batch_counter_threshold_set (stmdev_ctx_t *ctx, uint16_t val)
	Batch data rate counter.[set].
int32_t	lsm6dso32_batch_counter_threshold_get (stmdev_ctx_t *ctx, uint16_t *val)
	Batch data rate counter.[get].
int32_t	lsm6dso32_fifo_data_level_get (stmdev_ctx_t *ctx, uint16_t *val)
	Number of unread sensor data(TAG + 6 bytes) stored in FIFO.[get].
int32_t	lsm6dso32_fifo_status_get (stmdev_ctx_t *ctx, lsm6dso32_fifo_status2_t *val)
	FIFO status.[get].
int32_t	lsm6dso32_fifo_full_flag_get (stmdev_ctx_t *ctx, uint8_t *val)
	Smart FIFO full status.[get].
int32_t	lsm6dso32_fifo_ovr_flag_get (stmdev_ctx_t *ctx, uint8_t *val)
	FIFO overrun status.[get].
int32_t	lsm6dso32_fifo_wtm_flag_get (stmdev_ctx_t *ctx, uint8_t *val)
	FIFO watermark status.[get].
int32_t	lsm6dso32_fifo_sensor_tag_get (stmdev_ctx_t *ctx, lsm6dso32_fifo_tag_t *val)
	Identifies the sensor in FIFO_DATA_OUT.[get].
int32_t	lsm6dso32_fifo_pedo_batch_set (stmdev_ctx_t *ctx, uint8_t val)
	: Enable FIFO batching of pedometer embedded function values.[set]
int32_t	lsm6dso32_fifo_pedo_batch_get (stmdev_ctx_t *ctx, uint8_t *val)
	Enable FIFO batching of pedometer embedded function values.[get].
int32_t	lsm6dso32_sh_batch_slave_0_set (stmdev_ctx_t *ctx, uint8_t val)
	Enable FIFO batching data of first slave.[set].
int32_t	lsm6dso32_sh_batch_slave_0_get (stmdev_ctx_t *ctx, uint8_t *val)
	Enable FIFO batching data of first slave.[get].
int32_t	lsm6dso32_sh_batch_slave_1_set (stmdev_ctx_t *ctx, uint8_t val)
	Enable FIFO batching data of second slave.[set].
int32_t	lsm6dso32_sh_batch_slave_1_get (stmdev_ctx_t *ctx, uint8_t *val)
	Enable FIFO batching data of second slave.[get].
int32_t	lsm6dso32_sh_batch_slave_2_set (stmdev_ctx_t *ctx, uint8_t val)
	Enable FIFO batching data of third slave.[set].
int32_t	lsm6dso32_sh_batch_slave_2_get (stmdev_ctx_t *ctx, uint8_t *val)
	Enable FIFO batching data of third slave.[get].
int32_t	lsm6dso32_sh_batch_slave_3_set (stmdev_ctx_t *ctx, uint8_t val)
	Enable FIFO batching data of fourth slave.[set].
int32_t	lsm6dso32_sh_batch_slave_3_get (stmdev_ctx_t *ctx, uint8_t *val)
	Enable FIFO batching data of fourth slave.[get].

Detailed Description

This section group all the functions concerning the fifo usage.

Enumeration Type Documentation

lsm6dso32_bdr_gy_t

enum lsm6dso32_bdr_gy_t

Enumerator
LSM6DSO32_GY_NOT_BATCHED
LSM6DSO32_GY_BATCHED_AT_12Hz5
LSM6DSO32_GY_BATCHED_AT_26Hz
LSM6DSO32_GY_BATCHED_AT_52Hz
LSM6DSO32_GY_BATCHED_AT_104Hz
LSM6DSO32_GY_BATCHED_AT_208Hz
LSM6DSO32_GY_BATCHED_AT_417Hz
LSM6DSO32_GY_BATCHED_AT_833Hz
LSM6DSO32_GY_BATCHED_AT_1667Hz
LSM6DSO32_GY_BATCHED_AT_3333Hz
LSM6DSO32_GY_BATCHED_AT_6667Hz
LSM6DSO32_GY_BATCHED_AT_6Hz5

Definition at line 3361 of file lsm6dso32_reg.h.

{
  LSM6DSO32_GY_NOT_BATCHED         = 0,
  LSM6DSO32_GY_BATCHED_AT_12Hz5    = 1,
  LSM6DSO32_GY_BATCHED_AT_26Hz     = 2,
  LSM6DSO32_GY_BATCHED_AT_52Hz     = 3,
  LSM6DSO32_GY_BATCHED_AT_104Hz    = 4,
  LSM6DSO32_GY_BATCHED_AT_208Hz    = 5,
  LSM6DSO32_GY_BATCHED_AT_417Hz    = 6,
  LSM6DSO32_GY_BATCHED_AT_833Hz    = 7,
  LSM6DSO32_GY_BATCHED_AT_1667Hz   = 8,
  LSM6DSO32_GY_BATCHED_AT_3333Hz   = 9,
  LSM6DSO32_GY_BATCHED_AT_6667Hz   = 10,
  LSM6DSO32_GY_BATCHED_AT_6Hz5     = 11,
} lsm6dso32_bdr_gy_t;

lsm6dso32_bdr_xl_t

enum lsm6dso32_bdr_xl_t

Enumerator
LSM6DSO32_XL_NOT_BATCHED
LSM6DSO32_XL_BATCHED_AT_12Hz5
LSM6DSO32_XL_BATCHED_AT_26Hz
LSM6DSO32_XL_BATCHED_AT_52Hz
LSM6DSO32_XL_BATCHED_AT_104Hz
LSM6DSO32_XL_BATCHED_AT_208Hz
LSM6DSO32_XL_BATCHED_AT_417Hz
LSM6DSO32_XL_BATCHED_AT_833Hz
LSM6DSO32_XL_BATCHED_AT_1667Hz
LSM6DSO32_XL_BATCHED_AT_3333Hz
LSM6DSO32_XL_BATCHED_AT_6667Hz
LSM6DSO32_XL_BATCHED_AT_6Hz5

Definition at line 3341 of file lsm6dso32_reg.h.

{
  LSM6DSO32_XL_NOT_BATCHED       =  0,
  LSM6DSO32_XL_BATCHED_AT_12Hz5   =  1,
  LSM6DSO32_XL_BATCHED_AT_26Hz    =  2,
  LSM6DSO32_XL_BATCHED_AT_52Hz    =  3,
  LSM6DSO32_XL_BATCHED_AT_104Hz   =  4,
  LSM6DSO32_XL_BATCHED_AT_208Hz   =  5,
  LSM6DSO32_XL_BATCHED_AT_417Hz   =  6,
  LSM6DSO32_XL_BATCHED_AT_833Hz   =  7,
  LSM6DSO32_XL_BATCHED_AT_1667Hz  =  8,
  LSM6DSO32_XL_BATCHED_AT_3333Hz  =  9,
  LSM6DSO32_XL_BATCHED_AT_6667Hz  = 10,
  LSM6DSO32_XL_BATCHED_AT_6Hz5    = 11,
} lsm6dso32_bdr_xl_t;

lsm6dso32_fifo_mode_t

enum lsm6dso32_fifo_mode_t

Enumerator
LSM6DSO32_BYPASS_MODE
LSM6DSO32_FIFO_MODE
LSM6DSO32_STREAM_TO_FIFO_MODE
LSM6DSO32_BYPASS_TO_STREAM_MODE
LSM6DSO32_STREAM_MODE
LSM6DSO32_BYPASS_TO_FIFO_MODE

Definition at line 3381 of file lsm6dso32_reg.h.

{
  LSM6DSO32_BYPASS_MODE             = 0,
  LSM6DSO32_FIFO_MODE               = 1,
  LSM6DSO32_STREAM_TO_FIFO_MODE     = 3,
  LSM6DSO32_BYPASS_TO_STREAM_MODE   = 4,
  LSM6DSO32_STREAM_MODE             = 6,
  LSM6DSO32_BYPASS_TO_FIFO_MODE     = 7,
} lsm6dso32_fifo_mode_t;

lsm6dso32_fifo_tag_t

enum lsm6dso32_fifo_tag_t

Enumerator
LSM6DSO32_GYRO_NC_TAG
LSM6DSO32_XL_NC_TAG
LSM6DSO32_TEMPERATURE_TAG
LSM6DSO32_TIMESTAMP_TAG
LSM6DSO32_CFG_CHANGE_TAG
LSM6DSO32_XL_NC_T_2_TAG
LSM6DSO32_XL_NC_T_1_TAG
LSM6DSO32_XL_2XC_TAG
LSM6DSO32_XL_3XC_TAG
LSM6DSO32_GYRO_NC_T_2_TAG
LSM6DSO32_GYRO_NC_T_1_TAG
LSM6DSO32_GYRO_2XC_TAG
LSM6DSO32_GYRO_3XC_TAG
LSM6DSO32_SENSORHUB_SLAVE0_TAG
LSM6DSO32_SENSORHUB_SLAVE1_TAG
LSM6DSO32_SENSORHUB_SLAVE2_TAG
LSM6DSO32_SENSORHUB_SLAVE3_TAG
LSM6DSO32_STEP_COUNTER_TAG
LSM6DSO32_SENSORHUB_NACK_TAG

Definition at line 3425 of file lsm6dso32_reg.h.

{
  LSM6DSO32_GYRO_NC_TAG = 1,
  LSM6DSO32_XL_NC_TAG,
  LSM6DSO32_TEMPERATURE_TAG,
  LSM6DSO32_TIMESTAMP_TAG,
  LSM6DSO32_CFG_CHANGE_TAG,
  LSM6DSO32_XL_NC_T_2_TAG,
  LSM6DSO32_XL_NC_T_1_TAG,
  LSM6DSO32_XL_2XC_TAG,
  LSM6DSO32_XL_3XC_TAG,
  LSM6DSO32_GYRO_NC_T_2_TAG,
  LSM6DSO32_GYRO_NC_T_1_TAG,
  LSM6DSO32_GYRO_2XC_TAG,
  LSM6DSO32_GYRO_3XC_TAG,
  LSM6DSO32_SENSORHUB_SLAVE0_TAG,
  LSM6DSO32_SENSORHUB_SLAVE1_TAG,
  LSM6DSO32_SENSORHUB_SLAVE2_TAG,
  LSM6DSO32_SENSORHUB_SLAVE3_TAG,
  LSM6DSO32_STEP_COUNTER_TAG,
  LSM6DSO32_SENSORHUB_NACK_TAG = 0x19,
} lsm6dso32_fifo_tag_t;

lsm6dso32_odr_t_batch_t

enum lsm6dso32_odr_t_batch_t

Enumerator
LSM6DSO32_TEMP_NOT_BATCHED
LSM6DSO32_TEMP_BATCHED_AT_1Hz6
LSM6DSO32_TEMP_BATCHED_AT_12Hz5
LSM6DSO32_TEMP_BATCHED_AT_52Hz

Definition at line 3395 of file lsm6dso32_reg.h.

{
  LSM6DSO32_TEMP_NOT_BATCHED        = 0,
  LSM6DSO32_TEMP_BATCHED_AT_1Hz6    = 1,
  LSM6DSO32_TEMP_BATCHED_AT_12Hz5   = 2,
  LSM6DSO32_TEMP_BATCHED_AT_52Hz    = 3,
} lsm6dso32_odr_t_batch_t;

lsm6dso32_odr_ts_batch_t

enum lsm6dso32_odr_ts_batch_t

Enumerator
LSM6DSO32_NO_DECIMATION
LSM6DSO32_DEC_1
LSM6DSO32_DEC_8
LSM6DSO32_DEC_32

Definition at line 3407 of file lsm6dso32_reg.h.

{
  LSM6DSO32_NO_DECIMATION = 0,
  LSM6DSO32_DEC_1         = 1,
  LSM6DSO32_DEC_8         = 2,
  LSM6DSO32_DEC_32        = 3,
} lsm6dso32_odr_ts_batch_t;

lsm6dso32_trig_counter_bdr_t

enum lsm6dso32_trig_counter_bdr_t

Enumerator
LSM6DSO32_XL_BATCH_EVENT
LSM6DSO32_GYRO_BATCH_EVENT

Definition at line 3419 of file lsm6dso32_reg.h.

{
  LSM6DSO32_XL_BATCH_EVENT   = 0,
  LSM6DSO32_GYRO_BATCH_EVENT = 1,
} lsm6dso32_trig_counter_bdr_t;

lsm6dso32_uncoptr_rate_t

enum lsm6dso32_uncoptr_rate_t

Enumerator
LSM6DSO32_CMP_DISABLE
LSM6DSO32_CMP_ALWAYS
LSM6DSO32_CMP_8_TO_1
LSM6DSO32_CMP_16_TO_1
LSM6DSO32_CMP_32_TO_1

Definition at line 3313 of file lsm6dso32_reg.h.

{
  LSM6DSO32_CMP_DISABLE  = 0x00,
  LSM6DSO32_CMP_ALWAYS   = 0x04,
  LSM6DSO32_CMP_8_TO_1   = 0x05,
  LSM6DSO32_CMP_16_TO_1  = 0x06,
  LSM6DSO32_CMP_32_TO_1  = 0x07,
} lsm6dso32_uncoptr_rate_t;

Function Documentation

lsm6dso32_batch_counter_threshold_get()

int32_t lsm6dso32_batch_counter_threshold_get	(	stmdev_ctx_t *	ctx,
		uint16_t *	val
	)

Batch data rate counter.[get].

Parameters

ctx	read / write interface definitions
val	change the values of cnt_bdr_th in reg COUNTER_BDR_REG2 and COUNTER_BDR_REG1.

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 6023 of file lsm6dso32_reg.c.

{
  lsm6dso32_counter_bdr_reg1_t counter_bdr_reg1;
  lsm6dso32_counter_bdr_reg2_t counter_bdr_reg2;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_COUNTER_BDR_REG1,
                           (uint8_t *)&counter_bdr_reg1, 1);
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_COUNTER_BDR_REG2,
                             (uint8_t *)&counter_bdr_reg2, 1);
    *val = ((uint16_t)counter_bdr_reg1.cnt_bdr_th << 8)
           + (uint16_t)counter_bdr_reg2.cnt_bdr_th;
  }
 
  return ret;
}

References lsm6dso32_counter_bdr_reg1_t::cnt_bdr_th, LSM6DSO32_COUNTER_BDR_REG1, LSM6DSO32_COUNTER_BDR_REG2, and lsm6dso32_read_reg().

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lsm6dso32_batch_counter_threshold_set()

int32_t lsm6dso32_batch_counter_threshold_set	(	stmdev_ctx_t *	ctx,
		uint16_t	val
	)

Batch data rate counter.[set].

Parameters

ctx	read / write interface definitions
val	change the values of cnt_bdr_th in reg COUNTER_BDR_REG2 and COUNTER_BDR_REG1.

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5987 of file lsm6dso32_reg.c.

{
  lsm6dso32_counter_bdr_reg1_t counter_bdr_reg1;
  lsm6dso32_counter_bdr_reg2_t counter_bdr_reg2;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_COUNTER_BDR_REG1,
                           (uint8_t *)&counter_bdr_reg1, 1);
 
  if (ret == 0)
  {
    counter_bdr_reg2.cnt_bdr_th =  0x00FFU & (uint8_t)val;
    counter_bdr_reg1.cnt_bdr_th = (uint8_t)(0x0700U & val) >> 8;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_COUNTER_BDR_REG1,
                              (uint8_t *)&counter_bdr_reg1, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_COUNTER_BDR_REG2,
                              (uint8_t *)&counter_bdr_reg2, 1);
  }
 
  return ret;
}

References lsm6dso32_counter_bdr_reg1_t::cnt_bdr_th, lsm6dso32_counter_bdr_reg2_t::cnt_bdr_th, LSM6DSO32_COUNTER_BDR_REG1, LSM6DSO32_COUNTER_BDR_REG2, lsm6dso32_read_reg(), and lsm6dso32_write_reg().

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lsm6dso32_compression_algo_get()

int32_t lsm6dso32_compression_algo_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_uncoptr_rate_t *	val
	)

Enable and configure compression algo.[get].

Parameters

ctx	read / write interface definitions
val	Get the values of uncoptr_rate in reg FIFO_CTRL2

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5268 of file lsm6dso32_reg.c.

{
  lsm6dso32_fifo_ctrl2_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_CTRL2, (uint8_t *)&reg, 1);
 
  switch ((reg.fifo_compr_rt_en << 2) | reg.uncoptr_rate)
  {
    case LSM6DSO32_CMP_DISABLE:
      *val = LSM6DSO32_CMP_DISABLE;
      break;
 
    case LSM6DSO32_CMP_ALWAYS:
      *val = LSM6DSO32_CMP_ALWAYS;
      break;
 
    case LSM6DSO32_CMP_8_TO_1:
      *val = LSM6DSO32_CMP_8_TO_1;
      break;
 
    case LSM6DSO32_CMP_16_TO_1:
      *val = LSM6DSO32_CMP_16_TO_1;
      break;
 
    case LSM6DSO32_CMP_32_TO_1:
      *val = LSM6DSO32_CMP_32_TO_1;
      break;
 
    default:
      *val = LSM6DSO32_CMP_DISABLE;
      break;
  }
 
  return ret;
}

References lsm6dso32_fifo_ctrl2_t::fifo_compr_rt_en, LSM6DSO32_CMP_16_TO_1, LSM6DSO32_CMP_32_TO_1, LSM6DSO32_CMP_8_TO_1, LSM6DSO32_CMP_ALWAYS, LSM6DSO32_CMP_DISABLE, LSM6DSO32_FIFO_CTRL2, lsm6dso32_read_reg(), and lsm6dso32_fifo_ctrl2_t::uncoptr_rate.

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lsm6dso32_compression_algo_init_get()

int32_t lsm6dso32_compression_algo_init_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

FIFO compression feature initialization request [get].

Parameters

ctx	read / write interface definitions
val	change the values of FIFO_COMPR_INIT in reg EMB_FUNC_INIT_B

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5183 of file lsm6dso32_reg.c.

{
  lsm6dso32_emb_func_init_b_t reg;
  int32_t ret;
 
  ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_EMBEDDED_FUNC_BANK);
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_EMB_FUNC_INIT_B,
                             (uint8_t *)&reg, 1);
  }
 
  if (ret == 0)
  {
    *val = reg.fifo_compr_init;
    ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_USER_BANK);
  }
 
  return ret;
}

References lsm6dso32_emb_func_init_b_t::fifo_compr_init, LSM6DSO32_EMB_FUNC_INIT_B, LSM6DSO32_EMBEDDED_FUNC_BANK, lsm6dso32_mem_bank_set(), lsm6dso32_read_reg(), and LSM6DSO32_USER_BANK.

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lsm6dso32_compression_algo_init_set()

int32_t lsm6dso32_compression_algo_init_set	(	stmdev_ctx_t *	ctx,
		uint8_t	val
	)

FIFO compression feature initialization request [set].

Parameters

ctx	read / write interface definitions
val	change the values of FIFO_COMPR_INIT in reg EMB_FUNC_INIT_B

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5145 of file lsm6dso32_reg.c.

{
  lsm6dso32_emb_func_init_b_t reg;
  int32_t ret;
 
  ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_EMBEDDED_FUNC_BANK);
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_EMB_FUNC_INIT_B,
                             (uint8_t *)&reg, 1);
  }
 
  if (ret == 0)
  {
    reg.fifo_compr_init = val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_EMB_FUNC_INIT_B,
                              (uint8_t *)&reg, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_USER_BANK);
  }
 
  return ret;
}

References lsm6dso32_emb_func_init_b_t::fifo_compr_init, LSM6DSO32_EMB_FUNC_INIT_B, LSM6DSO32_EMBEDDED_FUNC_BANK, lsm6dso32_mem_bank_set(), lsm6dso32_read_reg(), LSM6DSO32_USER_BANK, and lsm6dso32_write_reg().

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lsm6dso32_compression_algo_real_time_get()

int32_t lsm6dso32_compression_algo_real_time_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

Enables/Disables compression algorithm runtime.[get].

Parameters

ctx	read / write interface definitions
val	change the values of fifo_compr_rt_en in reg FIFO_CTRL2

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5385 of file lsm6dso32_reg.c.

{
  lsm6dso32_fifo_ctrl2_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_CTRL2, (uint8_t *)&reg, 1);
  *val = reg.fifo_compr_rt_en;
 
  return ret;
}

References lsm6dso32_fifo_ctrl2_t::fifo_compr_rt_en, LSM6DSO32_FIFO_CTRL2, and lsm6dso32_read_reg().

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lsm6dso32_compression_algo_real_time_set()

int32_t lsm6dso32_compression_algo_real_time_set	(	stmdev_ctx_t *	ctx,
		uint8_t	val
	)

Enables/Disables compression algorithm runtime.[set].

Parameters

ctx	read / write interface definitions
val	change the values of fifo_compr_rt_en in reg FIFO_CTRL2

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5360 of file lsm6dso32_reg.c.

{
  lsm6dso32_fifo_ctrl2_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_CTRL2, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.fifo_compr_rt_en = val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_FIFO_CTRL2, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References lsm6dso32_fifo_ctrl2_t::fifo_compr_rt_en, LSM6DSO32_FIFO_CTRL2, lsm6dso32_read_reg(), and lsm6dso32_write_reg().

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lsm6dso32_compression_algo_set()

int32_t lsm6dso32_compression_algo_set	(	stmdev_ctx_t *	ctx,
		lsm6dso32_uncoptr_rate_t	val
	)

Enable and configure compression algo.[set].

Parameters

ctx	read / write interface definitions
val	change the values of uncoptr_rate in reg FIFO_CTRL2

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5215 of file lsm6dso32_reg.c.

{
  lsm6dso32_emb_func_en_b_t emb_func_en_b;
  lsm6dso32_fifo_ctrl2_t fifo_ctrl2;
  int32_t ret;
 
  ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_EMBEDDED_FUNC_BANK);
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_EMB_FUNC_EN_B,
                             (uint8_t *)&emb_func_en_b, 1);
  }
 
  if (ret == 0)
  {
    emb_func_en_b.fifo_compr_en = ((uint8_t)val & 0x04U) >> 2;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_EMB_FUNC_EN_B,
                              (uint8_t *)&emb_func_en_b, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_USER_BANK);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_CTRL2,
                             (uint8_t *)&fifo_ctrl2, 1);
  }
 
  if (ret == 0)
  {
    fifo_ctrl2.fifo_compr_rt_en = ((uint8_t)val & 0x04U) >> 2;
    fifo_ctrl2.uncoptr_rate = (uint8_t)val & 0x03U;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_FIFO_CTRL2,
                              (uint8_t *)&fifo_ctrl2, 1);
  }
 
  return ret;
}

References lsm6dso32_emb_func_en_b_t::fifo_compr_en, lsm6dso32_fifo_ctrl2_t::fifo_compr_rt_en, LSM6DSO32_EMB_FUNC_EN_B, LSM6DSO32_EMBEDDED_FUNC_BANK, LSM6DSO32_FIFO_CTRL2, lsm6dso32_mem_bank_set(), lsm6dso32_read_reg(), LSM6DSO32_USER_BANK, lsm6dso32_write_reg(), and lsm6dso32_fifo_ctrl2_t::uncoptr_rate.

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lsm6dso32_fifo_cnt_event_batch_get()

int32_t lsm6dso32_fifo_cnt_event_batch_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_trig_counter_bdr_t *	val
	)

Selects the trigger for the internal counter of batching events between XL and gyro.[get].

Parameters

ctx	read / write interface definitions
val	Get the values of trig_counter_bdr in reg COUNTER_BDR_REG1

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5899 of file lsm6dso32_reg.c.

{
  lsm6dso32_counter_bdr_reg1_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_COUNTER_BDR_REG1,
                           (uint8_t *)&reg, 1);
 
  switch (reg.trig_counter_bdr)
  {
    case LSM6DSO32_XL_BATCH_EVENT:
      *val = LSM6DSO32_XL_BATCH_EVENT;
      break;
 
    case LSM6DSO32_GYRO_BATCH_EVENT:
      *val = LSM6DSO32_GYRO_BATCH_EVENT;
      break;
 
    default:
      *val = LSM6DSO32_XL_BATCH_EVENT;
      break;
  }
 
  return ret;
}

References LSM6DSO32_COUNTER_BDR_REG1, LSM6DSO32_GYRO_BATCH_EVENT, lsm6dso32_read_reg(), LSM6DSO32_XL_BATCH_EVENT, and lsm6dso32_counter_bdr_reg1_t::trig_counter_bdr.

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lsm6dso32_fifo_cnt_event_batch_set()

int32_t lsm6dso32_fifo_cnt_event_batch_set	(	stmdev_ctx_t *	ctx,
		lsm6dso32_trig_counter_bdr_t	val
	)

Selects the trigger for the internal counter of batching events between XL and gyro.[set].

Parameters

ctx	read / write interface definitions
val	change the values of trig_counter_bdr in reg COUNTER_BDR_REG1

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5870 of file lsm6dso32_reg.c.

{
  lsm6dso32_counter_bdr_reg1_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_COUNTER_BDR_REG1,
                           (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.trig_counter_bdr = (uint8_t)val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_COUNTER_BDR_REG1,
                              (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References LSM6DSO32_COUNTER_BDR_REG1, lsm6dso32_read_reg(), lsm6dso32_write_reg(), and lsm6dso32_counter_bdr_reg1_t::trig_counter_bdr.

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lsm6dso32_fifo_data_level_get()

int32_t lsm6dso32_fifo_data_level_get	(	stmdev_ctx_t *	ctx,
		uint16_t *	val
	)

Number of unread sensor data(TAG + 6 bytes) stored in FIFO.[get].

Parameters

ctx	read / write interface definitions
val	change the values of diff_fifo in reg FIFO_STATUS1

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 6052 of file lsm6dso32_reg.c.

{
  lsm6dso32_fifo_status1_t fifo_status1;
  lsm6dso32_fifo_status2_t fifo_status2;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_STATUS1,
                           (uint8_t *)&fifo_status1, 1);
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_STATUS2,
                             (uint8_t *)&fifo_status2, 1);
    *val = ((uint16_t)fifo_status2.diff_fifo << 8) +
           (uint16_t)fifo_status1.diff_fifo;
  }
 
  return ret;
}

References lsm6dso32_fifo_status1_t::diff_fifo, LSM6DSO32_FIFO_STATUS1, LSM6DSO32_FIFO_STATUS2, and lsm6dso32_read_reg().

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lsm6dso32_fifo_full_flag_get()

int32_t lsm6dso32_fifo_full_flag_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

Smart FIFO full status.[get].

Parameters

ctx	read / write interface definitions
val	change the values of fifo_full_ia in reg FIFO_STATUS2

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 6099 of file lsm6dso32_reg.c.

{
  lsm6dso32_fifo_status2_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_STATUS2, (uint8_t *)&reg, 1);
  *val = reg.fifo_full_ia;
 
  return ret;
}

References lsm6dso32_fifo_status2_t::fifo_full_ia, LSM6DSO32_FIFO_STATUS2, and lsm6dso32_read_reg().

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lsm6dso32_fifo_gy_batch_get()

int32_t lsm6dso32_fifo_gy_batch_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_bdr_gy_t *	val
	)

Selects Batching Data Rate (writing frequency in FIFO) for gyroscope data.[get].

Parameters

ctx	read / write interface definitions
val	Get the values of bdr_gy in reg FIFO_CTRL3

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5579 of file lsm6dso32_reg.c.

{
  lsm6dso32_fifo_ctrl3_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_CTRL3, (uint8_t *)&reg, 1);
 
  switch (reg.bdr_gy)
  {
    case LSM6DSO32_GY_NOT_BATCHED:
      *val = LSM6DSO32_GY_NOT_BATCHED;
      break;
 
    case LSM6DSO32_GY_BATCHED_AT_12Hz5:
      *val = LSM6DSO32_GY_BATCHED_AT_12Hz5;
      break;
 
    case LSM6DSO32_GY_BATCHED_AT_26Hz:
      *val = LSM6DSO32_GY_BATCHED_AT_26Hz;
      break;
 
    case LSM6DSO32_GY_BATCHED_AT_52Hz:
      *val = LSM6DSO32_GY_BATCHED_AT_52Hz;
      break;
 
    case LSM6DSO32_GY_BATCHED_AT_104Hz:
      *val = LSM6DSO32_GY_BATCHED_AT_104Hz;
      break;
 
    case LSM6DSO32_GY_BATCHED_AT_208Hz:
      *val = LSM6DSO32_GY_BATCHED_AT_208Hz;
      break;
 
    case LSM6DSO32_GY_BATCHED_AT_417Hz:
      *val = LSM6DSO32_GY_BATCHED_AT_417Hz;
      break;
 
    case LSM6DSO32_GY_BATCHED_AT_833Hz:
      *val = LSM6DSO32_GY_BATCHED_AT_833Hz;
      break;
 
    case LSM6DSO32_GY_BATCHED_AT_1667Hz:
      *val = LSM6DSO32_GY_BATCHED_AT_1667Hz;
      break;
 
    case LSM6DSO32_GY_BATCHED_AT_3333Hz:
      *val = LSM6DSO32_GY_BATCHED_AT_3333Hz;
      break;
 
    case LSM6DSO32_GY_BATCHED_AT_6667Hz:
      *val = LSM6DSO32_GY_BATCHED_AT_6667Hz;
      break;
 
    case LSM6DSO32_GY_BATCHED_AT_6Hz5:
      *val = LSM6DSO32_GY_BATCHED_AT_6Hz5;
      break;
 
    default:
      *val = LSM6DSO32_GY_NOT_BATCHED;
      break;
  }
 
  return ret;
}

References lsm6dso32_fifo_ctrl3_t::bdr_gy, LSM6DSO32_FIFO_CTRL3, LSM6DSO32_GY_BATCHED_AT_104Hz, LSM6DSO32_GY_BATCHED_AT_12Hz5, LSM6DSO32_GY_BATCHED_AT_1667Hz, LSM6DSO32_GY_BATCHED_AT_208Hz, LSM6DSO32_GY_BATCHED_AT_26Hz, LSM6DSO32_GY_BATCHED_AT_3333Hz, LSM6DSO32_GY_BATCHED_AT_417Hz, LSM6DSO32_GY_BATCHED_AT_52Hz, LSM6DSO32_GY_BATCHED_AT_6667Hz, LSM6DSO32_GY_BATCHED_AT_6Hz5, LSM6DSO32_GY_BATCHED_AT_833Hz, LSM6DSO32_GY_NOT_BATCHED, and lsm6dso32_read_reg().

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lsm6dso32_fifo_gy_batch_set()

int32_t lsm6dso32_fifo_gy_batch_set	(	stmdev_ctx_t *	ctx,
		lsm6dso32_bdr_gy_t	val
	)

Selects Batching Data Rate (writing frequency in FIFO) for gyroscope data.[set].

Parameters

ctx	read / write interface definitions
val	change the values of bdr_gy in reg FIFO_CTRL3

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5553 of file lsm6dso32_reg.c.

{
  lsm6dso32_fifo_ctrl3_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_CTRL3, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.bdr_gy = (uint8_t)val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_FIFO_CTRL3, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References lsm6dso32_fifo_ctrl3_t::bdr_gy, LSM6DSO32_FIFO_CTRL3, lsm6dso32_read_reg(), and lsm6dso32_write_reg().

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lsm6dso32_fifo_mode_get()

int32_t lsm6dso32_fifo_mode_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_fifo_mode_t *	val
	)

FIFO mode selection.[get].

Parameters

ctx	read / write interface definitions
val	Get the values of fifo_mode in reg FIFO_CTRL4

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5678 of file lsm6dso32_reg.c.

{
  lsm6dso32_fifo_ctrl4_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_CTRL4, (uint8_t *)&reg, 1);
 
  switch (reg.fifo_mode)
  {
    case LSM6DSO32_BYPASS_MODE:
      *val = LSM6DSO32_BYPASS_MODE;
      break;
 
    case LSM6DSO32_FIFO_MODE:
      *val = LSM6DSO32_FIFO_MODE;
      break;
 
    case LSM6DSO32_STREAM_TO_FIFO_MODE:
      *val = LSM6DSO32_STREAM_TO_FIFO_MODE;
      break;
 
    case LSM6DSO32_BYPASS_TO_STREAM_MODE:
      *val = LSM6DSO32_BYPASS_TO_STREAM_MODE;
      break;
 
    case LSM6DSO32_STREAM_MODE:
      *val = LSM6DSO32_STREAM_MODE;
      break;
 
    case LSM6DSO32_BYPASS_TO_FIFO_MODE:
      *val = LSM6DSO32_BYPASS_TO_FIFO_MODE;
      break;
 
    default:
      *val = LSM6DSO32_BYPASS_MODE;
      break;
  }
 
  return ret;
}

References lsm6dso32_fifo_ctrl4_t::fifo_mode, LSM6DSO32_BYPASS_MODE, LSM6DSO32_BYPASS_TO_FIFO_MODE, LSM6DSO32_BYPASS_TO_STREAM_MODE, LSM6DSO32_FIFO_CTRL4, LSM6DSO32_FIFO_MODE, lsm6dso32_read_reg(), LSM6DSO32_STREAM_MODE, and LSM6DSO32_STREAM_TO_FIFO_MODE.

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lsm6dso32_fifo_mode_set()

int32_t lsm6dso32_fifo_mode_set	(	stmdev_ctx_t *	ctx,
		lsm6dso32_fifo_mode_t	val
	)

FIFO mode selection.[set].

Parameters

ctx	read / write interface definitions
val	change the values of fifo_mode in reg FIFO_CTRL4

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5653 of file lsm6dso32_reg.c.

{
  lsm6dso32_fifo_ctrl4_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_CTRL4, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.fifo_mode = (uint8_t)val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_FIFO_CTRL4, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References lsm6dso32_fifo_ctrl4_t::fifo_mode, LSM6DSO32_FIFO_CTRL4, lsm6dso32_read_reg(), and lsm6dso32_write_reg().

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lsm6dso32_fifo_ovr_flag_get()

int32_t lsm6dso32_fifo_ovr_flag_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

FIFO overrun status.[get].

Parameters

ctx	read / write interface definitions
val	change the values of fifo_over_run_latched in reg FIFO_STATUS2

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 6119 of file lsm6dso32_reg.c.

{
  lsm6dso32_fifo_status2_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_STATUS2, (uint8_t *)&reg, 1);
  *val = reg.fifo_ovr_ia;
 
  return ret;
}

References lsm6dso32_fifo_status2_t::fifo_ovr_ia, LSM6DSO32_FIFO_STATUS2, and lsm6dso32_read_reg().

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lsm6dso32_fifo_pedo_batch_get()

int32_t lsm6dso32_fifo_pedo_batch_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

Enable FIFO batching of pedometer embedded function values.[get].

Parameters

ctx	read / write interface definitions
val	change the values of pedo_fifo_en in reg LSM6DSO32_EMB_FUNC_FIFO_CFG

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 6299 of file lsm6dso32_reg.c.

{
  lsm6dso32_emb_func_fifo_cfg_t reg;
  int32_t ret;
 
  ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_EMBEDDED_FUNC_BANK);
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_EMB_FUNC_FIFO_CFG,
                             (uint8_t *)&reg, 1);
  }
 
  if (ret == 0)
  {
    *val = reg.pedo_fifo_en;
    ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_USER_BANK);
  }
 
  return ret;
}

References LSM6DSO32_EMB_FUNC_FIFO_CFG, LSM6DSO32_EMBEDDED_FUNC_BANK, lsm6dso32_mem_bank_set(), lsm6dso32_read_reg(), LSM6DSO32_USER_BANK, and lsm6dso32_emb_func_fifo_cfg_t::pedo_fifo_en.

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lsm6dso32_fifo_pedo_batch_set()

int32_t lsm6dso32_fifo_pedo_batch_set	(	stmdev_ctx_t *	ctx,
		uint8_t	val
	)

: Enable FIFO batching of pedometer embedded function values.[set]

Parameters

ctx	read / write interface definitions
val	change the values of gbias_fifo_en in reg LSM6DSO32_EMB_FUNC_FIFO_CFG

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 6262 of file lsm6dso32_reg.c.

{
  lsm6dso32_emb_func_fifo_cfg_t reg;
  int32_t ret;
 
  ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_EMBEDDED_FUNC_BANK);
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_EMB_FUNC_FIFO_CFG,
                             (uint8_t *)&reg, 1);
  }
 
  if (ret == 0)
  {
    reg.pedo_fifo_en = val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_EMB_FUNC_FIFO_CFG,
                              (uint8_t *)&reg, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_USER_BANK);
  }
 
  return ret;
}

References LSM6DSO32_EMB_FUNC_FIFO_CFG, LSM6DSO32_EMBEDDED_FUNC_BANK, lsm6dso32_mem_bank_set(), lsm6dso32_read_reg(), LSM6DSO32_USER_BANK, lsm6dso32_write_reg(), and lsm6dso32_emb_func_fifo_cfg_t::pedo_fifo_en.

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lsm6dso32_fifo_sensor_tag_get()

int32_t lsm6dso32_fifo_sensor_tag_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_fifo_tag_t *	val
	)

Identifies the sensor in FIFO_DATA_OUT.[get].

Parameters

ctx	read / write interface definitions
val	change the values of tag_sensor in reg FIFO_DATA_OUT_TAG

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 6157 of file lsm6dso32_reg.c.

{
  lsm6dso32_fifo_data_out_tag_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_DATA_OUT_TAG,
                           (uint8_t *)&reg, 1);
 
  switch (reg.tag_sensor)
  {
    case LSM6DSO32_GYRO_NC_TAG:
      *val = LSM6DSO32_GYRO_NC_TAG;
      break;
 
    case LSM6DSO32_XL_NC_TAG:
      *val = LSM6DSO32_XL_NC_TAG;
      break;
 
    case LSM6DSO32_TEMPERATURE_TAG:
      *val = LSM6DSO32_TEMPERATURE_TAG;
      break;
 
    case LSM6DSO32_TIMESTAMP_TAG:
      *val = LSM6DSO32_TIMESTAMP_TAG;
      break;
 
    case LSM6DSO32_CFG_CHANGE_TAG:
      *val = LSM6DSO32_CFG_CHANGE_TAG;
      break;
 
    case LSM6DSO32_XL_NC_T_2_TAG:
      *val = LSM6DSO32_XL_NC_T_2_TAG;
      break;
 
    case LSM6DSO32_XL_NC_T_1_TAG:
      *val = LSM6DSO32_XL_NC_T_1_TAG;
      break;
 
    case LSM6DSO32_XL_2XC_TAG:
      *val = LSM6DSO32_XL_2XC_TAG;
      break;
 
    case LSM6DSO32_XL_3XC_TAG:
      *val = LSM6DSO32_XL_3XC_TAG;
      break;
 
    case LSM6DSO32_GYRO_NC_T_2_TAG:
      *val = LSM6DSO32_GYRO_NC_T_2_TAG;
      break;
 
    case LSM6DSO32_GYRO_NC_T_1_TAG:
      *val = LSM6DSO32_GYRO_NC_T_1_TAG;
      break;
 
    case LSM6DSO32_GYRO_2XC_TAG:
      *val = LSM6DSO32_GYRO_2XC_TAG;
      break;
 
    case LSM6DSO32_GYRO_3XC_TAG:
      *val = LSM6DSO32_GYRO_3XC_TAG;
      break;
 
    case LSM6DSO32_SENSORHUB_SLAVE0_TAG:
      *val = LSM6DSO32_SENSORHUB_SLAVE0_TAG;
      break;
 
    case LSM6DSO32_SENSORHUB_SLAVE1_TAG:
      *val = LSM6DSO32_SENSORHUB_SLAVE1_TAG;
      break;
 
    case LSM6DSO32_SENSORHUB_SLAVE2_TAG:
      *val = LSM6DSO32_SENSORHUB_SLAVE2_TAG;
      break;
 
    case LSM6DSO32_SENSORHUB_SLAVE3_TAG:
      *val = LSM6DSO32_SENSORHUB_SLAVE3_TAG;
      break;
 
    case LSM6DSO32_STEP_COUNTER_TAG:
      *val = LSM6DSO32_STEP_COUNTER_TAG;
      break;
 
    case LSM6DSO32_SENSORHUB_NACK_TAG:
      *val = LSM6DSO32_SENSORHUB_NACK_TAG;
      break;
 
    default:
      *val = LSM6DSO32_GYRO_NC_TAG;
      break;
  }
 
  return ret;
}

References LSM6DSO32_CFG_CHANGE_TAG, LSM6DSO32_FIFO_DATA_OUT_TAG, LSM6DSO32_GYRO_2XC_TAG, LSM6DSO32_GYRO_3XC_TAG, LSM6DSO32_GYRO_NC_T_1_TAG, LSM6DSO32_GYRO_NC_T_2_TAG, LSM6DSO32_GYRO_NC_TAG, lsm6dso32_read_reg(), LSM6DSO32_SENSORHUB_NACK_TAG, LSM6DSO32_SENSORHUB_SLAVE0_TAG, LSM6DSO32_SENSORHUB_SLAVE1_TAG, LSM6DSO32_SENSORHUB_SLAVE2_TAG, LSM6DSO32_SENSORHUB_SLAVE3_TAG, LSM6DSO32_STEP_COUNTER_TAG, LSM6DSO32_TEMPERATURE_TAG, LSM6DSO32_TIMESTAMP_TAG, LSM6DSO32_XL_2XC_TAG, LSM6DSO32_XL_3XC_TAG, LSM6DSO32_XL_NC_T_1_TAG, LSM6DSO32_XL_NC_T_2_TAG, LSM6DSO32_XL_NC_TAG, and lsm6dso32_fifo_data_out_tag_t::tag_sensor.

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lsm6dso32_fifo_status_get()

int32_t lsm6dso32_fifo_status_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_fifo_status2_t *	val
	)

FIFO status.[get].

Parameters

ctx	read / write interface definitions
val	registers FIFO_STATUS2

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 6081 of file lsm6dso32_reg.c.

{
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_STATUS2, (uint8_t *) val, 1);
 
  return ret;
}

References LSM6DSO32_FIFO_STATUS2, and lsm6dso32_read_reg().

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lsm6dso32_fifo_stop_on_wtm_get()

int32_t lsm6dso32_fifo_stop_on_wtm_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

Sensing chain FIFO stop values memorization at threshold level.[get].

Parameters

ctx	read / write interface definitions
val	change the values of stop_on_wtm in reg FIFO_CTRL2

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5431 of file lsm6dso32_reg.c.

{
  lsm6dso32_fifo_ctrl2_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_CTRL2, (uint8_t *)&reg, 1);
  *val = reg.stop_on_wtm;
 
  return ret;
}

References LSM6DSO32_FIFO_CTRL2, lsm6dso32_read_reg(), and lsm6dso32_fifo_ctrl2_t::stop_on_wtm.

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lsm6dso32_fifo_stop_on_wtm_set()

int32_t lsm6dso32_fifo_stop_on_wtm_set	(	stmdev_ctx_t *	ctx,
		uint8_t	val
	)

Sensing chain FIFO stop values memorization at threshold level.[set].

Parameters

ctx	read / write interface definitions
val	change the values of stop_on_wtm in reg FIFO_CTRL2

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5406 of file lsm6dso32_reg.c.

{
  lsm6dso32_fifo_ctrl2_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_CTRL2, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.stop_on_wtm = val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_FIFO_CTRL2, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References LSM6DSO32_FIFO_CTRL2, lsm6dso32_read_reg(), lsm6dso32_write_reg(), and lsm6dso32_fifo_ctrl2_t::stop_on_wtm.

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lsm6dso32_fifo_temp_batch_get()

int32_t lsm6dso32_fifo_temp_batch_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_odr_t_batch_t *	val
	)

Selects Batching Data Rate (writing frequency in FIFO) for temperature data.[get].

Parameters

ctx	read / write interface definitions
val	Get the values of odr_t_batch in reg FIFO_CTRL4

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5755 of file lsm6dso32_reg.c.

{
  lsm6dso32_fifo_ctrl4_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_CTRL4, (uint8_t *)&reg, 1);
 
  switch (reg.odr_t_batch)
  {
    case LSM6DSO32_TEMP_NOT_BATCHED:
      *val = LSM6DSO32_TEMP_NOT_BATCHED;
      break;
 
    case LSM6DSO32_TEMP_BATCHED_AT_1Hz6:
      *val = LSM6DSO32_TEMP_BATCHED_AT_1Hz6;
      break;
 
    case LSM6DSO32_TEMP_BATCHED_AT_12Hz5:
      *val = LSM6DSO32_TEMP_BATCHED_AT_12Hz5;
      break;
 
    case LSM6DSO32_TEMP_BATCHED_AT_52Hz:
      *val = LSM6DSO32_TEMP_BATCHED_AT_52Hz;
      break;
 
    default:
      *val = LSM6DSO32_TEMP_NOT_BATCHED;
      break;
  }
 
  return ret;
}

References LSM6DSO32_FIFO_CTRL4, lsm6dso32_read_reg(), LSM6DSO32_TEMP_BATCHED_AT_12Hz5, LSM6DSO32_TEMP_BATCHED_AT_1Hz6, LSM6DSO32_TEMP_BATCHED_AT_52Hz, LSM6DSO32_TEMP_NOT_BATCHED, and lsm6dso32_fifo_ctrl4_t::odr_t_batch.

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lsm6dso32_fifo_temp_batch_set()

int32_t lsm6dso32_fifo_temp_batch_set	(	stmdev_ctx_t *	ctx,
		lsm6dso32_odr_t_batch_t	val
	)

Selects Batching Data Rate (writing frequency in FIFO) for temperature data.[set].

Parameters

ctx	read / write interface definitions
val	change the values of odr_t_batch in reg FIFO_CTRL4

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5729 of file lsm6dso32_reg.c.

{
  lsm6dso32_fifo_ctrl4_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_CTRL4, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.odr_t_batch = (uint8_t)val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_FIFO_CTRL4, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References LSM6DSO32_FIFO_CTRL4, lsm6dso32_read_reg(), lsm6dso32_write_reg(), and lsm6dso32_fifo_ctrl4_t::odr_t_batch.

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lsm6dso32_fifo_timestamp_decimation_get()

int32_t lsm6dso32_fifo_timestamp_decimation_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_odr_ts_batch_t *	val
	)

Selects decimation for timestamp batching in FIFO. Writing rate will be the maximum rate between XL and GYRO BDR divided by decimation decoder.[get].

Parameters

ctx	read / write interface definitions
val	Get the values of odr_ts_batch in reg FIFO_CTRL4

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5826 of file lsm6dso32_reg.c.

{
  lsm6dso32_fifo_ctrl4_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_CTRL4, (uint8_t *)&reg, 1);
 
  switch (reg.odr_ts_batch)
  {
    case LSM6DSO32_NO_DECIMATION:
      *val = LSM6DSO32_NO_DECIMATION;
      break;
 
    case LSM6DSO32_DEC_1:
      *val = LSM6DSO32_DEC_1;
      break;
 
    case LSM6DSO32_DEC_8:
      *val = LSM6DSO32_DEC_8;
      break;
 
    case LSM6DSO32_DEC_32:
      *val = LSM6DSO32_DEC_32;
      break;
 
    default:
      *val = LSM6DSO32_NO_DECIMATION;
      break;
  }
 
  return ret;
}

References LSM6DSO32_DEC_1, LSM6DSO32_DEC_32, LSM6DSO32_DEC_8, LSM6DSO32_FIFO_CTRL4, LSM6DSO32_NO_DECIMATION, lsm6dso32_read_reg(), and lsm6dso32_fifo_ctrl4_t::odr_ts_batch.

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lsm6dso32_fifo_timestamp_decimation_set()

int32_t lsm6dso32_fifo_timestamp_decimation_set	(	stmdev_ctx_t *	ctx,
		lsm6dso32_odr_ts_batch_t	val
	)

Selects decimation for timestamp batching in FIFO. Writing rate will be the maximum rate between XL and GYRO BDR divided by decimation decoder.[set].

Parameters

ctx	read / write interface definitions
val	change the values of odr_ts_batch in reg FIFO_CTRL4

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5799 of file lsm6dso32_reg.c.

{
  lsm6dso32_fifo_ctrl4_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_CTRL4, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.odr_ts_batch = (uint8_t)val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_FIFO_CTRL4, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References LSM6DSO32_FIFO_CTRL4, lsm6dso32_read_reg(), lsm6dso32_write_reg(), and lsm6dso32_fifo_ctrl4_t::odr_ts_batch.

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lsm6dso32_fifo_virtual_sens_odr_chg_get()

int32_t lsm6dso32_fifo_virtual_sens_odr_chg_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

Enables ODR CHANGE virtual sensor to be batched in FIFO.[get].

Parameters

ctx	read / write interface definitions
val	change the values of odrchg_en in reg FIFO_CTRL2

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5339 of file lsm6dso32_reg.c.

{
  lsm6dso32_fifo_ctrl2_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_CTRL2, (uint8_t *)&reg, 1);
  *val = reg.odrchg_en;
 
  return ret;
}

References LSM6DSO32_FIFO_CTRL2, lsm6dso32_read_reg(), and lsm6dso32_fifo_ctrl2_t::odrchg_en.

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lsm6dso32_fifo_virtual_sens_odr_chg_set()

int32_t lsm6dso32_fifo_virtual_sens_odr_chg_set	(	stmdev_ctx_t *	ctx,
		uint8_t	val
	)

Enables ODR CHANGE virtual sensor to be batched in FIFO.[set].

Parameters

ctx	read / write interface definitions
val	change the values of odrchg_en in reg FIFO_CTRL2

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5314 of file lsm6dso32_reg.c.

{
  lsm6dso32_fifo_ctrl2_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_CTRL2, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.odrchg_en = val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_FIFO_CTRL2, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References LSM6DSO32_FIFO_CTRL2, lsm6dso32_read_reg(), lsm6dso32_write_reg(), and lsm6dso32_fifo_ctrl2_t::odrchg_en.

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lsm6dso32_fifo_watermark_get()

int32_t lsm6dso32_fifo_watermark_get	(	stmdev_ctx_t *	ctx,
		uint16_t *	val
	)

FIFO watermark level selection.[get].

Parameters

ctx	read / write interface definitions
val	change the values of wtm in reg FIFO_CTRL1

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5117 of file lsm6dso32_reg.c.

{
  lsm6dso32_fifo_ctrl1_t fifo_ctrl1;
  lsm6dso32_fifo_ctrl2_t fifo_ctrl2;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_CTRL1,
                           (uint8_t *)&fifo_ctrl1, 1);
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_CTRL2,
                             (uint8_t *)&fifo_ctrl2, 1);
    *val = ((uint16_t)fifo_ctrl2.wtm << 8) + (uint16_t)fifo_ctrl1.wtm;
  }
 
  return ret;
}

References LSM6DSO32_FIFO_CTRL1, LSM6DSO32_FIFO_CTRL2, lsm6dso32_read_reg(), and lsm6dso32_fifo_ctrl1_t::wtm.

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lsm6dso32_fifo_watermark_set()

int32_t lsm6dso32_fifo_watermark_set	(	stmdev_ctx_t *	ctx,
		uint16_t	val
	)

FIFO watermark level selection.[set].

Parameters

ctx	read / write interface definitions
val	change the values of wtm in reg FIFO_CTRL1

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5083 of file lsm6dso32_reg.c.

{
  lsm6dso32_fifo_ctrl1_t fifo_ctrl1;
  lsm6dso32_fifo_ctrl2_t fifo_ctrl2;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_CTRL2,
                           (uint8_t *)&fifo_ctrl2, 1);
 
  if (ret == 0)
  {
    fifo_ctrl1.wtm = 0x00FFU & (uint8_t)val;
    fifo_ctrl2.wtm = (uint8_t)((0x0100U & val) >> 8);
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_FIFO_CTRL1,
                              (uint8_t *)&fifo_ctrl1, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_FIFO_CTRL2,
                              (uint8_t *)&fifo_ctrl2, 1);
  }
 
  return ret;
}

References LSM6DSO32_FIFO_CTRL1, LSM6DSO32_FIFO_CTRL2, lsm6dso32_read_reg(), lsm6dso32_write_reg(), lsm6dso32_fifo_ctrl1_t::wtm, and lsm6dso32_fifo_ctrl2_t::wtm.

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lsm6dso32_fifo_wtm_flag_get()

int32_t lsm6dso32_fifo_wtm_flag_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

FIFO watermark status.[get].

Parameters

ctx	read / write interface definitions
val	change the values of fifo_wtm_ia in reg FIFO_STATUS2

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 6138 of file lsm6dso32_reg.c.

{
  lsm6dso32_fifo_status2_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_STATUS2, (uint8_t *)&reg, 1);
  *val = reg.fifo_wtm_ia;
 
  return ret;
}

References lsm6dso32_fifo_status2_t::fifo_wtm_ia, LSM6DSO32_FIFO_STATUS2, and lsm6dso32_read_reg().

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lsm6dso32_fifo_xl_batch_get()

int32_t lsm6dso32_fifo_xl_batch_get	(	stmdev_ctx_t *	ctx,
		lsm6dso32_bdr_xl_t *	val
	)

Selects Batching Data Rate (writing frequency in FIFO) for accelerometer data.[get].

Parameters

ctx	read / write interface definitions
val	Get the values of bdr_xl in reg FIFO_CTRL3

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5478 of file lsm6dso32_reg.c.

{
  lsm6dso32_fifo_ctrl3_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_CTRL3, (uint8_t *)&reg, 1);
 
  switch (reg.bdr_xl)
  {
    case LSM6DSO32_XL_NOT_BATCHED:
      *val = LSM6DSO32_XL_NOT_BATCHED;
      break;
 
    case LSM6DSO32_XL_BATCHED_AT_12Hz5:
      *val = LSM6DSO32_XL_BATCHED_AT_12Hz5;
      break;
 
    case LSM6DSO32_XL_BATCHED_AT_26Hz:
      *val = LSM6DSO32_XL_BATCHED_AT_26Hz;
      break;
 
    case LSM6DSO32_XL_BATCHED_AT_52Hz:
      *val = LSM6DSO32_XL_BATCHED_AT_52Hz;
      break;
 
    case LSM6DSO32_XL_BATCHED_AT_104Hz:
      *val = LSM6DSO32_XL_BATCHED_AT_104Hz;
      break;
 
    case LSM6DSO32_XL_BATCHED_AT_208Hz:
      *val = LSM6DSO32_XL_BATCHED_AT_208Hz;
      break;
 
    case LSM6DSO32_XL_BATCHED_AT_417Hz:
      *val = LSM6DSO32_XL_BATCHED_AT_417Hz;
      break;
 
    case LSM6DSO32_XL_BATCHED_AT_833Hz:
      *val = LSM6DSO32_XL_BATCHED_AT_833Hz;
      break;
 
    case LSM6DSO32_XL_BATCHED_AT_1667Hz:
      *val = LSM6DSO32_XL_BATCHED_AT_1667Hz;
      break;
 
    case LSM6DSO32_XL_BATCHED_AT_3333Hz:
      *val = LSM6DSO32_XL_BATCHED_AT_3333Hz;
      break;
 
    case LSM6DSO32_XL_BATCHED_AT_6667Hz:
      *val = LSM6DSO32_XL_BATCHED_AT_6667Hz;
      break;
 
    case LSM6DSO32_XL_BATCHED_AT_6Hz5:
      *val = LSM6DSO32_XL_BATCHED_AT_6Hz5;
      break;
 
    default:
      *val = LSM6DSO32_XL_NOT_BATCHED;
      break;
  }
 
  return ret;
}

References lsm6dso32_fifo_ctrl3_t::bdr_xl, LSM6DSO32_FIFO_CTRL3, lsm6dso32_read_reg(), LSM6DSO32_XL_BATCHED_AT_104Hz, LSM6DSO32_XL_BATCHED_AT_12Hz5, LSM6DSO32_XL_BATCHED_AT_1667Hz, LSM6DSO32_XL_BATCHED_AT_208Hz, LSM6DSO32_XL_BATCHED_AT_26Hz, LSM6DSO32_XL_BATCHED_AT_3333Hz, LSM6DSO32_XL_BATCHED_AT_417Hz, LSM6DSO32_XL_BATCHED_AT_52Hz, LSM6DSO32_XL_BATCHED_AT_6667Hz, LSM6DSO32_XL_BATCHED_AT_6Hz5, LSM6DSO32_XL_BATCHED_AT_833Hz, and LSM6DSO32_XL_NOT_BATCHED.

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lsm6dso32_fifo_xl_batch_set()

int32_t lsm6dso32_fifo_xl_batch_set	(	stmdev_ctx_t *	ctx,
		lsm6dso32_bdr_xl_t	val
	)

Selects Batching Data Rate (writing frequency in FIFO) for accelerometer data.[set].

Parameters

ctx	read / write interface definitions
val	change the values of bdr_xl in reg FIFO_CTRL3

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5452 of file lsm6dso32_reg.c.

{
  lsm6dso32_fifo_ctrl3_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_FIFO_CTRL3, (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.bdr_xl = (uint8_t)val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_FIFO_CTRL3, (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References lsm6dso32_fifo_ctrl3_t::bdr_xl, LSM6DSO32_FIFO_CTRL3, lsm6dso32_read_reg(), and lsm6dso32_write_reg().

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lsm6dso32_rst_batch_counter_get()

int32_t lsm6dso32_rst_batch_counter_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

Resets the internal counter of batching events for a single sensor. This bit is automatically reset to zero if it was set to ‘1’.[get].

Parameters

ctx	read / write interface definitions
val	change the values of rst_counter_bdr in reg COUNTER_BDR_REG1

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5965 of file lsm6dso32_reg.c.

{
  lsm6dso32_counter_bdr_reg1_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_COUNTER_BDR_REG1,
                           (uint8_t *)&reg, 1);
  *val = reg.rst_counter_bdr;
 
  return ret;
}

References LSM6DSO32_COUNTER_BDR_REG1, lsm6dso32_read_reg(), and lsm6dso32_counter_bdr_reg1_t::rst_counter_bdr.

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lsm6dso32_rst_batch_counter_set()

int32_t lsm6dso32_rst_batch_counter_set	(	stmdev_ctx_t *	ctx,
		uint8_t	val
	)

Resets the internal counter of batching vents for a single sensor. This bit is automatically reset to zero if it was set to ‘1’.[set].

Parameters

ctx	read / write interface definitions
val	change the values of rst_counter_bdr in reg COUNTER_BDR_REG1

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 5936 of file lsm6dso32_reg.c.

{
  lsm6dso32_counter_bdr_reg1_t reg;
  int32_t ret;
 
  ret = lsm6dso32_read_reg(ctx, LSM6DSO32_COUNTER_BDR_REG1,
                           (uint8_t *)&reg, 1);
 
  if (ret == 0)
  {
    reg.rst_counter_bdr = val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_COUNTER_BDR_REG1,
                              (uint8_t *)&reg, 1);
  }
 
  return ret;
}

References LSM6DSO32_COUNTER_BDR_REG1, lsm6dso32_read_reg(), lsm6dso32_write_reg(), and lsm6dso32_counter_bdr_reg1_t::rst_counter_bdr.

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lsm6dso32_sh_batch_slave_0_get()

int32_t lsm6dso32_sh_batch_slave_0_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

Enable FIFO batching data of first slave.[get].

Parameters

ctx	read / write interface definitions
val	change the values of batch_ext_sens_0_en in reg SLV0_CONFIG

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 6365 of file lsm6dso32_reg.c.

{
  lsm6dso32_slv0_config_t reg;
  int32_t ret;
 
  ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_SENSOR_HUB_BANK);
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_SLV0_CONFIG, (uint8_t *)&reg, 1);
  }
 
  if (ret == 0)
  {
    *val = reg.batch_ext_sens_0_en;
    ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_USER_BANK);
  }
 
  return ret;
}

References lsm6dso32_slv0_config_t::batch_ext_sens_0_en, lsm6dso32_mem_bank_set(), lsm6dso32_read_reg(), LSM6DSO32_SENSOR_HUB_BANK, LSM6DSO32_SLV0_CONFIG, and LSM6DSO32_USER_BANK.

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lsm6dso32_sh_batch_slave_0_set()

int32_t lsm6dso32_sh_batch_slave_0_set	(	stmdev_ctx_t *	ctx,
		uint8_t	val
	)

Enable FIFO batching data of first slave.[set].

Parameters

ctx	read / write interface definitions
val	change the values of batch_ext_sens_0_en in reg SLV0_CONFIG

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 6330 of file lsm6dso32_reg.c.

{
  lsm6dso32_slv0_config_t reg;
  int32_t ret;
 
  ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_SENSOR_HUB_BANK);
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_SLV0_CONFIG, (uint8_t *)&reg, 1);
  }
 
  if (ret == 0)
  {
    reg.batch_ext_sens_0_en = val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_SLV0_CONFIG, (uint8_t *)&reg, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_USER_BANK);
  }
 
  return ret;
}

References lsm6dso32_slv0_config_t::batch_ext_sens_0_en, lsm6dso32_mem_bank_set(), lsm6dso32_read_reg(), LSM6DSO32_SENSOR_HUB_BANK, LSM6DSO32_SLV0_CONFIG, LSM6DSO32_USER_BANK, and lsm6dso32_write_reg().

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lsm6dso32_sh_batch_slave_1_get()

int32_t lsm6dso32_sh_batch_slave_1_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

Enable FIFO batching data of second slave.[get].

Parameters

ctx	read / write interface definitions
val	change the values of batch_ext_sens_1_en in reg SLV1_CONFIG

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 6431 of file lsm6dso32_reg.c.

{
  lsm6dso32_slv1_config_t reg;
  int32_t ret;
 
  ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_SENSOR_HUB_BANK);
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_SLV1_CONFIG, (uint8_t *)&reg, 1);
    *val = reg.batch_ext_sens_1_en;
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_USER_BANK);
  }
 
  return ret;
}

References lsm6dso32_mem_bank_set(), lsm6dso32_read_reg(), LSM6DSO32_SENSOR_HUB_BANK, LSM6DSO32_SLV1_CONFIG, and LSM6DSO32_USER_BANK.

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lsm6dso32_sh_batch_slave_1_set()

int32_t lsm6dso32_sh_batch_slave_1_set	(	stmdev_ctx_t *	ctx,
		uint8_t	val
	)

Enable FIFO batching data of second slave.[set].

Parameters

ctx	read / write interface definitions
val	change the values of batch_ext_sens_1_en in reg SLV1_CONFIG

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 6396 of file lsm6dso32_reg.c.

{
  lsm6dso32_slv1_config_t reg;
  int32_t ret;
 
  ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_SENSOR_HUB_BANK);
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_SLV1_CONFIG, (uint8_t *)&reg, 1);
  }
 
  if (ret == 0)
  {
    reg.batch_ext_sens_1_en = val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_SLV1_CONFIG, (uint8_t *)&reg, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_USER_BANK);
  }
 
  return ret;
}

References lsm6dso32_slv1_config_t::batch_ext_sens_1_en, lsm6dso32_mem_bank_set(), lsm6dso32_read_reg(), LSM6DSO32_SENSOR_HUB_BANK, LSM6DSO32_SLV1_CONFIG, LSM6DSO32_USER_BANK, and lsm6dso32_write_reg().

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lsm6dso32_sh_batch_slave_2_get()

int32_t lsm6dso32_sh_batch_slave_2_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

Enable FIFO batching data of third slave.[get].

Parameters

ctx	read / write interface definitions
val	change the values of batch_ext_sens_2_en in reg SLV2_CONFIG

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 6497 of file lsm6dso32_reg.c.

{
  lsm6dso32_slv2_config_t reg;
  int32_t ret;
 
  ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_SENSOR_HUB_BANK);
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_SLV2_CONFIG, (uint8_t *)&reg, 1);
  }
 
  if (ret == 0)
  {
    *val = reg.batch_ext_sens_2_en;
    ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_USER_BANK);
  }
 
  return ret;
}

References lsm6dso32_slv2_config_t::batch_ext_sens_2_en, lsm6dso32_mem_bank_set(), lsm6dso32_read_reg(), LSM6DSO32_SENSOR_HUB_BANK, LSM6DSO32_SLV2_CONFIG, and LSM6DSO32_USER_BANK.

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lsm6dso32_sh_batch_slave_2_set()

int32_t lsm6dso32_sh_batch_slave_2_set	(	stmdev_ctx_t *	ctx,
		uint8_t	val
	)

Enable FIFO batching data of third slave.[set].

Parameters

ctx	read / write interface definitions
val	change the values of batch_ext_sens_2_en in reg SLV2_CONFIG

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 6462 of file lsm6dso32_reg.c.

{
  lsm6dso32_slv2_config_t reg;
  int32_t ret;
 
  ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_SENSOR_HUB_BANK);
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_SLV2_CONFIG, (uint8_t *)&reg, 1);
  }
 
  if (ret == 0)
  {
    reg.batch_ext_sens_2_en = val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_SLV2_CONFIG, (uint8_t *)&reg, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_USER_BANK);
  }
 
  return ret;
}

References lsm6dso32_slv2_config_t::batch_ext_sens_2_en, lsm6dso32_mem_bank_set(), lsm6dso32_read_reg(), LSM6DSO32_SENSOR_HUB_BANK, LSM6DSO32_SLV2_CONFIG, LSM6DSO32_USER_BANK, and lsm6dso32_write_reg().

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lsm6dso32_sh_batch_slave_3_get()

int32_t lsm6dso32_sh_batch_slave_3_get	(	stmdev_ctx_t *	ctx,
		uint8_t *	val
	)

Enable FIFO batching data of fourth slave.[get].

Parameters

ctx	read / write interface definitions
val	change the values of batch_ext_sens_3_en in reg SLV3_CONFIG

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 6563 of file lsm6dso32_reg.c.

{
  lsm6dso32_slv3_config_t reg;
  int32_t ret;
 
  ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_SENSOR_HUB_BANK);
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_SLV3_CONFIG, (uint8_t *)&reg, 1);
  }
 
  if (ret == 0)
  {
    *val = reg.batch_ext_sens_3_en;
    ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_USER_BANK);
  }
 
  return ret;
}

References lsm6dso32_slv3_config_t::batch_ext_sens_3_en, lsm6dso32_mem_bank_set(), lsm6dso32_read_reg(), LSM6DSO32_SENSOR_HUB_BANK, LSM6DSO32_SLV3_CONFIG, and LSM6DSO32_USER_BANK.

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lsm6dso32_sh_batch_slave_3_set()

int32_t lsm6dso32_sh_batch_slave_3_set	(	stmdev_ctx_t *	ctx,
		uint8_t	val
	)

Enable FIFO batching data of fourth slave.[set].

Parameters

ctx	read / write interface definitions
val	change the values of batch_ext_sens_3_en in reg SLV3_CONFIG

Return values

interface

status (MANDATORY: return 0 -> no Error)

Definition at line 6528 of file lsm6dso32_reg.c.

{
  lsm6dso32_slv3_config_t reg;
  int32_t ret;
 
  ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_SENSOR_HUB_BANK);
 
  if (ret == 0)
  {
    ret = lsm6dso32_read_reg(ctx, LSM6DSO32_SLV3_CONFIG, (uint8_t *)&reg, 1);
  }
 
  if (ret == 0)
  {
    reg.batch_ext_sens_3_en = val;
    ret = lsm6dso32_write_reg(ctx, LSM6DSO32_SLV3_CONFIG, (uint8_t *)&reg, 1);
  }
 
  if (ret == 0)
  {
    ret = lsm6dso32_mem_bank_set(ctx, LSM6DSO32_USER_BANK);
  }
 
  return ret;
}

References lsm6dso32_slv3_config_t::batch_ext_sens_3_en, lsm6dso32_mem_bank_set(), lsm6dso32_read_reg(), LSM6DSO32_SENSOR_HUB_BANK, LSM6DSO32_SLV3_CONFIG, LSM6DSO32_USER_BANK, and lsm6dso32_write_reg().

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