Da Vinci Firmware 1
Firmware for the DaVinci-M rocket avionics board.
Loading...
Searching...
No Matches

Functions for checking the driver's internal state and managing the QSPI bus. More...

Collaboration diagram for Driver Status & Helpers:

Functions

HAL_StatusTypeDef QFlash_WriteEnable ()
 enables writes
 
HAL_StatusTypeDef QFlash_WriteDisable ()
 disables writes
 
HAL_StatusTypeDef QFlash_WriteSR2 (uint8_t data)
 writes to register 2
 
HAL_StatusTypeDef QFlash_WriteSR3 (uint8_t data)
 writes to register 3
 
uint8_t QFlash_IsQSPIAvailable (void)
 
HAL_StatusTypeDef QFlash_WaitForQSPIAvailable (uint32_t timeout)
 
uint8_t QFlash_IsDataAvailable (void)
 
HAL_StatusTypeDef QFlash_WaitForDataAvailable (uint32_t timeout)
 
void QFlash_DefaultCmd (QSPI_CommandTypeDef *sCommand)
 

Detailed Description

Functions for checking the driver's internal state and managing the QSPI bus.

Function Documentation

◆ QFlash_DefaultCmd()

void QFlash_DefaultCmd ( QSPI_CommandTypeDef *  sCommand)

Definition at line 105 of file z_qflash_W25QXXX.c.

105 {
106
107 sCommand->InstructionMode = QFLASH_INSTRUCTION_MODE;
108 sCommand->AddressMode = QFLASH_ADDRESS_MODE;
109 sCommand->AddressSize = QFLASH_ADDRESS_SIZE;
110 sCommand->DataMode = QFLASH_DATA_MODE;
111 sCommand->AlternateByteMode = QFLASH_ALTERNATE_BYTE_MODE;
112 sCommand->DdrMode = QFLASH_DDR_MODE;
113 sCommand->DdrHoldHalfCycle = QFLASH_DDR_HOLD_HALF_CYCLE;
114 sCommand->SIOOMode = QFLASH_SIOO_MODE;
115 sCommand->DummyCycles = QFLASH_DUMMY_CYCLES;
116
117 return;
118}
#define QFLASH_INSTRUCTION_MODE
#define QFLASH_ADDRESS_SIZE
#define QFLASH_ALTERNATE_BYTE_MODE
#define QFLASH_ADDRESS_MODE
#define QFLASH_DUMMY_CYCLES
#define QFLASH_DATA_MODE
#define QFLASH_SIOO_MODE
#define QFLASH_DDR_HOLD_HALF_CYCLE
#define QFLASH_DDR_MODE

References QFLASH_ADDRESS_MODE, QFLASH_ADDRESS_SIZE, QFLASH_ALTERNATE_BYTE_MODE, QFLASH_DATA_MODE, QFLASH_DDR_HOLD_HALF_CYCLE, QFLASH_DDR_MODE, QFLASH_DUMMY_CYCLES, QFLASH_INSTRUCTION_MODE, and QFLASH_SIOO_MODE.

Referenced by QFlash_BErase32k(), QFlash_BErase64k(), QFlash_ChipErase(), QFlash_Init(), QFlash_PowerDown(), QFlash_PowerUp(), QFlash_Read(), QFlash_ReadDevID(), QFlash_ReadJedecID(), QFlash_ReadManufactutrerAndDevID(), QFlash_ReadSFDP(), QFlash_ReadSR1(), QFlash_ReadSR2(), QFlash_ReadSR3(), QFlash_Reset(), QFlash_SErase4k(), QFlash_WaitForWritingComplete(), QFlash_WriteASinglePage(), QFlash_WriteDisable(), QFlash_WriteEnable(), QFlash_WriteSR2(), and QFlash_WriteSR3().

Here is the caller graph for this function:

◆ QFlash_IsDataAvailable()

uint8_t QFlash_IsDataAvailable ( void  )

Definition at line 70 of file z_qflash_W25QXXX.c.

70 {
72}
static volatile uint8_t QSpiReadDataAvailable

References QSpiReadDataAvailable.

◆ QFlash_IsQSPIAvailable()

uint8_t QFlash_IsQSPIAvailable ( void  )

Definition at line 35 of file z_qflash_W25QXXX.c.

35 {
36 return QSpiAvailable;
37}
static volatile uint8_t QSpiAvailable

References QSpiAvailable.

◆ QFlash_WaitForDataAvailable()

HAL_StatusTypeDef QFlash_WaitForDataAvailable ( uint32_t  timeout)

Definition at line 85 of file z_qflash_W25QXXX.c.

85 {
86 uint32_t curtime = HAL_GetTick();
87
88 while ((!QSpiReadDataAvailable) && ((timeout==0) || ((HAL_GetTick()-curtime)<=timeout))) {};
90 return HAL_ERROR;
91 return HAL_OK;
92};
@ HAL_ERROR
@ HAL_OK

References HAL_ERROR, HAL_OK, and QSpiReadDataAvailable.

Referenced by QFlash_Read(), QFlash_ReadDevID(), QFlash_ReadJedecID(), QFlash_ReadManufactutrerAndDevID(), QFlash_ReadSFDP(), QFlash_ReadSR1(), QFlash_ReadSR2(), and QFlash_ReadSR3().

Here is the caller graph for this function:

◆ QFlash_WaitForQSPIAvailable()

HAL_StatusTypeDef QFlash_WaitForQSPIAvailable ( uint32_t  timeout)

Definition at line 49 of file z_qflash_W25QXXX.c.

49 {
50 uint32_t curtime = HAL_GetTick();
51
52 while ((!QSpiAvailable) && ((timeout==0) || ((HAL_GetTick()-curtime)<=timeout))) {};
53 if (!QSpiAvailable)
54 return HAL_ERROR;
55 return HAL_OK;
56};

References HAL_ERROR, HAL_OK, and QSpiAvailable.

Referenced by QFlash_Init().

Here is the caller graph for this function:

◆ QFlash_WriteDisable()

HAL_StatusTypeDef QFlash_WriteDisable ( void  )

disables writes

Definition at line 475 of file z_qflash_W25QXXX.c.

475 {
476 QSPI_CommandTypeDef sCommand = {0};
477
478 QFlash_DefaultCmd(&sCommand);
479 sCommand.Instruction = W25_W_DISABLE;
480 sCommand.DataMode = QSPI_DATA_NONE;
481 sCommand.AddressMode = QSPI_ADDRESS_NONE;
482
483#ifdef EXT_FLASH_QSPI_DMA_MODE
484 while (!QSpiAvailable) {}; // waiting for a free QSPI port.
485#endif //EXT_FLASH_QSPI_DMA_MODE
486 if (HAL_QSPI_Command(&FLASH_QSPI_PORT, &sCommand, QFLASH_DEF_TIMEOUT) != HAL_OK) { //Send command
487 return HAL_ERROR;
488 }
489
490 return HAL_OK;
491}
#define QFLASH_DEF_TIMEOUT
#define W25_W_DISABLE
void QFlash_DefaultCmd(QSPI_CommandTypeDef *sCommand)
QSPI_HandleTypeDef FLASH_QSPI_PORT

References FLASH_QSPI_PORT, HAL_ERROR, HAL_OK, QFLASH_DEF_TIMEOUT, QFlash_DefaultCmd(), QSpiAvailable, and W25_W_DISABLE.

Referenced by QFlash_CheckSR1().

Here is the call graph for this function:
Here is the caller graph for this function:

◆ QFlash_WriteEnable()

HAL_StatusTypeDef QFlash_WriteEnable ( void  )

enables writes

Definition at line 425 of file z_qflash_W25QXXX.c.

425 {
426QSPI_CommandTypeDef sCommand = {0};
427
428
429//Send a "Write Enable" command
430 QFlash_DefaultCmd(&sCommand);
431 sCommand.Instruction = W25_W_ENABLE;
432 sCommand.DataMode = QSPI_DATA_NONE;
433 sCommand.AddressMode = QSPI_ADDRESS_NONE;
434
435#ifdef EXT_FLASH_QSPI_DMA_MODE
436 while (!QSpiAvailable) {}; // waiting for a free QSPI port.
437#endif //EXT_FLASH_QSPI_DMA_MODE
438 if (HAL_QSPI_Command(&FLASH_QSPI_PORT, &sCommand, QFLASH_DEF_TIMEOUT) != HAL_OK) { //Send command
439 return HAL_ERROR;
440 }
441
442/*
443//Wait for Write Enable bit set
444
445 QSPI_AutoPollingTypeDef sConfig;
446
447 QFlash_DefaultCmd(&sCommand);
448 sCommand.Instruction = W25_R_SR1;
449 sCommand.DataMode = QSPI_DATA_1_LINE;
450 sCommand.AddressMode = QSPI_ADDRESS_NONE;
451
452 sConfig.Mask = SR1_BIT_WEL;
453 sConfig.Match = 2;
454 sConfig.MatchMode = QSPI_MATCH_MODE_AND;
455 sConfig.StatusBytesSize = 1;
456 sConfig.Interval = 0x10;
457 sConfig.AutomaticStop = QSPI_AUTOMATIC_STOP_ENABLE;
458
459 if (HAL_QSPI_AutoPolling(&FLASH_QSPI_PORT, &sCommand, &sConfig, QFLASH_BSY_TIMEOUT) != HAL_OK) {
460 return HAL_ERROR;
461 }
462*/
463
464 return HAL_OK;
465
466}
#define W25_W_ENABLE

References FLASH_QSPI_PORT, HAL_ERROR, HAL_OK, QFLASH_DEF_TIMEOUT, QFlash_DefaultCmd(), QSpiAvailable, and W25_W_ENABLE.

Referenced by QFlash_BErase32k(), QFlash_BErase64k(), QFlash_ChipErase(), QFlash_SErase4k(), QFlash_Write(), QFlash_WriteSR2(), and QFlash_WriteSR3().

Here is the call graph for this function:
Here is the caller graph for this function:

◆ QFlash_WriteSR2()

HAL_StatusTypeDef QFlash_WriteSR2 ( uint8_t  data)

writes to register 2

Definition at line 631 of file z_qflash_W25QXXX.c.

631 {
632 QSPI_CommandTypeDef sCommand = {0};
633
634 if (QFlash_WriteEnable())
635 return HAL_ERROR;
636
637 QFlash_DefaultCmd(&sCommand);
638 sCommand.Instruction = W25_W_SR2;
639 sCommand.DataMode = QSPI_DATA_1_LINE;
640 sCommand.AddressMode = QSPI_ADDRESS_NONE;
641 sCommand.AddressSize = QSPI_ADDRESS_NONE;
642 sCommand.Address = 0x0;
643 sCommand.NbData = 1;
644
645#ifdef EXT_FLASH_QSPI_DMA_MODE
646 while (!QSpiAvailable) {}; // waiting for a free QSPI port.
647 QSpiAvailable=0; //set QSPI busy
648 QSpiReadDataAvailable=0; //set data read unavailable yet
649 if (HAL_QSPI_Command(&FLASH_QSPI_PORT, &sCommand, QFLASH_DEF_TIMEOUT) != HAL_OK) { //Send command
650 return HAL_ERROR;
651 }
652 if (HAL_QSPI_Transmit_DMA(&FLASH_QSPI_PORT, &data) != HAL_OK) { // Receive data
653 return HAL_ERROR;
654 }
655#else
656 if (HAL_QSPI_Command(&FLASH_QSPI_PORT, &sCommand, QFLASH_DEF_TIMEOUT) != HAL_OK) { //Send command
657 return HAL_ERROR;
658 }
659 if (HAL_QSPI_Transmit(&FLASH_QSPI_PORT, &data, QFLASH_DEF_TIMEOUT) != HAL_OK) {
660 return HAL_ERROR;
661 }
662#endif //EXT_FLASH_QSPI_DMA_MODE
663
665
666 return HAL_OK;
667}
HAL_StatusTypeDef QFlash_WaitForWritingComplete()
#define W25_W_SR2
HAL_StatusTypeDef QFlash_WriteEnable()
enables writes

References FLASH_QSPI_PORT, HAL_ERROR, HAL_OK, QFLASH_DEF_TIMEOUT, QFlash_DefaultCmd(), QFlash_WaitForWritingComplete(), QFlash_WriteEnable(), QSpiAvailable, QSpiReadDataAvailable, and W25_W_SR2.

Here is the call graph for this function:

◆ QFlash_WriteSR3()

HAL_StatusTypeDef QFlash_WriteSR3 ( uint8_t  data)

writes to register 3

Definition at line 676 of file z_qflash_W25QXXX.c.

676 {
677 QSPI_CommandTypeDef sCommand = {0};
678
679 if (QFlash_WriteEnable())
680 return HAL_ERROR;
681
682 QFlash_DefaultCmd(&sCommand);
683 sCommand.Instruction = W25_W_SR3;
684 sCommand.DataMode = QSPI_DATA_1_LINE;
685 sCommand.AddressMode = QSPI_ADDRESS_NONE;
686 sCommand.AddressSize = QSPI_ADDRESS_NONE;
687 sCommand.Address = 0x0;
688 sCommand.NbData = 1;
689
690#ifdef EXT_FLASH_QSPI_QDMA_MODE
691 while (!QSpiAvailable) {}; // waiting for a free QSPI port.
692 QSpiAvailable=0; //set QSPI busy
693 QSpiReadDataAvailable=0; //set data read unavailable yet
694 if (HAL_QSPI_Command(&FLASH_QSPI_PORT, &sCommand, QFLASH_DEF_TIMEOUT) != HAL_OK) { //Send command
695 return HAL_ERROR;
696 }
697 if (HAL_QSPI_Transmit_DMA(&FLASH_QSPI_PORT, &data) != HAL_OK) { // Receive data
698 return HAL_ERROR;
699 }
700#else
701 if (HAL_QSPI_Command(&FLASH_QSPI_PORT, &sCommand, QFLASH_DEF_TIMEOUT) != HAL_OK) { //Send command
702 return HAL_ERROR;
703 }
704 if (HAL_QSPI_Transmit(&FLASH_QSPI_PORT, &data, QFLASH_DEF_TIMEOUT) != HAL_OK) { // Receive data
705 return HAL_ERROR;
706 }
707#endif //EXT_FLASH_QSPI_DMA_MODE
708
710
711 return HAL_OK;
712}
#define W25_W_SR3

References FLASH_QSPI_PORT, HAL_ERROR, HAL_OK, QFLASH_DEF_TIMEOUT, QFlash_DefaultCmd(), QFlash_WaitForWritingComplete(), QFlash_WriteEnable(), QSpiAvailable, QSpiReadDataAvailable, and W25_W_SR3.

Here is the call graph for this function: